mirror of
https://gitlab.com/qemu-project/qemu
synced 2024-07-22 10:55:31 +00:00
trivial patches for 2024-03-09
-----BEGIN PGP SIGNATURE----- iQFDBAABCAAtFiEEe3O61ovnosKJMUsicBtPaxppPlkFAmXshtIPHG1qdEB0bHMu bXNrLnJ1AAoJEHAbT2saaT5ZMFUIAKTd1rYzRs6x4wXitaWbYIIs2d6UB/HLbzz2 BVHZwoYqsW3TuNFJp4njHhexZ76nFlT8xMuOKB5tAm4KOmqOdxS/mfThuSGsWGP7 CAk35ENOMQbii/jp6tqawop+H0rVMSJjBrkU4vLRAtQ7g1ISnX6tJi3wiyS+FtHq 9eIfgJgM77tvq6RLPZTUrUBevMWQfjMcvXmMnYqL4Z1dnibIb5/R3RKAnEc4CUoS hMw94wBcq+ZOQNPnY7d+WioKq7JcSWX7UW5NuHo+C+G83nq1/5vE8Oe2kNwzFyDL 9sIqL8bz6v8iiqcVMIBykSAZhYH9QEuVRJso18UE5w0B8k4CQcM= =dIAF -----END PGP SIGNATURE----- Merge tag 'pull-trivial-patches' of https://gitlab.com/mjt0k/qemu into staging trivial patches for 2024-03-09 # -----BEGIN PGP SIGNATURE----- # # iQFDBAABCAAtFiEEe3O61ovnosKJMUsicBtPaxppPlkFAmXshtIPHG1qdEB0bHMu # bXNrLnJ1AAoJEHAbT2saaT5ZMFUIAKTd1rYzRs6x4wXitaWbYIIs2d6UB/HLbzz2 # BVHZwoYqsW3TuNFJp4njHhexZ76nFlT8xMuOKB5tAm4KOmqOdxS/mfThuSGsWGP7 # CAk35ENOMQbii/jp6tqawop+H0rVMSJjBrkU4vLRAtQ7g1ISnX6tJi3wiyS+FtHq # 9eIfgJgM77tvq6RLPZTUrUBevMWQfjMcvXmMnYqL4Z1dnibIb5/R3RKAnEc4CUoS # hMw94wBcq+ZOQNPnY7d+WioKq7JcSWX7UW5NuHo+C+G83nq1/5vE8Oe2kNwzFyDL # 9sIqL8bz6v8iiqcVMIBykSAZhYH9QEuVRJso18UE5w0B8k4CQcM= # =dIAF # -----END PGP SIGNATURE----- # gpg: Signature made Sat 09 Mar 2024 15:57:06 GMT # gpg: using RSA key 7B73BAD68BE7A2C289314B22701B4F6B1A693E59 # gpg: issuer "mjt@tls.msk.ru" # gpg: Good signature from "Michael Tokarev <mjt@tls.msk.ru>" [full] # gpg: aka "Michael Tokarev <mjt@corpit.ru>" [full] # gpg: aka "Michael Tokarev <mjt@debian.org>" [full] # Primary key fingerprint: 6EE1 95D1 886E 8FFB 810D 4324 457C E0A0 8044 65C5 # Subkey fingerprint: 7B73 BAD6 8BE7 A2C2 8931 4B22 701B 4F6B 1A69 3E59 * tag 'pull-trivial-patches' of https://gitlab.com/mjt0k/qemu: docs/acpi/bits: add some clarity and details while also improving formating hw/mem/cxl_type3: Fix problem with g_steal_pointer() hw/pci-bridge/cxl_upstream: Fix problem with g_steal_pointer() hw/cxl/cxl-cdat: Fix type of buf in ct3_load_cdat() qerror: QERR_DEVICE_IN_USE is no longer used, drop blockdev: Fix block_resize error reporting for op blockers char: Slightly better error reporting when chardev is in use make-release: switch to .xz format by default hw/scsi/lsi53c895a: Fix typo in comment hw/vfio/pci.c: Make some structure static replay: Improve error messages about configuration conflicts Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Peter Maydell
commit
89126b6dca
|
|
@ -2252,8 +2252,7 @@ void coroutine_fn qmp_block_resize(const char *device, const char *node_name,
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}
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bdrv_graph_co_rdlock();
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if (bdrv_op_is_blocked(bs, BLOCK_OP_TYPE_RESIZE, NULL)) {
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error_setg(errp, QERR_DEVICE_IN_USE, device);
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if (bdrv_op_is_blocked(bs, BLOCK_OP_TYPE_RESIZE, errp)) {
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bdrv_graph_co_rdunlock();
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return;
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}
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|
|
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|
|
@ -199,13 +199,18 @@ bool qemu_chr_fe_init(CharBackend *b, Chardev *s, Error **errp)
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MuxChardev *d = MUX_CHARDEV(s);
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if (d->mux_cnt >= MAX_MUX) {
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goto unavailable;
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error_setg(errp,
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"too many uses of multiplexed chardev '%s'"
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" (maximum is " stringify(MAX_MUX) ")",
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s->label);
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return false;
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}
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d->backends[d->mux_cnt] = b;
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tag = d->mux_cnt++;
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} else if (s->be) {
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goto unavailable;
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error_setg(errp, "chardev '%s' is already in use", s->label);
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return false;
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} else {
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s->be = b;
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}
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@ -215,10 +220,6 @@ bool qemu_chr_fe_init(CharBackend *b, Chardev *s, Error **errp)
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b->tag = tag;
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b->chr = s;
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return true;
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unavailable:
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error_setg(errp, QERR_DEVICE_IN_USE, s->label);
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return false;
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}
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void qemu_chr_fe_deinit(CharBackend *b, bool del)
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|
|
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@ -1,26 +1,48 @@
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=============================================================================
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ACPI/SMBIOS avocado tests using biosbits
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=============================================================================
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************
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Introduction
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************
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Biosbits is a software written by Josh Triplett that can be downloaded
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from https://biosbits.org/. The github codebase can be found
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`here <https://github.com/biosbits/bits/tree/master>`__. It is a software that executes
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the bios components such as acpi and smbios tables directly through acpica
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bios interpreter (a freely available C based library written by Intel,
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`here <https://github.com/biosbits/bits/tree/master>`__. It is a software that
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executes the bios components such as acpi and smbios tables directly through
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acpica bios interpreter (a freely available C based library written by Intel,
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downloadable from https://acpica.org/ and is included with biosbits) without an
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operating system getting involved in between.
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operating system getting involved in between. Bios-bits has python integration
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with grub so actual routines that executes bios components can be written in
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python instead of bash-ish (grub's native scripting language).
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There are several advantages to directly testing the bios in a real physical
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machine or VM as opposed to indirectly discovering bios issues through the
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operating system. For one thing, the OSes tend to hide bios problems from the
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end user. The other is that we have more control of what we wanted to test
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and how by directly using acpica interpreter on top of the bios on a running
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system. More details on the inspiration for developing biosbits and its real
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life uses can be found in [#a]_ and [#b]_.
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machine or in a VM as opposed to indirectly discovering bios issues through the
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operating system (the OS). Operating systems tend to bypass bios problems and
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hide them from the end user. We have more control of what we wanted to test and
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how by being as close to the bios on a running system as possible without a
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complicated software component such as an operating system coming in between.
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Another issue is that we cannot exercise bios components such as ACPI and
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SMBIOS without being in the highest hardware privilege level, ring 0 for
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example in case of x86. Since the OS executes from ring 0 whereas normal user
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land software resides in unprivileged ring 3, operating system must be modified
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in order to write our test routines that exercise and test the bios. This is
|
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not possible in all cases. Lastly, test frameworks and routines are preferably
|
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written using a high level scripting language such as python. OSes and
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OS modules are generally written using low level languages such as C and
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low level assembly machine language. Writing test routines in a low level
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language makes things more cumbersome. These and other reasons makes using
|
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bios-bits very attractive for testing bioses. More details on the inspiration
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for developing biosbits and its real life uses can be found in [#a]_ and [#b]_.
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For QEMU, we maintain a fork of bios bits in gitlab along with all the
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dependent submodules here: https://gitlab.com/qemu-project/biosbits-bits
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dependent submodules `here <https://gitlab.com/qemu-project/biosbits-bits>`__.
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This fork contains numerous fixes, a newer acpica and changes specific to
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running this avocado QEMU tests using bits. The author of this document
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is the sole maintainer of the QEMU fork of bios bits repo.
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is the sole maintainer of the QEMU fork of bios bits repository. For more
|
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information, please see author's `FOSDEM talk on this bios-bits based test
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framework <https://fosdem.org/2024/schedule/event/fosdem-2024-2262-exercising-qemu-generated-acpi-smbios-tables-using-biosbits-from-within-a-guest-vm-/>`__.
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*********************************
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Description of the test framework
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*********************************
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Under the directory ``tests/avocado/``, ``acpi-bits.py`` is a QEMU avocado
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test that drives all this.
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|
|
@ -120,8 +142,9 @@ Under ``tests/avocado/`` as the root we have:
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(b) Add a SPDX license header.
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(c) Perform modifications to the test.
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Commits (a), (b) and (c) should go under separate commits so that the original
|
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test script and the changes we have made are separated and clear.
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Commits (a), (b) and (c) preferably should go under separate commits so that
|
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the original test script and the changes we have made are separated and
|
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clear. (a) and (b) can sometimes be combined into a single step.
|
||||
|
||||
The test framework will then use your modified test script to run the test.
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No further changes would be needed. Please check the logs to make sure that
|
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|
|
@ -141,4 +164,4 @@ References:
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|||
-----------
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||||
.. [#a] https://blog.linuxplumbersconf.org/2011/ocw/system/presentations/867/original/bits.pdf
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.. [#b] https://www.youtube.com/watch?v=36QIepyUuhg
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.. [#c] https://fosdem.org/2024/schedule/event/fosdem-2024-2262-exercising-qemu-generated-acpi-smbios-tables-using-biosbits-from-within-a-guest-vm-/
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|
|
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|
@ -114,7 +114,7 @@ static void ct3_build_cdat(CDATObject *cdat, Error **errp)
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static void ct3_load_cdat(CDATObject *cdat, Error **errp)
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{
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g_autofree CDATEntry *cdat_st = NULL;
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g_autofree char *buf = NULL;
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g_autofree uint8_t *buf = NULL;
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uint8_t sum = 0;
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int num_ent;
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int i = 0, ent = 1;
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@ -171,7 +171,7 @@ static void ct3_load_cdat(CDATObject *cdat, Error **errp)
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cdat_st[ent].base = hdr;
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cdat_st[ent].length = hdr->length;
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while (buf + i < (char *)cdat_st[ent].base + cdat_st[ent].length) {
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while (buf + i < (uint8_t *)cdat_st[ent].base + cdat_st[ent].length) {
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assert(i < file_size);
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sum += buf[i++];
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}
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|
|
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|||
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|
@ -46,12 +46,12 @@ static void ct3_build_cdat_entries_for_mr(CDATSubHeader **cdat_table,
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int dsmad_handle, MemoryRegion *mr,
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bool is_pmem, uint64_t dpa_base)
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||||
{
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g_autofree CDATDsmas *dsmas = NULL;
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g_autofree CDATDslbis *dslbis0 = NULL;
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||||
g_autofree CDATDslbis *dslbis1 = NULL;
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||||
g_autofree CDATDslbis *dslbis2 = NULL;
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g_autofree CDATDslbis *dslbis3 = NULL;
|
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g_autofree CDATDsemts *dsemts = NULL;
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CDATDsmas *dsmas;
|
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CDATDslbis *dslbis0;
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CDATDslbis *dslbis1;
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CDATDslbis *dslbis2;
|
||||
CDATDslbis *dslbis3;
|
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CDATDsemts *dsemts;
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|
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dsmas = g_malloc(sizeof(*dsmas));
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*dsmas = (CDATDsmas) {
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||||
|
|
@ -135,12 +135,12 @@ static void ct3_build_cdat_entries_for_mr(CDATSubHeader **cdat_table,
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|||
};
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/* Header always at start of structure */
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cdat_table[CT3_CDAT_DSMAS] = g_steal_pointer(&dsmas);
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cdat_table[CT3_CDAT_DSLBIS0] = g_steal_pointer(&dslbis0);
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cdat_table[CT3_CDAT_DSLBIS1] = g_steal_pointer(&dslbis1);
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cdat_table[CT3_CDAT_DSLBIS2] = g_steal_pointer(&dslbis2);
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cdat_table[CT3_CDAT_DSLBIS3] = g_steal_pointer(&dslbis3);
|
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cdat_table[CT3_CDAT_DSEMTS] = g_steal_pointer(&dsemts);
|
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cdat_table[CT3_CDAT_DSMAS] = (CDATSubHeader *)dsmas;
|
||||
cdat_table[CT3_CDAT_DSLBIS0] = (CDATSubHeader *)dslbis0;
|
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cdat_table[CT3_CDAT_DSLBIS1] = (CDATSubHeader *)dslbis1;
|
||||
cdat_table[CT3_CDAT_DSLBIS2] = (CDATSubHeader *)dslbis2;
|
||||
cdat_table[CT3_CDAT_DSLBIS3] = (CDATSubHeader *)dslbis3;
|
||||
cdat_table[CT3_CDAT_DSEMTS] = (CDATSubHeader *)dsemts;
|
||||
}
|
||||
|
||||
static int ct3_build_cdat_table(CDATSubHeader ***cdat_table, void *priv)
|
||||
|
|
|
|||
|
|
@ -192,8 +192,8 @@ enum {
|
|||
|
||||
static int build_cdat_table(CDATSubHeader ***cdat_table, void *priv)
|
||||
{
|
||||
g_autofree CDATSslbis *sslbis_latency = NULL;
|
||||
g_autofree CDATSslbis *sslbis_bandwidth = NULL;
|
||||
CDATSslbis *sslbis_latency;
|
||||
CDATSslbis *sslbis_bandwidth;
|
||||
CXLUpstreamPort *us = CXL_USP(priv);
|
||||
PCIBus *bus = &PCI_BRIDGE(us)->sec_bus;
|
||||
int devfn, sslbis_size, i;
|
||||
|
|
@ -270,8 +270,8 @@ static int build_cdat_table(CDATSubHeader ***cdat_table, void *priv)
|
|||
*cdat_table = g_new0(CDATSubHeader *, CXL_USP_CDAT_NUM_ENTRIES);
|
||||
|
||||
/* Header always at start of structure */
|
||||
(*cdat_table)[CXL_USP_CDAT_SSLBIS_LAT] = g_steal_pointer(&sslbis_latency);
|
||||
(*cdat_table)[CXL_USP_CDAT_SSLBIS_BW] = g_steal_pointer(&sslbis_bandwidth);
|
||||
(*cdat_table)[CXL_USP_CDAT_SSLBIS_LAT] = (CDATSubHeader *)sslbis_latency;
|
||||
(*cdat_table)[CXL_USP_CDAT_SSLBIS_BW] = (CDATSubHeader *)sslbis_bandwidth;
|
||||
|
||||
return CXL_USP_CDAT_NUM_ENTRIES;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -227,7 +227,7 @@ struct LSIState {
|
|||
AddressSpace pci_io_as;
|
||||
QEMUTimer *scripts_timer;
|
||||
|
||||
int carry; /* ??? Should this be an a visible register somewhere? */
|
||||
int carry; /* ??? Should this be in a visible register somewhere? */
|
||||
int status;
|
||||
int msg_action;
|
||||
int msg_len;
|
||||
|
|
|
|||
|
|
@ -2558,7 +2558,7 @@ static bool vfio_display_migration_needed(void *opaque)
|
|||
(vdev->ramfb_migrate == ON_OFF_AUTO_AUTO && vdev->enable_ramfb);
|
||||
}
|
||||
|
||||
const VMStateDescription vmstate_vfio_display = {
|
||||
static const VMStateDescription vmstate_vfio_display = {
|
||||
.name = "VFIOPCIDevice/VFIODisplay",
|
||||
.version_id = 1,
|
||||
.minimum_version_id = 1,
|
||||
|
|
@ -2570,7 +2570,7 @@ const VMStateDescription vmstate_vfio_display = {
|
|||
}
|
||||
};
|
||||
|
||||
const VMStateDescription vmstate_vfio_pci_config = {
|
||||
static const VMStateDescription vmstate_vfio_pci_config = {
|
||||
.name = "VFIOPCIDevice",
|
||||
.version_id = 1,
|
||||
.minimum_version_id = 1,
|
||||
|
|
|
|||
|
|
@ -82,7 +82,8 @@ typedef struct CDATDsmas {
|
|||
uint16_t reserved;
|
||||
uint64_t DPA_base;
|
||||
uint64_t DPA_length;
|
||||
} QEMU_PACKED CDATDsmas;
|
||||
} CDATDsmas;
|
||||
QEMU_BUILD_BUG_ON(sizeof(CDATDsmas) != 24);
|
||||
|
||||
/* Device Scoped Latency and Bandwidth Information Structure - CDAT Table 5 */
|
||||
typedef struct CDATDslbis {
|
||||
|
|
@ -95,7 +96,8 @@ typedef struct CDATDslbis {
|
|||
uint64_t entry_base_unit;
|
||||
uint16_t entry[3];
|
||||
uint16_t reserved2;
|
||||
} QEMU_PACKED CDATDslbis;
|
||||
} CDATDslbis;
|
||||
QEMU_BUILD_BUG_ON(sizeof(CDATDslbis) != 24);
|
||||
|
||||
/* Device Scoped Memory Side Cache Information Structure - CDAT Table 6 */
|
||||
typedef struct CDATDsmscis {
|
||||
|
|
@ -122,7 +124,8 @@ typedef struct CDATDsemts {
|
|||
uint16_t reserved;
|
||||
uint64_t DPA_offset;
|
||||
uint64_t DPA_length;
|
||||
} QEMU_PACKED CDATDsemts;
|
||||
} CDATDsemts;
|
||||
QEMU_BUILD_BUG_ON(sizeof(CDATDsemts) != 24);
|
||||
|
||||
/* Switch Scoped Latency and Bandwidth Information Structure - CDAT Table 9 */
|
||||
typedef struct CDATSslbisHeader {
|
||||
|
|
@ -130,7 +133,8 @@ typedef struct CDATSslbisHeader {
|
|||
uint8_t data_type;
|
||||
uint8_t reserved[3];
|
||||
uint64_t entry_base_unit;
|
||||
} QEMU_PACKED CDATSslbisHeader;
|
||||
} CDATSslbisHeader;
|
||||
QEMU_BUILD_BUG_ON(sizeof(CDATSslbisHeader) != 16);
|
||||
|
||||
#define CDAT_PORT_ID_USP 0x100
|
||||
/* Switch Scoped Latency and Bandwidth Entry - CDAT Table 10 */
|
||||
|
|
@ -139,12 +143,13 @@ typedef struct CDATSslbe {
|
|||
uint16_t port_y_id;
|
||||
uint16_t latency_bandwidth;
|
||||
uint16_t reserved;
|
||||
} QEMU_PACKED CDATSslbe;
|
||||
} CDATSslbe;
|
||||
QEMU_BUILD_BUG_ON(sizeof(CDATSslbe) != 8);
|
||||
|
||||
typedef struct CDATSslbis {
|
||||
CDATSslbisHeader sslbis_header;
|
||||
CDATSslbe sslbe[];
|
||||
} QEMU_PACKED CDATSslbis;
|
||||
} CDATSslbis;
|
||||
|
||||
typedef struct CDATEntry {
|
||||
void *base;
|
||||
|
|
|
|||
|
|
@ -23,9 +23,6 @@
|
|||
#define QERR_DEVICE_HAS_NO_MEDIUM \
|
||||
"Device '%s' has no medium"
|
||||
|
||||
#define QERR_DEVICE_IN_USE \
|
||||
"Device '%s' is in use"
|
||||
|
||||
#define QERR_DEVICE_NO_HOTPLUG \
|
||||
"Device '%s' does not support hotplugging"
|
||||
|
||||
|
|
|
|||
|
|
@ -511,7 +511,7 @@ void replay_add_blocker(const char *feature)
|
|||
{
|
||||
Error *reason = NULL;
|
||||
|
||||
error_setg(&reason, "Record/replay feature is not supported for '%s'",
|
||||
error_setg(&reason, "Record/replay is not supported with %s",
|
||||
feature);
|
||||
replay_blockers = g_slist_prepend(replay_blockers, reason);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -47,5 +47,5 @@ meson subprojects download $SUBPROJECTS
|
|||
CryptoPkg/Library/OpensslLib/openssl \
|
||||
MdeModulePkg/Library/BrotliCustomDecompressLib/brotli)
|
||||
popd
|
||||
tar --exclude=.git -cjf ${destination}.tar.bz2 ${destination}
|
||||
tar --exclude=.git -cJf ${destination}.tar.xz ${destination}
|
||||
rm -rf ${destination}
|
||||
|
|
|
|||
|
|
@ -1932,7 +1932,7 @@ static void qemu_apply_machine_options(QDict *qdict)
|
|||
}
|
||||
|
||||
if (current_machine->smp.cpus > 1) {
|
||||
replay_add_blocker("smp");
|
||||
replay_add_blocker("multiple CPUs");
|
||||
}
|
||||
}
|
||||
|
||||
|
|
|
|||
Loading…
Reference in a new issue