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irq: Privatize CPU_INTERRUPT_NMI.
This interrupt name is used by i386, CRIS, and MicroBlaze. Copy the name into each target. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
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@ -826,10 +826,6 @@ extern CPUState *cpu_single_env;
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/* First unused bit: 0x2000. */
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/* Temporary remapping from the generic names back to the previous
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cpu-specific names. These will be moved to target-foo/cpu.h next. */
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#define CPU_INTERRUPT_NMI CPU_INTERRUPT_TGT_EXT_3
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/* The set of all bits that should be masked when single-stepping. */
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#define CPU_INTERRUPT_SSTEP_MASK \
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(CPU_INTERRUPT_HARD \
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1
poison.h
1
poison.h
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@ -41,7 +41,6 @@
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#pragma GCC poison CPU_INTERRUPT_EXITTB
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#pragma GCC poison CPU_INTERRUPT_HALT
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#pragma GCC poison CPU_INTERRUPT_DEBUG
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#pragma GCC poison CPU_INTERRUPT_NMI
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#pragma GCC poison CPU_INTERRUPT_TGT_EXT_0
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#pragma GCC poison CPU_INTERRUPT_TGT_EXT_1
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#pragma GCC poison CPU_INTERRUPT_TGT_EXT_2
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@ -36,6 +36,9 @@
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#define EXCP_IRQ 4
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#define EXCP_BREAK 5
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/* CRIS-specific interrupt pending bits. */
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#define CPU_INTERRUPT_NMI CPU_INTERRUPT_TGT_EXT_3
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/* Register aliases. R0 - R15 */
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#define R_FP 8
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#define R_SP 14
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@ -468,6 +468,7 @@
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/* i386-specific interrupt pending bits. */
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#define CPU_INTERRUPT_SMI CPU_INTERRUPT_TGT_EXT_2
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#define CPU_INTERRUPT_NMI CPU_INTERRUPT_TGT_EXT_3
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#define CPU_INTERRUPT_MCE CPU_INTERRUPT_TGT_EXT_4
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#define CPU_INTERRUPT_VIRQ CPU_INTERRUPT_TGT_INT_0
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#define CPU_INTERRUPT_INIT CPU_INTERRUPT_TGT_INT_1
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@ -41,6 +41,9 @@ struct CPUMBState;
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#define EXCP_HW_BREAK 5
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#define EXCP_HW_EXCP 6
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/* MicroBlaze-specific interrupt pending bits. */
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#define CPU_INTERRUPT_NMI CPU_INTERRUPT_TGT_EXT_3
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/* Register aliases. R0 - R15 */
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#define R_SP 1
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#define SR_PC 0
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