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s390x/tcg: support flags for instructions
Storing flags for instructions allows us to efficiently verify certain properties at a central point. Examples might later be handling if AFP is disabled in CR0, we are not in problem state, or if vector instructions are disabled in CR0. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: David Hildenbrand <david@redhat.com> Message-Id: <20180927130303.12236-5-david@redhat.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
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@ -3,6 +3,8 @@
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*
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* C(OPC, NAME, FMT, FAC, I1, I2, P, W, OP, CC)
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* D(OPC, NAME, FMT, FAC, I1, I2, P, W, OP, CC, DATA)
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* E(OPC, NAME, FMT, FAC, I1, I2, P, W, OP, CC, DATA, FLAGS)
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* F(OPC, NAME, FMT, FAC, I1, I2, P, W, OP, CC, FLAGS)
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*
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* OPC = (op << 8) | op2 where op is the major, op2 the minor opcode
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* NAME = name of the opcode, used internally
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@ -15,6 +17,7 @@
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* OP = func op_xx does the bulk of the operation
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* CC = func cout_xx defines how cc should get set
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* DATA = immediate argument to op_xx function
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* FLAGS = categorize the type of instruction (e.g. for advanced checks)
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*
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* The helpers get called in order: I1, I2, P, OP, W, CC
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*/
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@ -1121,6 +1121,7 @@ typedef struct {
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struct DisasInsn {
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unsigned opc:16;
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unsigned flags:16;
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DisasFormat fmt:8;
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unsigned fac:8;
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unsigned spec:8;
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@ -5835,17 +5836,24 @@ static void in2_insn(DisasContext *s, DisasFields *f, DisasOps *o)
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search tree, rather than us having to post-process the table. */
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#define C(OPC, NM, FT, FC, I1, I2, P, W, OP, CC) \
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D(OPC, NM, FT, FC, I1, I2, P, W, OP, CC, 0)
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E(OPC, NM, FT, FC, I1, I2, P, W, OP, CC, 0, 0)
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#define D(OPC, NM, FT, FC, I1, I2, P, W, OP, CC, D) insn_ ## NM,
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#define D(OPC, NM, FT, FC, I1, I2, P, W, OP, CC, D) \
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E(OPC, NM, FT, FC, I1, I2, P, W, OP, CC, D, 0)
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#define F(OPC, NM, FT, FC, I1, I2, P, W, OP, CC, FL) \
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E(OPC, NM, FT, FC, I1, I2, P, W, OP, CC, 0, FL)
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#define E(OPC, NM, FT, FC, I1, I2, P, W, OP, CC, D, FL) insn_ ## NM,
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enum DisasInsnEnum {
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#include "insn-data.def"
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};
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#undef D
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#define D(OPC, NM, FT, FC, I1, I2, P, W, OP, CC, D) { \
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#undef E
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#define E(OPC, NM, FT, FC, I1, I2, P, W, OP, CC, D, FL) { \
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.opc = OPC, \
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.flags = FL, \
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.fmt = FMT_##FT, \
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.fac = FAC_##FC, \
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.spec = SPEC_in1_##I1 | SPEC_in2_##I2 | SPEC_prep_##P | SPEC_wout_##W, \
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@ -5916,8 +5924,8 @@ static const DisasInsn insn_info[] = {
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#include "insn-data.def"
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};
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#undef D
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#define D(OPC, NM, FT, FC, I1, I2, P, W, OP, CC, D) \
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#undef E
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#define E(OPC, NM, FT, FC, I1, I2, P, W, OP, CC, D, FL) \
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case OPC: return &insn_info[insn_ ## NM];
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static const DisasInsn *lookup_opc(uint16_t opc)
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@ -5929,6 +5937,8 @@ static const DisasInsn *lookup_opc(uint16_t opc)
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}
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}
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#undef F
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#undef E
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#undef D
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#undef C
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