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* lsi53c895a: fix assertion failure with invalid Block Move
* vga: fix assertion failure with 4- and 16-color modes * remove unnecessary assignment -----BEGIN PGP SIGNATURE----- iQFIBAABCAAyFiEE8TM4V0tmI4mGbHaCv/vSX3jHroMFAmYNKboUHHBib256aW5p QHJlZGhhdC5jb20ACgkQv/vSX3jHroNMDgf/Wgw+qNkNooAhEH1V5l0xdyiF4QQU stz4kcKdWkQB5dsVy8utC3nN2baRFPgj6Utr2e8FqzxGuY8qYL3olh8k1ygiFiFz joSOxAlBuRUOsJq90EJUyGeFykJ/F/neJ2n6VjOtKyry9c8PnInjmuNMFYsxeLow j1VF6defALut/8wvxPm5WmfFzS1Hv3I9k/GqKSlAjNpY2COlibshEoNFuZZtpfeI JnUL5oB+sICoZH2/mM5a9Nv2z0NCHAwKF7alXVjfHWvdaRQO6bLlraDmPXmh0ZMY MsoULMQaeZCtC0vfc8XJZj/C/s2iO14gfqA23/mfGCLalyo7l1yh4e6JyQ== =xDOl -----END PGP SIGNATURE----- Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging * lsi53c895a: fix assertion failure with invalid Block Move * vga: fix assertion failure with 4- and 16-color modes * remove unnecessary assignment # -----BEGIN PGP SIGNATURE----- # # iQFIBAABCAAyFiEE8TM4V0tmI4mGbHaCv/vSX3jHroMFAmYNKboUHHBib256aW5p # QHJlZGhhdC5jb20ACgkQv/vSX3jHroNMDgf/Wgw+qNkNooAhEH1V5l0xdyiF4QQU # stz4kcKdWkQB5dsVy8utC3nN2baRFPgj6Utr2e8FqzxGuY8qYL3olh8k1ygiFiFz # joSOxAlBuRUOsJq90EJUyGeFykJ/F/neJ2n6VjOtKyry9c8PnInjmuNMFYsxeLow # j1VF6defALut/8wvxPm5WmfFzS1Hv3I9k/GqKSlAjNpY2COlibshEoNFuZZtpfeI # JnUL5oB+sICoZH2/mM5a9Nv2z0NCHAwKF7alXVjfHWvdaRQO6bLlraDmPXmh0ZMY # MsoULMQaeZCtC0vfc8XJZj/C/s2iO14gfqA23/mfGCLalyo7l1yh4e6JyQ== # =xDOl # -----END PGP SIGNATURE----- # gpg: Signature made Wed 03 Apr 2024 11:04:42 BST # gpg: using RSA key F13338574B662389866C7682BFFBD25F78C7AE83 # gpg: issuer "pbonzini@redhat.com" # gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [full] # gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" [full] # Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4 E2F7 7E15 100C CD36 69B1 # Subkey fingerprint: F133 3857 4B66 2389 866C 7682 BFFB D25F 78C7 AE83 * tag 'for-upstream' of https://gitlab.com/bonzini/qemu: pc_q35: remove unnecessary m->alias assignment lsi53c895a: avoid out of bounds access to s->msg[] vga: do not treat horiz pel panning value of 8 as "enabled" vga: adjust dirty memory region if pel panning is active vga: move computation of dirty memory region later vga: merge conditionals on shift control register Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Peter Maydell
commit
786fd793b8
146
hw/display/vga.c
146
hw/display/vga.c
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@ -1501,31 +1501,6 @@ static void vga_draw_graphic(VGACommonState *s, int full_update)
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disp_width = width;
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depth = s->get_bpp(s);
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region_start = (s->params.start_addr * 4);
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region_end = region_start + (ram_addr_t)s->params.line_offset * height;
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region_end += width * depth / 8; /* scanline length */
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region_end -= s->params.line_offset;
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if (region_end > s->vbe_size || depth == 0 || depth == 15) {
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/*
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* We land here on:
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* - wraps around (can happen with cirrus vbe modes)
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* - depth == 0 (256 color palette video mode)
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* - depth == 15
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*
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* Take the safe and slow route:
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* - create a dirty bitmap snapshot for all vga memory.
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* - force shadowing (so all vga memory access goes
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* through vga_read_*() helpers).
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*
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* Given this affects only vga features which are pretty much
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* unused by modern guests there should be no performance
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* impact.
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*/
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region_start = 0;
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region_end = s->vbe_size;
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force_shadow = true;
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}
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/* bits 5-6: 0 = 16-color mode, 1 = 4-color mode, 2 = 256-color mode. */
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shift_control = (s->gr[VGA_GFX_MODE] >> 5) & 3;
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double_scan = (s->cr[VGA_CRTC_MAX_SCAN] >> 7);
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@ -1546,13 +1521,86 @@ static void vga_draw_graphic(VGACommonState *s, int full_update)
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}
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if (shift_control == 0) {
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full_update |= update_palette16(s);
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if (sr(s, VGA_SEQ_CLOCK_MODE) & 8) {
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disp_width <<= 1;
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v = VGA_DRAW_LINE4D2;
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} else {
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v = VGA_DRAW_LINE4;
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}
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bits = 4;
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} else if (shift_control == 1) {
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full_update |= update_palette16(s);
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if (sr(s, VGA_SEQ_CLOCK_MODE) & 8) {
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disp_width <<= 1;
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v = VGA_DRAW_LINE2D2;
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} else {
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v = VGA_DRAW_LINE2;
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}
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bits = 4;
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} else {
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switch (depth) {
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default:
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case 0:
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full_update |= update_palette256(s);
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v = VGA_DRAW_LINE8D2;
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bits = 4;
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break;
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case 8:
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full_update |= update_palette256(s);
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v = VGA_DRAW_LINE8;
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bits = 8;
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break;
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case 15:
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v = s->big_endian_fb ? VGA_DRAW_LINE15_BE : VGA_DRAW_LINE15_LE;
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bits = 16;
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break;
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case 16:
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v = s->big_endian_fb ? VGA_DRAW_LINE16_BE : VGA_DRAW_LINE16_LE;
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bits = 16;
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break;
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case 24:
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v = s->big_endian_fb ? VGA_DRAW_LINE24_BE : VGA_DRAW_LINE24_LE;
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bits = 24;
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break;
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case 32:
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v = s->big_endian_fb ? VGA_DRAW_LINE32_BE : VGA_DRAW_LINE32_LE;
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bits = 32;
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break;
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}
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}
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/* Horizontal pel panning bit 3 is only used in text mode. */
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hpel = bits <= 8 ? s->params.hpel & 7 : 0;
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region_start = (s->params.start_addr * 4);
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region_end = region_start + (ram_addr_t)s->params.line_offset * height;
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region_end += width * depth / 8; /* scanline length */
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region_end -= s->params.line_offset;
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if (hpel) {
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region_end += 4;
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}
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if (region_end > s->vbe_size || depth == 0 || depth == 15) {
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/*
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* We land here on:
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* - wraps around (can happen with cirrus vbe modes)
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* - depth == 0 (256 color palette video mode)
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* - depth == 15
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*
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* Take the safe and slow route:
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* - create a dirty bitmap snapshot for all vga memory.
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* - force shadowing (so all vga memory access goes
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* through vga_read_*() helpers).
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*
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* Given this affects only vga features which are pretty much
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* unused by modern guests there should be no performance
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* impact.
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*/
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region_start = 0;
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region_end = s->vbe_size;
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force_shadow = true;
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}
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/*
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@ -1607,53 +1655,6 @@ static void vga_draw_graphic(VGACommonState *s, int full_update)
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}
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}
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if (shift_control == 0) {
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full_update |= update_palette16(s);
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if (sr(s, VGA_SEQ_CLOCK_MODE) & 8) {
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v = VGA_DRAW_LINE4D2;
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} else {
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v = VGA_DRAW_LINE4;
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}
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bits = 4;
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} else if (shift_control == 1) {
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full_update |= update_palette16(s);
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if (sr(s, VGA_SEQ_CLOCK_MODE) & 8) {
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v = VGA_DRAW_LINE2D2;
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} else {
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v = VGA_DRAW_LINE2;
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}
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bits = 4;
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} else {
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switch(s->get_bpp(s)) {
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default:
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case 0:
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full_update |= update_palette256(s);
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v = VGA_DRAW_LINE8D2;
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bits = 4;
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break;
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case 8:
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full_update |= update_palette256(s);
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v = VGA_DRAW_LINE8;
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bits = 8;
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break;
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case 15:
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v = s->big_endian_fb ? VGA_DRAW_LINE15_BE : VGA_DRAW_LINE15_LE;
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bits = 16;
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break;
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case 16:
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v = s->big_endian_fb ? VGA_DRAW_LINE16_BE : VGA_DRAW_LINE16_LE;
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bits = 16;
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break;
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case 24:
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v = s->big_endian_fb ? VGA_DRAW_LINE24_BE : VGA_DRAW_LINE24_LE;
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bits = 24;
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break;
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case 32:
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v = s->big_endian_fb ? VGA_DRAW_LINE32_BE : VGA_DRAW_LINE32_LE;
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bits = 32;
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break;
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}
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}
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vga_draw_line = vga_draw_line_table[v];
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if (!is_buffer_shared(surface) && s->cursor_invalidate) {
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@ -1665,7 +1666,6 @@ static void vga_draw_graphic(VGACommonState *s, int full_update)
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width, height, v, line_offset, s->cr[9], s->cr[VGA_CRTC_MODE],
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s->params.line_compare, sr(s, VGA_SEQ_CLOCK_MODE));
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#endif
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hpel = bits <= 8 ? s->params.hpel : 0;
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addr1 = (s->params.start_addr * 4);
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bwidth = DIV_ROUND_UP(width * bits, 8);
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if (hpel) {
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@ -393,7 +393,6 @@ static void pc_q35_8_1_machine_options(MachineClass *m)
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{
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PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
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pc_q35_8_2_machine_options(m);
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m->alias = NULL;
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pcmc->broken_32bit_mem_addr_check = true;
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compat_props_add(m->compat_props, hw_compat_8_1, hw_compat_8_1_len);
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compat_props_add(m->compat_props, pc_compat_8_1, pc_compat_8_1_len);
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@ -927,13 +927,18 @@ static void lsi_do_msgin(LSIState *s)
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assert(len > 0 && len <= LSI_MAX_MSGIN_LEN);
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if (len > s->dbc)
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len = s->dbc;
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pci_dma_write(PCI_DEVICE(s), s->dnad, s->msg, len);
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/* Linux drivers rely on the last byte being in the SIDL. */
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s->sidl = s->msg[len - 1];
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s->msg_len -= len;
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if (s->msg_len) {
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memmove(s->msg, s->msg + len, s->msg_len);
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} else {
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if (len) {
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pci_dma_write(PCI_DEVICE(s), s->dnad, s->msg, len);
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/* Linux drivers rely on the last byte being in the SIDL. */
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s->sidl = s->msg[len - 1];
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s->msg_len -= len;
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if (s->msg_len) {
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memmove(s->msg, s->msg + len, s->msg_len);
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}
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}
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if (!s->msg_len) {
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/* ??? Check if ATN (not yet implemented) is asserted and maybe
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switch to PHASE_MO. */
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switch (s->msg_action) {
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