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target-s390x: basic PER event handling

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This patch add basic support to generate PER exceptions. It adds two
fields to the cpu structure to record for the PER address and PER
code & ATMID values. When an exception is triggered and a PER event is
pending, the two PER values are copied to the lowcore area.

At the end of an instruction, an helper is checking for a possible
pending PER event and triggers an exception in that case. For that to
work with branches, we need to disable TB chaining when PER is
activated. Fortunately it's already in the TB flags.

Finally in case of a SERVICE CALL exception, we need to trigger the PER
exception immediately after.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Alexander Graf <agraf@suse.de>
This commit is contained in:
Aurelien Jarno 2015-06-13 00:45:56 +02:00 committed by Alexander Graf
parent d453d10383
commit 777c98c32c
5 changed files with 71 additions and 20 deletions
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3
target-s390x/cpu.h
View file

@ -111,6 +111,9 @@ typedef struct CPUS390XState {
uint32_t int_svc_code;
uint32_t int_svc_ilen;
uint64_t per_address;
uint16_t per_perc_atmid;
uint64_t cregs[16]; /* control registers */
ExtQueue ext_queue[MAX_EXT_QUEUE];

54
target-s390x/helper.c
View file

@ -250,25 +250,6 @@ void do_restart_interrupt(CPUS390XState *env)
load_psw(env, mask, addr);
}
static void do_svc_interrupt(CPUS390XState *env)
{
uint64_t mask, addr;
LowCore *lowcore;
lowcore = cpu_map_lowcore(env);
lowcore->svc_code = cpu_to_be16(env->int_svc_code);
lowcore->svc_ilen = cpu_to_be16(env->int_svc_ilen);
lowcore->svc_old_psw.mask = cpu_to_be64(get_psw_mask(env));
lowcore->svc_old_psw.addr = cpu_to_be64(env->psw.addr + env->int_svc_ilen);
mask = be64_to_cpu(lowcore->svc_new_psw.mask);
addr = be64_to_cpu(lowcore->svc_new_psw.addr);
cpu_unmap_lowcore(lowcore);
load_psw(env, mask, addr);
}
static void do_program_interrupt(CPUS390XState *env)
{
uint64_t mask, addr;
@ -292,6 +273,14 @@ static void do_program_interrupt(CPUS390XState *env)
lowcore = cpu_map_lowcore(env);
/* Signal PER events with the exception. */
if (env->per_perc_atmid) {
env->int_pgm_code |= PGM_PER;
lowcore->per_address = cpu_to_be64(env->per_address);
lowcore->per_perc_atmid = cpu_to_be16(env->per_perc_atmid);
env->per_perc_atmid = 0;
}
lowcore->pgm_ilen = cpu_to_be16(ilen);
lowcore->pgm_code = cpu_to_be16(env->int_pgm_code);
lowcore->program_old_psw.mask = cpu_to_be64(get_psw_mask(env));
@ -308,6 +297,33 @@ static void do_program_interrupt(CPUS390XState *env)
load_psw(env, mask, addr);
}
static void do_svc_interrupt(CPUS390XState *env)
{
uint64_t mask, addr;
LowCore *lowcore;
lowcore = cpu_map_lowcore(env);
lowcore->svc_code = cpu_to_be16(env->int_svc_code);
lowcore->svc_ilen = cpu_to_be16(env->int_svc_ilen);
lowcore->svc_old_psw.mask = cpu_to_be64(get_psw_mask(env));
lowcore->svc_old_psw.addr = cpu_to_be64(env->psw.addr + env->int_svc_ilen);
mask = be64_to_cpu(lowcore->svc_new_psw.mask);
addr = be64_to_cpu(lowcore->svc_new_psw.addr);
cpu_unmap_lowcore(lowcore);
load_psw(env, mask, addr);
/* When a PER event is pending, the PER exception has to happen
immediately after the SERVICE CALL one. */
if (env->per_perc_atmid) {
env->int_pgm_code = PGM_PER;
env->int_pgm_ilen = env->int_svc_ilen;
do_program_interrupt(env);
}
}
#define VIRTIO_SUBCODE_64 0x0D00
static void do_ext_interrupt(CPUS390XState *env)

1
target-s390x/helper.h
View file

@ -116,6 +116,7 @@ DEF_HELPER_FLAGS_2(lura, TCG_CALL_NO_WG, i64, env, i64)
DEF_HELPER_FLAGS_2(lurag, TCG_CALL_NO_WG, i64, env, i64)
DEF_HELPER_FLAGS_3(stura, TCG_CALL_NO_WG, void, env, i64, i64)
DEF_HELPER_FLAGS_3(sturg, TCG_CALL_NO_WG, void, env, i64, i64)
DEF_HELPER_1(per_check_exception, void, env)
DEF_HELPER_2(xsch, void, env, i64)
DEF_HELPER_2(csch, void, env, i64)

15
target-s390x/misc_helper.c
View file

@ -594,3 +594,18 @@ void HELPER(chsc)(CPUS390XState *env, uint64_t inst)
ioinst_handle_chsc(cpu, inst >> 16);
}
#endif
#ifndef CONFIG_USER_ONLY
void HELPER(per_check_exception)(CPUS390XState *env)
{
CPUState *cs = CPU(s390_env_get_cpu(env));
if (env->per_perc_atmid) {
env->int_pgm_code = PGM_PER;
env->int_pgm_ilen = get_ilen(cpu_ldub_code(env, env->per_address));
cs->exception_index = EXCP_PGM;
cpu_loop_exit(cs);
}
}
#endif

18
target-s390x/translate.c
View file

@ -568,7 +568,8 @@ static int use_goto_tb(DisasContext *s, uint64_t dest)
return (((dest & TARGET_PAGE_MASK) == (s->tb->pc & TARGET_PAGE_MASK)
|| (dest & TARGET_PAGE_MASK) == ((s->pc - 1) & TARGET_PAGE_MASK))
&& !s->singlestep_enabled
&& !(s->tb->cflags & CF_LAST_IO));
&& !(s->tb->cflags & CF_LAST_IO)
&& !(s->tb->flags & FLAG_MASK_PER));
}
static void account_noninline_branch(DisasContext *s, int cc_op)
@ -5234,6 +5235,21 @@ static ExitStatus translate_one(CPUS390XState *env, DisasContext *s)
tcg_temp_free_i64(o.addr1);
}
#ifndef CONFIG_USER_ONLY
if (s->tb->flags & FLAG_MASK_PER) {
/* An exception might be triggered, save PSW if not already done. */
if (ret == NO_EXIT || ret == EXIT_PC_STALE) {
tcg_gen_movi_i64(psw_addr, s->next_pc);
}
/* Save off cc. */
update_cc_op(s);
/* Call the helper to check for a possible PER exception. */
gen_helper_per_check_exception(cpu_env);
}
#endif
/* Advance to the next instruction. */
s->pc = s->next_pc;
return ret;