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https://gitlab.com/qemu-project/qemu
synced 2024-09-06 18:05:37 +00:00
Add save/restore support to the LSI logic SCSI device model.
This patch requires "Handle BH's queued by AIO completions in qemu_aio_flush()" to work reliably. The combination of those two patches survived 300+ migrations with heavy IO load running in the guest. Signed-off-by: Nolan Leake <nolan <at> sigbus.net> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
This commit is contained in:
parent
6e5d97d01d
commit
777aec7ac9
172
hw/lsi53c895a.c
172
hw/lsi53c895a.c
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@ -10,6 +10,8 @@
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/* ??? Need to check if the {read,write}[wl] routines work properly on
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big-endian targets. */
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#include <assert.h> \
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#include "hw.h"
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#include "pci.h"
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#include "scsi-disk.h"
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@ -1981,6 +1983,174 @@ void lsi_scsi_attach(DeviceState *host, BlockDriverState *bd, int id)
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bd->private = &s->pci_dev;
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}
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static void lsi_scsi_save(QEMUFile *f, void *opaque)
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{
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LSIState *s = opaque;
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assert(s->dma_buf == NULL);
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assert(s->current_dma_len == 0);
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assert(s->active_commands == 0);
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pci_device_save(&s->pci_dev, f);
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qemu_put_sbe32s(f, &s->carry);
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qemu_put_sbe32s(f, &s->sense);
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qemu_put_sbe32s(f, &s->msg_action);
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qemu_put_sbe32s(f, &s->msg_len);
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qemu_put_buffer(f, s->msg, sizeof (s->msg));
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qemu_put_sbe32s(f, &s->waiting);
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qemu_put_be32s(f, &s->dsa);
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qemu_put_be32s(f, &s->temp);
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qemu_put_be32s(f, &s->dnad);
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qemu_put_be32s(f, &s->dbc);
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qemu_put_8s(f, &s->istat0);
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qemu_put_8s(f, &s->istat1);
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qemu_put_8s(f, &s->dcmd);
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qemu_put_8s(f, &s->dstat);
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qemu_put_8s(f, &s->dien);
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qemu_put_8s(f, &s->sist0);
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qemu_put_8s(f, &s->sist1);
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qemu_put_8s(f, &s->sien0);
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qemu_put_8s(f, &s->sien1);
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qemu_put_8s(f, &s->mbox0);
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qemu_put_8s(f, &s->mbox1);
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qemu_put_8s(f, &s->dfifo);
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qemu_put_8s(f, &s->ctest2);
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qemu_put_8s(f, &s->ctest3);
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qemu_put_8s(f, &s->ctest4);
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qemu_put_8s(f, &s->ctest5);
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qemu_put_8s(f, &s->ccntl0);
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qemu_put_8s(f, &s->ccntl1);
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qemu_put_be32s(f, &s->dsp);
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qemu_put_be32s(f, &s->dsps);
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qemu_put_8s(f, &s->dmode);
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qemu_put_8s(f, &s->dcntl);
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qemu_put_8s(f, &s->scntl0);
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qemu_put_8s(f, &s->scntl1);
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qemu_put_8s(f, &s->scntl2);
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qemu_put_8s(f, &s->scntl3);
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qemu_put_8s(f, &s->sstat0);
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qemu_put_8s(f, &s->sstat1);
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qemu_put_8s(f, &s->scid);
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qemu_put_8s(f, &s->sxfer);
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qemu_put_8s(f, &s->socl);
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qemu_put_8s(f, &s->sdid);
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qemu_put_8s(f, &s->ssid);
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qemu_put_8s(f, &s->sfbr);
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qemu_put_8s(f, &s->stest1);
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qemu_put_8s(f, &s->stest2);
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qemu_put_8s(f, &s->stest3);
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qemu_put_8s(f, &s->sidl);
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qemu_put_8s(f, &s->stime0);
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qemu_put_8s(f, &s->respid0);
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qemu_put_8s(f, &s->respid1);
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qemu_put_be32s(f, &s->mmrs);
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qemu_put_be32s(f, &s->mmws);
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qemu_put_be32s(f, &s->sfs);
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qemu_put_be32s(f, &s->drs);
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qemu_put_be32s(f, &s->sbms);
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qemu_put_be32s(f, &s->dbms);
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qemu_put_be32s(f, &s->dnad64);
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qemu_put_be32s(f, &s->pmjad1);
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qemu_put_be32s(f, &s->pmjad2);
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qemu_put_be32s(f, &s->rbc);
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qemu_put_be32s(f, &s->ua);
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qemu_put_be32s(f, &s->ia);
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qemu_put_be32s(f, &s->sbc);
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qemu_put_be32s(f, &s->csbc);
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qemu_put_buffer(f, (uint8_t *)s->scratch, sizeof (s->scratch));
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qemu_put_8s(f, &s->sbr);
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qemu_put_buffer(f, (uint8_t *)s->script_ram, sizeof (s->script_ram));
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}
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static int lsi_scsi_load(QEMUFile *f, void *opaque, int version_id)
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{
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LSIState *s = opaque;
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int ret;
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if (version_id > 0) {
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return -EINVAL;
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}
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if ((ret = pci_device_load(&s->pci_dev, f)) < 0)
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return ret;
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qemu_get_sbe32s(f, &s->carry);
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qemu_get_sbe32s(f, &s->sense);
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qemu_get_sbe32s(f, &s->msg_action);
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qemu_get_sbe32s(f, &s->msg_len);
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qemu_get_buffer(f, s->msg, sizeof (s->msg));
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qemu_get_sbe32s(f, &s->waiting);
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qemu_get_be32s(f, &s->dsa);
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qemu_get_be32s(f, &s->temp);
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qemu_get_be32s(f, &s->dnad);
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qemu_get_be32s(f, &s->dbc);
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qemu_get_8s(f, &s->istat0);
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qemu_get_8s(f, &s->istat1);
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qemu_get_8s(f, &s->dcmd);
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qemu_get_8s(f, &s->dstat);
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qemu_get_8s(f, &s->dien);
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qemu_get_8s(f, &s->sist0);
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qemu_get_8s(f, &s->sist1);
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qemu_get_8s(f, &s->sien0);
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qemu_get_8s(f, &s->sien1);
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qemu_get_8s(f, &s->mbox0);
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qemu_get_8s(f, &s->mbox1);
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qemu_get_8s(f, &s->dfifo);
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qemu_get_8s(f, &s->ctest2);
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qemu_get_8s(f, &s->ctest3);
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qemu_get_8s(f, &s->ctest4);
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qemu_get_8s(f, &s->ctest5);
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qemu_get_8s(f, &s->ccntl0);
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qemu_get_8s(f, &s->ccntl1);
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qemu_get_be32s(f, &s->dsp);
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qemu_get_be32s(f, &s->dsps);
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qemu_get_8s(f, &s->dmode);
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qemu_get_8s(f, &s->dcntl);
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qemu_get_8s(f, &s->scntl0);
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qemu_get_8s(f, &s->scntl1);
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qemu_get_8s(f, &s->scntl2);
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qemu_get_8s(f, &s->scntl3);
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qemu_get_8s(f, &s->sstat0);
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qemu_get_8s(f, &s->sstat1);
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qemu_get_8s(f, &s->scid);
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qemu_get_8s(f, &s->sxfer);
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qemu_get_8s(f, &s->socl);
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qemu_get_8s(f, &s->sdid);
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qemu_get_8s(f, &s->ssid);
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qemu_get_8s(f, &s->sfbr);
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qemu_get_8s(f, &s->stest1);
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qemu_get_8s(f, &s->stest2);
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qemu_get_8s(f, &s->stest3);
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qemu_get_8s(f, &s->sidl);
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qemu_get_8s(f, &s->stime0);
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qemu_get_8s(f, &s->respid0);
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qemu_get_8s(f, &s->respid1);
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qemu_get_be32s(f, &s->mmrs);
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qemu_get_be32s(f, &s->mmws);
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qemu_get_be32s(f, &s->sfs);
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qemu_get_be32s(f, &s->drs);
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qemu_get_be32s(f, &s->sbms);
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qemu_get_be32s(f, &s->dbms);
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qemu_get_be32s(f, &s->dnad64);
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qemu_get_be32s(f, &s->pmjad1);
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qemu_get_be32s(f, &s->pmjad2);
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qemu_get_be32s(f, &s->rbc);
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qemu_get_be32s(f, &s->ua);
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qemu_get_be32s(f, &s->ia);
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qemu_get_be32s(f, &s->sbc);
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qemu_get_be32s(f, &s->csbc);
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qemu_get_buffer(f, (uint8_t *)s->scratch, sizeof (s->scratch));
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qemu_get_8s(f, &s->sbr);
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qemu_get_buffer(f, (uint8_t *)s->script_ram, sizeof (s->script_ram));
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return 0;
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}
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static int lsi_scsi_uninit(PCIDevice *d)
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{
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LSIState *s = (LSIState *) d;
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@ -2033,6 +2203,8 @@ static void lsi_scsi_init(PCIDevice *dev)
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lsi_soft_reset(s);
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scsi_bus_new(&dev->qdev, lsi_scsi_attach);
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register_savevm("lsiscsi", -1, 0, lsi_scsi_save, lsi_scsi_load, s);
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}
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static PCIDeviceInfo lsi_info = {
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