mirror of
https://gitlab.com/qemu-project/qemu
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Misc fixes for 8.2
* buildsys: Invoke bash via 'env' (Samuel) * doc: Fix example in s390-cpu-topology.rst (Zhao) * HW: Fix AVR ATMega reset stack (Gihun) and VT82C686 IRQ routing (Zoltan) -----BEGIN PGP SIGNATURE----- iQIzBAABCAAdFiEE+qvnXhKRciHc/Wuy4+MsLN6twN4FAmVl7MUACgkQ4+MsLN6t wN4nsQ//U7/GGrMaNJF369pC0UfC0dfD39RoD9jmmrWUQB17baMvXo+BMBcELX0Q BtgRjIYwnywnVZlB11JL5Ql9ykSRqd7VeqnZfH//GqQO+ySF7jl6ekNT6YNjUbWu iF9bU3o0/LAVl/3pe9LQ4q/yOjzERA5o4JKYviHZYcWE811/5lBNgER4iPyCz6a8 aGI3S5PGmq6a9x5266jkY2WWldDy7D1ujkuvxxc4tgnmbBjL21soJ/oRLOBjGTNl hCRfDTEiFZm7OxjV7oB03Nr3EGGStGdy0aPhhtFwzZxQ9yV7d2DLsbYGgwzZYkKQ 9v4DtGqYyvDA7LBmfxOrnzL0WXgN4xO3qekLqHDtChDzFFEYwtHvH0duPUiQv1Yu qHyOsfB58rKzWHeo0ACEjMWGdD1opCXCeoJlEf/saiQ5EgyBwph/z2mWYN4yak5H Zu3xF15BcnyavC6sVeuE+rT574dhCzOtH8Vf3WVwqfL5D5cyCjHlmPSAXXMqBkmh BMOD8O210n6IdzuuOQ038t3yGvIc0YysOmQgfLjRYlZa884q3wExgrufH+NYbGMj bFthPjLKgHm+q4k2mH65G98xwXQFT6rdHanw2iEJcPJbhhk9SNWYgaQ0r0Oi2Pfd zCQ22F1j9UqGcqKh+8tzAfjayRyQUJtgizPXEWanADkpIDYxrRk= =323/ -----END PGP SIGNATURE----- Merge tag 'misc-next-20231128' of https://github.com/philmd/qemu into staging Misc fixes for 8.2 * buildsys: Invoke bash via 'env' (Samuel) * doc: Fix example in s390-cpu-topology.rst (Zhao) * HW: Fix AVR ATMega reset stack (Gihun) and VT82C686 IRQ routing (Zoltan) # -----BEGIN PGP SIGNATURE----- # # iQIzBAABCAAdFiEE+qvnXhKRciHc/Wuy4+MsLN6twN4FAmVl7MUACgkQ4+MsLN6t # wN4nsQ//U7/GGrMaNJF369pC0UfC0dfD39RoD9jmmrWUQB17baMvXo+BMBcELX0Q # BtgRjIYwnywnVZlB11JL5Ql9ykSRqd7VeqnZfH//GqQO+ySF7jl6ekNT6YNjUbWu # iF9bU3o0/LAVl/3pe9LQ4q/yOjzERA5o4JKYviHZYcWE811/5lBNgER4iPyCz6a8 # aGI3S5PGmq6a9x5266jkY2WWldDy7D1ujkuvxxc4tgnmbBjL21soJ/oRLOBjGTNl # hCRfDTEiFZm7OxjV7oB03Nr3EGGStGdy0aPhhtFwzZxQ9yV7d2DLsbYGgwzZYkKQ # 9v4DtGqYyvDA7LBmfxOrnzL0WXgN4xO3qekLqHDtChDzFFEYwtHvH0duPUiQv1Yu # qHyOsfB58rKzWHeo0ACEjMWGdD1opCXCeoJlEf/saiQ5EgyBwph/z2mWYN4yak5H # Zu3xF15BcnyavC6sVeuE+rT574dhCzOtH8Vf3WVwqfL5D5cyCjHlmPSAXXMqBkmh # BMOD8O210n6IdzuuOQ038t3yGvIc0YysOmQgfLjRYlZa884q3wExgrufH+NYbGMj # bFthPjLKgHm+q4k2mH65G98xwXQFT6rdHanw2iEJcPJbhhk9SNWYgaQ0r0Oi2Pfd # zCQ22F1j9UqGcqKh+8tzAfjayRyQUJtgizPXEWanADkpIDYxrRk= # =323/ # -----END PGP SIGNATURE----- # gpg: Signature made Tue 28 Nov 2023 08:36:05 EST # gpg: using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE # gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [full] # Primary key fingerprint: FAAB E75E 1291 7221 DCFD 6BB2 E3E3 2C2C DEAD C0DE * tag 'misc-next-20231128' of https://github.com/philmd/qemu: docs/s390: Fix wrong command example in s390-cpu-topology.rst hw/avr/atmega: Fix wrong initial value of stack pointer hw/audio/via-ac97: Route interrupts using via_isa_set_irq() hw/isa/vt82c686: Route PIRQ inputs using via_isa_set_irq() hw/usb/vt82c686-uhci-pci: Use ISA instead of PCI interrupts hw/isa/vt82c686: Bring back via_isa_set_irq() target/hexagon/idef-parser/prepare: use env to invoke bash Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
This commit is contained in:
commit
745c2911cc
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@ -15,7 +15,7 @@ have default values:
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-smp 1,drawers=3,books=3,sockets=2,cores=2,maxcpus=36 \
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-device z14-s390x-cpu,core-id=19,entitlement=high \
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-device z14-s390x-cpu,core-id=11,entitlement=low \
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-device z14-s390x-cpu,core-id=112,entitlement=high \
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-device z14-s390x-cpu,core-id=12,entitlement=high \
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...
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Additions to query-cpus-fast
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@ -78,7 +78,7 @@ modifiers for all configured vCPUs.
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"dedicated": true,
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"thread-id": 537005,
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"props": {
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"core-id": 112,
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"core-id": 12,
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"socket-id": 0,
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"drawer-id": 3,
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"book-id": 2
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@ -86,7 +86,7 @@ modifiers for all configured vCPUs.
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"cpu-state": "operating",
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"entitlement": "high",
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"qom-path": "/machine/peripheral-anon/device[2]",
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"cpu-index": 112,
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"cpu-index": 12,
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"target": "s390x"
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}
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]
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@ -211,14 +211,14 @@ static void out_cb(void *opaque, int avail)
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AUD_set_active_out(s->vo, 0);
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}
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if (c->type & STAT_EOL) {
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pci_set_irq(&s->dev, 1);
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via_isa_set_irq(&s->dev, 0, 1);
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}
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}
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if (CLEN_IS_FLAG(c)) {
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c->stat |= STAT_FLAG;
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c->stat |= STAT_PAUSED;
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if (c->type & STAT_FLAG) {
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pci_set_irq(&s->dev, 1);
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via_isa_set_irq(&s->dev, 0, 1);
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}
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}
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if (CLEN_IS_STOP(c)) {
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@ -305,13 +305,13 @@ static void sgd_write(void *opaque, hwaddr addr, uint64_t val, unsigned size)
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if (val & STAT_EOL) {
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s->aur.stat &= ~(STAT_EOL | STAT_PAUSED);
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if (s->aur.type & STAT_EOL) {
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pci_set_irq(&s->dev, 0);
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via_isa_set_irq(&s->dev, 0, 0);
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}
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}
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if (val & STAT_FLAG) {
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s->aur.stat &= ~(STAT_FLAG | STAT_PAUSED);
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if (s->aur.type & STAT_FLAG) {
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pci_set_irq(&s->dev, 0);
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via_isa_set_irq(&s->dev, 0, 0);
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}
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}
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break;
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@ -233,6 +233,10 @@ static void atmega_realize(DeviceState *dev, Error **errp)
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/* CPU */
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object_initialize_child(OBJECT(dev), "cpu", &s->cpu, mc->cpu_type);
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object_property_set_uint(OBJECT(&s->cpu), "init-sp",
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mc->io_size + mc->sram_size - 1, &error_abort);
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qdev_realize(DEVICE(&s->cpu), NULL, &error_abort);
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cpudev = DEVICE(&s->cpu);
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@ -549,6 +549,7 @@ struct ViaISAState {
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PCIDevice dev;
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qemu_irq cpu_intr;
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qemu_irq *isa_irqs_in;
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uint16_t irq_state[ISA_NUM_IRQS];
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ViaSuperIOState via_sio;
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MC146818RtcState rtc;
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PCIIDEState ide;
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@ -592,15 +593,9 @@ static const TypeInfo via_isa_info = {
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},
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};
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static void via_isa_request_i8259_irq(void *opaque, int irq, int level)
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static int via_isa_get_pci_irq(const ViaISAState *s, int pin)
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{
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ViaISAState *s = opaque;
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qemu_set_irq(s->cpu_intr, level);
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}
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static int via_isa_get_pci_irq(const ViaISAState *s, int irq_num)
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{
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switch (irq_num) {
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switch (pin) {
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case 0:
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return s->dev.config[0x55] >> 4;
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case 1:
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@ -613,29 +608,60 @@ static int via_isa_get_pci_irq(const ViaISAState *s, int irq_num)
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return 0;
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}
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static void via_isa_set_pci_irq(void *opaque, int irq_num, int level)
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void via_isa_set_irq(PCIDevice *d, int pin, int level)
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{
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ViaISAState *s = opaque;
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PCIBus *bus = pci_get_bus(&s->dev);
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int i, pic_level, pic_irq = via_isa_get_pci_irq(s, irq_num);
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ViaISAState *s = VIA_ISA(pci_get_function_0(d));
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uint8_t irq = d->config[PCI_INTERRUPT_LINE], max_irq = 15;
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int f = PCI_FUNC(d->devfn);
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uint16_t mask = BIT(f);
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/* IRQ 0: disabled, IRQ 2,8,13: reserved */
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if (!pic_irq) {
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switch (f) {
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case 0: /* PIRQ/PINT inputs */
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irq = via_isa_get_pci_irq(s, pin);
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f = 8 + pin; /* Use function 8-11 for PCI interrupt inputs */
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break;
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case 2: /* USB ports 0-1 */
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case 3: /* USB ports 2-3 */
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case 5: /* AC97 audio */
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max_irq = 14;
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break;
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}
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/* Keep track of the state of all sources */
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if (level) {
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s->irq_state[0] |= mask;
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} else {
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s->irq_state[0] &= ~mask;
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}
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if (irq == 0 || irq == 0xff) {
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return; /* disabled */
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}
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if (unlikely(irq > max_irq || irq == 2)) {
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qemu_log_mask(LOG_GUEST_ERROR, "Invalid ISA IRQ routing %d for %d",
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irq, f);
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return;
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}
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if (unlikely(pic_irq == 2 || pic_irq == 8 || pic_irq == 13)) {
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qemu_log_mask(LOG_GUEST_ERROR, "Invalid ISA IRQ routing");
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/* Record source state at mapped IRQ */
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if (level) {
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s->irq_state[irq] |= mask;
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} else {
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s->irq_state[irq] &= ~mask;
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}
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/* Make sure there are no stuck bits if mapping has changed */
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s->irq_state[irq] &= s->irq_state[0];
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/* ISA IRQ level is the OR of all sources routed to it */
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qemu_set_irq(s->isa_irqs_in[irq], !!s->irq_state[irq]);
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}
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/* The pic level is the logical OR of all the PCI irqs mapped to it. */
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pic_level = 0;
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for (i = 0; i < PCI_NUM_PINS; i++) {
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if (pic_irq == via_isa_get_pci_irq(s, i)) {
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pic_level |= pci_bus_get_irq_level(bus, i);
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}
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}
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/* Now we change the pic irq level according to the via irq mappings. */
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qemu_set_irq(s->isa_irqs_in[pic_irq], pic_level);
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static void via_isa_pirq(void *opaque, int pin, int level)
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{
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via_isa_set_irq(opaque, pin, level);
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}
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static void via_isa_request_i8259_irq(void *opaque, int irq, int level)
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{
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ViaISAState *s = opaque;
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qemu_set_irq(s->cpu_intr, level);
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}
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static void via_isa_realize(PCIDevice *d, Error **errp)
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int i;
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qdev_init_gpio_out(dev, &s->cpu_intr, 1);
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qdev_init_gpio_in_named(dev, via_isa_pirq, "pirq", PCI_NUM_PINS);
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isa_irq = qemu_allocate_irqs(via_isa_request_i8259_irq, s, 1);
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isa_bus = isa_bus_new(dev, pci_address_space(d), pci_address_space_io(d),
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errp);
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i8254_pit_init(isa_bus, 0x40, 0, NULL);
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i8257_dma_init(isa_bus, 0);
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qdev_init_gpio_in_named(dev, via_isa_set_pci_irq, "pirq", PCI_NUM_PINS);
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/* RTC */
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qdev_prop_set_int32(DEVICE(&s->rtc), "base_year", 2000);
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if (!qdev_realize(DEVICE(&s->rtc), BUS(isa_bus), errp)) {
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@ -1,7 +1,14 @@
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#include "qemu/osdep.h"
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#include "hw/irq.h"
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#include "hw/isa/vt82c686.h"
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#include "hcd-uhci.h"
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static void uhci_isa_set_irq(void *opaque, int irq_num, int level)
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{
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UHCIState *s = opaque;
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via_isa_set_irq(&s->dev, 0, level);
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}
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static void usb_uhci_vt82c686b_realize(PCIDevice *dev, Error **errp)
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{
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UHCIState *s = UHCI(dev);
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pci_set_long(pci_conf + 0xc0, 0x00002000);
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usb_uhci_common_realize(dev, errp);
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object_unref(s->irq);
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s->irq = qemu_allocate_irq(uhci_isa_set_irq, s, 0);
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}
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static UHCIInfo uhci_info[] = {
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@ -34,4 +34,6 @@ struct ViaAC97State {
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uint32_t ac97_cmd;
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};
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void via_isa_set_irq(PCIDevice *d, int n, int level);
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#endif
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@ -25,6 +25,7 @@
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#include "cpu.h"
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#include "disas/dis-asm.h"
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#include "tcg/debug-assert.h"
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#include "hw/qdev-properties.h"
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static void avr_cpu_set_pc(CPUState *cs, vaddr value)
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{
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@ -95,7 +96,7 @@ static void avr_cpu_reset_hold(Object *obj)
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env->rampY = 0;
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env->rampZ = 0;
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env->eind = 0;
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env->sp = 0;
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env->sp = cpu->init_sp;
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env->skip = 0;
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@ -152,6 +153,11 @@ static void avr_cpu_initfn(Object *obj)
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sizeof(cpu->env.intsrc) * 8);
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}
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static Property avr_cpu_properties[] = {
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DEFINE_PROP_UINT32("init-sp", AVRCPU, init_sp, 0),
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DEFINE_PROP_END_OF_LIST()
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};
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static ObjectClass *avr_cpu_class_by_name(const char *cpu_model)
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{
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ObjectClass *oc;
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@ -228,6 +234,8 @@ static void avr_cpu_class_init(ObjectClass *oc, void *data)
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device_class_set_parent_realize(dc, avr_cpu_realizefn, &mcc->parent_realize);
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device_class_set_props(dc, avr_cpu_properties);
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resettable_class_set_parent_phases(rc, NULL, avr_cpu_reset_hold, NULL,
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&mcc->parent_phases);
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@ -145,6 +145,9 @@ struct ArchCPU {
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CPUState parent_obj;
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CPUAVRState env;
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/* Initial value of stack pointer */
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uint32_t init_sp;
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};
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/**
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@ -1,4 +1,4 @@
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#!/bin/bash
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#!/usr/bin/env bash
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#
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# Copyright(c) 2019-2021 rev.ng Labs Srl. All Rights Reserved.
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