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target/mips/tx79: Introduce PPACW opcode (Parallel Pack to Word)

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Introduce the PPACW opcode (Parallel Pack to Word).

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20210214175912.732946-22-f4bug@amsat.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
This commit is contained in:
Philippe Mathieu-Daudé 2021-02-13 14:45:09 +01:00
parent 8bd42c00f2
commit 71c49f39b9
2 changed files with 31 additions and 0 deletions
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1
target/mips/tcg/tx79.decode
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@ -38,6 +38,7 @@ PCGTH 011100 ..... ..... ..... 00110 001000 @rs_rt_rd
PSUBB 011100 ..... ..... ..... 01001 001000 @rs_rt_rd
PCGTB 011100 ..... ..... ..... 01010 001000 @rs_rt_rd
PEXTLW 011100 ..... ..... ..... 10010 001000 @rs_rt_rd
PPACW 011100 ..... ..... ..... 10011 001000 @rs_rt_rd
PEXTLH 011100 ..... ..... ..... 10110 001000 @rs_rt_rd
PEXTLB 011100 ..... ..... ..... 11010 001000 @rs_rt_rd

30
target/mips/tcg/tx79_translate.c
View file

@ -374,6 +374,36 @@ static bool trans_PCEQW(DisasContext *ctx, arg_rtype *a)
* PEXTLW rd, rs, rt Parallel Extend Lower from Word
*/
/* Parallel Pack to Word */
static bool trans_PPACW(DisasContext *ctx, arg_rtype *a)
{
TCGv_i64 a0, b0, t0;
if (a->rd == 0) {
/* nop */
return true;
}
a0 = tcg_temp_new_i64();
b0 = tcg_temp_new_i64();
t0 = tcg_temp_new_i64();
gen_load_gpr(a0, a->rs);
gen_load_gpr(b0, a->rt);
gen_load_gpr_hi(t0, a->rt); /* b1 */
tcg_gen_deposit_i64(cpu_gpr[a->rd], b0, t0, 32, 32);
gen_load_gpr_hi(t0, a->rs); /* a1 */
tcg_gen_deposit_i64(cpu_gpr_hi[a->rd], a0, t0, 32, 32);
tcg_temp_free(t0);
tcg_temp_free(b0);
tcg_temp_free(a0);
return true;
}
static void gen_pextw(TCGv_i64 dl, TCGv_i64 dh, TCGv_i64 a, TCGv_i64 b)
{
tcg_gen_deposit_i64(dl, b, a, 32, 32);