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target/hppa: Fix PDC address translation on PA2.0 with PSW.W=0

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Fix the address translation for PDC space on PA2.0 if PSW.W=0.
Basically, for any address in the 32-bit PDC range from 0xf0000000 to
0xf1000000 keep the lower 32-bits and just set the upper 32-bits to
0xfffffff0.

This mapping fixes the emulated power button in PDC space for 32- and
64-bit machines and is how the physical C3700 machine seems to map
PDC.

Figures H-10 and H-11 in the parisc2.0 spec [1] show that the 32-bit
region will be mapped somewhere into a higher and bigger 64-bit PDC
space.  The start and end of this 64-bit space is defined by the
physical address bits. But the figures don't specifiy where exactly the
mapping will start inside that region. Tests on a real HP C3700
regarding the address of the power button indicate, that the lower
32-bits will stay the same though.
[1] https://parisc.wiki.kernel.org/images-parisc/7/73/Parisc2.0.pdf

Signed-off-by: Helge Deller <deller@gmx.de>
Tested-by: Bruno Haible <bruno@clisp.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
Helge Deller 2024-01-03 19:55:55 +01:00
parent 3b57c15f02
commit 6ce18d5306
2 changed files with 9 additions and 3 deletions
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2
roms/seabios-hppa

@ -1 +1 @@
Subproject commit 4c6ecda618f2066707f50c53f31419244fd7f77a
Subproject commit e4eac85880e8677f96d8b9e94de9f2eec9c0751f

10
target/hppa/mem_helper.c
View File

@ -55,8 +55,14 @@ hwaddr hppa_abs_to_phys_pa2_w0(vaddr addr)
/* I/O address space */
addr = (int32_t)addr;
} else {
/* PDC address space */
addr &= MAKE_64BIT_MASK(0, 24);
/*
* PDC address space:
* Figures H-10 and H-11 of the parisc2.0 spec do not specify
* where to map into the 64-bit PDC address space.
* We map with an offset which equals the 32-bit address, which
* is what can be seen on physical machines too.
*/
addr = (uint32_t)addr;
addr |= -1ull << (TARGET_PHYS_ADDR_SPACE_BITS - 4);
}
return addr;