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Move CPU softfloat unions to cpu-float.h

Browse Source 
The types are no longer used in bswap.h since commit
f930224fff ("bswap.h: Remove unused float-access functions"), there
isn't much sense in keeping it there and having a dependency on fpu/.

Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Message-Id: <20220323155743.1585078-29-marcandre.lureau@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
This commit is contained in:
Marc-André Lureau 2022-03-23 19:57:39 +04:00 committed by Paolo Bonzini
parent 4e40e89325
commit 69242e7e7e
18 changed files with 80 additions and 62 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

60
include/qemu/bswap.h
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@ -19,8 +19,6 @@
extern "C" {
#endif
#include "fpu/softfloat-types.h"
#ifdef BSWAP_FROM_BYTESWAP
static inline uint16_t bswap16(uint16_t x)
{
@ -202,64 +200,6 @@ CPU_CONVERT(le, 64, uint64_t)
# define const_le16(_x) (_x)
#endif
/* Unions for reinterpreting between floats and integers. */
typedef union {
float32 f;
uint32_t l;
} CPU_FloatU;
typedef union {
float64 d;
#if HOST_BIG_ENDIAN
struct {
uint32_t upper;
uint32_t lower;
} l;
#else
struct {
uint32_t lower;
uint32_t upper;
} l;
#endif
uint64_t ll;
} CPU_DoubleU;
typedef union {
floatx80 d;
struct {
uint64_t lower;
uint16_t upper;
} l;
} CPU_LDoubleU;
typedef union {
float128 q;
#if HOST_BIG_ENDIAN
struct {
uint32_t upmost;
uint32_t upper;
uint32_t lower;
uint32_t lowest;
} l;
struct {
uint64_t upper;
uint64_t lower;
} ll;
#else
struct {
uint32_t lowest;
uint32_t lower;
uint32_t upper;
uint32_t upmost;
} l;
struct {
uint64_t lower;
uint64_t upper;
} ll;
#endif
} CPU_QuadU;
/* unaligned/endian-independent pointer access */
/*

64
include/qemu/cpu-float.h Normal file
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@ -0,0 +1,64 @@
#ifndef QEMU_CPU_FLOAT_H_
#define QEMU_CPU_FLOAT_H_
#include "fpu/softfloat-types.h"
/* Unions for reinterpreting between floats and integers. */
typedef union {
float32 f;
uint32_t l;
} CPU_FloatU;
typedef union {
float64 d;
#if HOST_BIG_ENDIAN
struct {
uint32_t upper;
uint32_t lower;
} l;
#else
struct {
uint32_t lower;
uint32_t upper;
} l;
#endif
uint64_t ll;
} CPU_DoubleU;
typedef union {
floatx80 d;
struct {
uint64_t lower;
uint16_t upper;
} l;
} CPU_LDoubleU;
typedef union {
float128 q;
#if HOST_BIG_ENDIAN
struct {
uint32_t upmost;
uint32_t upper;
uint32_t lower;
uint32_t lowest;
} l;
struct {
uint64_t upper;
uint64_t lower;
} ll;
#else
struct {
uint32_t lowest;
uint32_t lower;
uint32_t upper;
uint32_t upmost;
} l;
struct {
uint64_t lower;
uint64_t upper;
} ll;
#endif
} CPU_QuadU;
#endif /* QEMU_CPU_FLOAT_H_ */

1
migration/vmstate-types.c
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@ -11,6 +11,7 @@
*/
#include "qemu/osdep.h"
#include "qemu/cpu-float.h"
#include "qemu-file.h"
#include "migration.h"
#include "migration/vmstate.h"

1
target/alpha/cpu.h
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@ -22,6 +22,7 @@
#include "cpu-qom.h"
#include "exec/cpu-defs.h"
#include "qemu/cpu-float.h"
/* Alpha processors have a weak memory model */
#define TCG_GUEST_DEFAULT_MO (0)

1
target/arm/cpu.h
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@ -21,6 +21,7 @@
#define ARM_CPU_H
#include "kvm-consts.h"
#include "qemu/cpu-float.h"
#include "hw/registerfields.h"
#include "cpu-qom.h"
#include "exec/cpu-defs.h"

1
target/hppa/cpu.h
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@ -22,6 +22,7 @@
#include "cpu-qom.h"
#include "exec/cpu-defs.h"
#include "qemu/cpu-float.h"
/* PA-RISC 1.x processors have a strong memory model. */
/* ??? While we do not yet implement PA-RISC 2.0, those processors have

1
target/i386/cpu.h
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@ -25,6 +25,7 @@
#include "kvm/hyperv-proto.h"
#include "exec/cpu-defs.h"
#include "qapi/qapi-types-common.h"
#include "qemu/cpu-float.h"
/* The x86 has a strong memory model with some store-after-load re-ordering */
#define TCG_GUEST_DEFAULT_MO (TCG_MO_ALL & ~TCG_MO_ST_LD)

1
target/m68k/cpu.h
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@ -22,6 +22,7 @@
#define M68K_CPU_H
#include "exec/cpu-defs.h"
#include "qemu/cpu-float.h"
#include "cpu-qom.h"
#define OS_BYTE 0

2
target/microblaze/cpu.h
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@ -22,7 +22,7 @@
#include "cpu-qom.h"
#include "exec/cpu-defs.h"
#include "fpu/softfloat-types.h"
#include "qemu/cpu-float.h"
typedef struct CPUArchState CPUMBState;
#if !defined(CONFIG_USER_ONLY)

1
target/openrisc/cpu.h
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@ -21,6 +21,7 @@
#define OPENRISC_CPU_H
#include "exec/cpu-defs.h"
#include "fpu/softfloat-types.h"
#include "hw/core/cpu.h"
#include "qom/object.h"

1
target/ppc/cpu.h
View File

@ -21,6 +21,7 @@
#define PPC_CPU_H
#include "qemu/int128.h"
#include "qemu/cpu-float.h"
#include "exec/cpu-defs.h"
#include "cpu-qom.h"
#include "qom/object.h"

2
target/riscv/cpu.h
View File

@ -23,7 +23,7 @@
#include "hw/core/cpu.h"
#include "hw/registerfields.h"
#include "exec/cpu-defs.h"
#include "fpu/softfloat-types.h"
#include "qemu/cpu-float.h"
#include "qom/object.h"
#include "qemu/int128.h"
#include "cpu_bits.h"

1
target/rx/cpu.h
View File

@ -24,6 +24,7 @@
#include "cpu-qom.h"
#include "exec/cpu-defs.h"
#include "qemu/cpu-float.h"
/* PSW define */
REG32(PSW, 0)

1
target/s390x/cpu.h
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@ -28,6 +28,7 @@
#include "cpu-qom.h"
#include "cpu_models.h"
#include "exec/cpu-defs.h"
#include "qemu/cpu-float.h"
#define ELF_MACHINE_UNAME "S390X"

1
target/sh4/cpu.h
View File

@ -22,6 +22,7 @@
#include "cpu-qom.h"
#include "exec/cpu-defs.h"
#include "qemu/cpu-float.h"
/* CPU Subtypes */
#define SH_CPU_SH7750 (1 << 0)

1
target/sparc/cpu.h
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@ -4,6 +4,7 @@
#include "qemu/bswap.h"
#include "cpu-qom.h"
#include "exec/cpu-defs.h"
#include "qemu/cpu-float.h"
#if !defined(TARGET_SPARC64)
#define TARGET_DPREGS 16

1
target/tricore/cpu.h
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@ -22,6 +22,7 @@
#include "cpu-qom.h"
#include "exec/cpu-defs.h"
#include "qemu/cpu-float.h"
#include "tricore-defs.h"
struct tricore_boot_info;

1
target/xtensa/cpu.h
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@ -29,6 +29,7 @@
#define XTENSA_CPU_H
#include "cpu-qom.h"
#include "qemu/cpu-float.h"
#include "exec/cpu-defs.h"
#include "xtensa-isa.h"