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allwinner-emac: update irq status after writes to interrupt registers
The irq line status must be updated after writes to the INT_CTL and INT_STA registers. Signed-off-by: Beniamino Galvani <b.galvani@gmail.com> Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Message-id: 1395771730-16882-8-git-send-email-b.galvani@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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@ -391,9 +391,11 @@ static void aw_emac_write(void *opaque, hwaddr offset, uint64_t value,
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break;
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case EMAC_INT_CTL_REG:
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s->int_ctl = value;
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aw_emac_update_irq(s);
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break;
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case EMAC_INT_STA_REG:
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s->int_sta &= ~value;
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aw_emac_update_irq(s);
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break;
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case EMAC_MAC_MADR_REG:
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s->phy_target = value;
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