diff --git a/hw/timer/exynos4210_mct.c b/hw/timer/exynos4210_mct.c index 08ee3ca76c..439053acd2 100644 --- a/hw/timer/exynos4210_mct.c +++ b/hw/timer/exynos4210_mct.c @@ -537,7 +537,7 @@ static void exynos4210_gcomp_raise_irq(void *opaque, uint32_t id) /* If CSTAT is pending and IRQ is enabled */ if ((s->reg.int_cstat & G_INT_CSTAT_COMP(id)) && (s->reg.int_enb & G_INT_ENABLE(id))) { - DPRINTF("gcmp timer[%d] IRQ\n", id); + DPRINTF("gcmp timer[%u] IRQ\n", id); qemu_irq_raise(s->irq[id]); } } @@ -1003,7 +1003,7 @@ static void exynos4210_mct_update_freq(Exynos4210MCTState *s) MCT_CFG_GET_DIVIDER(s->reg_mct_cfg)); if (freq != s->freq) { - DPRINTF("freq=%dHz\n", s->freq); + DPRINTF("freq=%uHz\n", s->freq); /* global timer */ tx_ptimer_set_freq(s->g_timer.ptimer_frc, s->freq); diff --git a/hw/timer/exynos4210_pwm.c b/hw/timer/exynos4210_pwm.c index 4fa3d87396..de181428b4 100644 --- a/hw/timer/exynos4210_pwm.c +++ b/hw/timer/exynos4210_pwm.c @@ -169,7 +169,7 @@ static void exynos4210_pwm_update_freq(Exynos4210PWMState *s, uint32_t id) if (freq != s->timer[id].freq) { ptimer_set_freq(s->timer[id].ptimer, s->timer[id].freq); - DPRINTF("freq=%dHz\n", s->timer[id].freq); + DPRINTF("freq=%uHz\n", s->timer[id].freq); } } @@ -183,14 +183,14 @@ static void exynos4210_pwm_tick(void *opaque) uint32_t id = s->id; bool cmp; - DPRINTF("timer %d tick\n", id); + DPRINTF("timer %u tick\n", id); /* set irq status */ p->reg_tint_cstat |= TINT_CSTAT_STATUS(id); /* raise IRQ */ if (p->reg_tint_cstat & TINT_CSTAT_ENABLE(id)) { - DPRINTF("timer %d IRQ\n", id); + DPRINTF("timer %u IRQ\n", id); qemu_irq_raise(p->timer[id].irq); } @@ -202,7 +202,7 @@ static void exynos4210_pwm_tick(void *opaque) } if (cmp) { - DPRINTF("auto reload timer %d count to %x\n", id, + DPRINTF("auto reload timer %u count to %x\n", id, p->timer[id].reg_tcntb); ptimer_set_count(p->timer[id].ptimer, p->timer[id].reg_tcntb); ptimer_run(p->timer[id].ptimer, 1);