system/qemu
system/qemu
1
0
Fork 0
mirror of https://gitlab.com/qemu-project/qemu synced 2024-07-21 10:24:33 +00:00
Code Issues Actions Packages Projects Releases Wiki Activity

target/arm: Stop using cpu_F0s for Neon f32/s32 VCVT

Browse source 
Stop using cpu_F0s for the Neon f32/s32 VCVT operations.
Since this is the last user of cpu_F0s in the Neon 2rm-op
loop, we can remove the handling code for it too.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Message-id: 20190613163917.28589-9-peter.maydell@linaro.org
This commit is contained in:
Peter Maydell 2019-06-13 17:39:13 +01:00
parent 9a011fece7
commit 60737ed578
1 changed files with 22 additions and 60 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

82
target/arm/translate.c
View file

@ -1374,38 +1374,6 @@ static TCGv_ptr get_fpstatus_ptr(int neon)
return statusptr;
}
#define VFP_GEN_ITOF(name) \
static inline void gen_vfp_##name(int dp, int neon) \
{ \
TCGv_ptr statusptr = get_fpstatus_ptr(neon); \
if (dp) { \
gen_helper_vfp_##name##d(cpu_F0d, cpu_F0s, statusptr); \
} else { \
gen_helper_vfp_##name##s(cpu_F0s, cpu_F0s, statusptr); \
} \
tcg_temp_free_ptr(statusptr); \
}
VFP_GEN_ITOF(uito)
VFP_GEN_ITOF(sito)
#undef VFP_GEN_ITOF
#define VFP_GEN_FTOI(name) \
static inline void gen_vfp_##name(int dp, int neon) \
{ \
TCGv_ptr statusptr = get_fpstatus_ptr(neon); \
if (dp) { \
gen_helper_vfp_##name##d(cpu_F0s, cpu_F0d, statusptr); \
} else { \
gen_helper_vfp_##name##s(cpu_F0s, cpu_F0s, statusptr); \
} \
tcg_temp_free_ptr(statusptr); \
}
VFP_GEN_FTOI(touiz)
VFP_GEN_FTOI(tosiz)
#undef VFP_GEN_FTOI
#define VFP_GEN_FIX(name, round) \
static inline void gen_vfp_##name(int dp, int shift, int neon) \
{ \
@ -4173,17 +4141,6 @@ static const uint8_t neon_3r_sizes[] = {
#define NEON_2RM_VCVT_SF 62
#define NEON_2RM_VCVT_UF 63
static int neon_2rm_is_float_op(int op)
{
/*
* Return true if this neon 2reg-misc op is float-to-float.
* This is not a property of the operation but of our code --
* what we are asking here is "does the code for this case in
* the Neon for-each-pass loop use cpu_F0s?".
*/
return op >= NEON_2RM_VCVT_FS;
}
static bool neon_2rm_is_v8_op(int op)
{
/* Return true if this neon 2reg-misc op is ARMv8 and up */
@ -6599,13 +6556,7 @@ static int disas_neon_data_insn(DisasContext *s, uint32_t insn)
default:
elementwise:
for (pass = 0; pass < (q ? 4 : 2); pass++) {
if (neon_2rm_is_float_op(op)) {
tcg_gen_ld_f32(cpu_F0s, cpu_env,
neon_reg_offset(rm, pass));
tmp = NULL;
} else {
tmp = neon_load_reg(rm, pass);
}
tmp = neon_load_reg(rm, pass);
switch (op) {
case NEON_2RM_VREV32:
switch (size) {
@ -6860,29 +6811,40 @@ static int disas_neon_data_insn(DisasContext *s, uint32_t insn)
break;
}
case NEON_2RM_VCVT_FS: /* VCVT.F32.S32 */
gen_vfp_sito(0, 1);
{
TCGv_ptr fpstatus = get_fpstatus_ptr(1);
gen_helper_vfp_sitos(tmp, tmp, fpstatus);
tcg_temp_free_ptr(fpstatus);
break;
}
case NEON_2RM_VCVT_FU: /* VCVT.F32.U32 */
gen_vfp_uito(0, 1);
{
TCGv_ptr fpstatus = get_fpstatus_ptr(1);
gen_helper_vfp_uitos(tmp, tmp, fpstatus);
tcg_temp_free_ptr(fpstatus);
break;
}
case NEON_2RM_VCVT_SF: /* VCVT.S32.F32 */
gen_vfp_tosiz(0, 1);
{
TCGv_ptr fpstatus = get_fpstatus_ptr(1);
gen_helper_vfp_tosizs(tmp, tmp, fpstatus);
tcg_temp_free_ptr(fpstatus);
break;
}
case NEON_2RM_VCVT_UF: /* VCVT.U32.F32 */
gen_vfp_touiz(0, 1);
{
TCGv_ptr fpstatus = get_fpstatus_ptr(1);
gen_helper_vfp_touizs(tmp, tmp, fpstatus);
tcg_temp_free_ptr(fpstatus);
break;
}
default:
/* Reserved op values were caught by the
* neon_2rm_sizes[] check earlier.
*/
abort();
}
if (neon_2rm_is_float_op(op)) {
tcg_gen_st_f32(cpu_F0s, cpu_env,
neon_reg_offset(rd, pass));
} else {
neon_store_reg(rd, pass, tmp);
}
neon_store_reg(rd, pass, tmp);
}
break;
}