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target-ppc: Altivec 2.07: Add/Subtract Unsigned Doubleword Modulo
This patch adds two Altivec unsigned doublword modulo instructions that are introduced in Power ISA Version V2.07: - vaddudm : Vector Add Unsigned Doubleword Modulo - vsubudm : Vector Subtrace Unsigned Doubleword Modulo Signed-off-by: Tom Musta <tommusta@gmail.com> Signed-off-by: Alexander Graf <agraf@suse.de>
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@ -109,9 +109,11 @@ DEF_HELPER_FLAGS_1(ftsqrt, TCG_CALL_NO_RWG_SE, i32, i64)
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DEF_HELPER_3(vaddubm, void, avr, avr, avr)
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DEF_HELPER_3(vadduhm, void, avr, avr, avr)
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DEF_HELPER_3(vadduwm, void, avr, avr, avr)
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DEF_HELPER_3(vaddudm, void, avr, avr, avr)
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DEF_HELPER_3(vsububm, void, avr, avr, avr)
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DEF_HELPER_3(vsubuhm, void, avr, avr, avr)
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DEF_HELPER_3(vsubuwm, void, avr, avr, avr)
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DEF_HELPER_3(vsubudm, void, avr, avr, avr)
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DEF_HELPER_3(vavgub, void, avr, avr, avr)
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DEF_HELPER_3(vavguh, void, avr, avr, avr)
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DEF_HELPER_3(vavguw, void, avr, avr, avr)
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@ -504,6 +504,7 @@ void helper_vaddcuw(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b)
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VARITH(ubm, u8)
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VARITH(uhm, u16)
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VARITH(uwm, u32)
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VARITH(udm, u64)
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#undef VARITH_DO
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#undef VARITH
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@ -6932,9 +6932,11 @@ static void glue(gen_, name0##_##name1)(DisasContext *ctx) \
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GEN_VXFORM(vaddubm, 0, 0);
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GEN_VXFORM(vadduhm, 0, 1);
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GEN_VXFORM(vadduwm, 0, 2);
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GEN_VXFORM(vaddudm, 0, 3);
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GEN_VXFORM(vsububm, 0, 16);
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GEN_VXFORM(vsubuhm, 0, 17);
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GEN_VXFORM(vsubuwm, 0, 18);
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GEN_VXFORM(vsubudm, 0, 19);
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GEN_VXFORM(vmaxub, 1, 0);
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GEN_VXFORM(vmaxuh, 1, 1);
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GEN_VXFORM(vmaxuw, 1, 2);
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@ -10338,9 +10340,11 @@ GEN_HANDLER_E(name0##_##name1, 0x4, opc2, (opc3 | 0x10), 0x00000000, tp0, tp1),
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GEN_VXFORM(vaddubm, 0, 0),
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GEN_VXFORM(vadduhm, 0, 1),
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GEN_VXFORM(vadduwm, 0, 2),
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GEN_VXFORM_207(vaddudm, 0, 3),
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GEN_VXFORM(vsububm, 0, 16),
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GEN_VXFORM(vsubuhm, 0, 17),
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GEN_VXFORM(vsubuwm, 0, 18),
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GEN_VXFORM_207(vsubudm, 0, 19),
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GEN_VXFORM(vmaxub, 1, 0),
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GEN_VXFORM(vmaxuh, 1, 1),
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GEN_VXFORM(vmaxuw, 1, 2),
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