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https://gitlab.com/qemu-project/qemu
synced 2024-09-06 18:05:37 +00:00
Convert remaining __builtin_expect to likely/unlikely, by Jan Kiszka.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4840 c046a42c-6fe2-441c-8c8c-71466251a162
This commit is contained in:
parent
06e80fc927
commit
551bd27f22
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@ -224,8 +224,8 @@ static inline TranslationBlock *tb_find_fast(void)
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#error unsupported CPU
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#endif
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tb = env->tb_jmp_cache[tb_jmp_cache_hash_func(pc)];
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if (__builtin_expect(!tb || tb->pc != pc || tb->cs_base != cs_base ||
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tb->flags != flags, 0)) {
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if (unlikely(!tb || tb->pc != pc || tb->cs_base != cs_base ||
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tb->flags != flags)) {
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tb = tb_find_slow(pc, cs_base, flags);
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}
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return tb;
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@ -360,7 +360,7 @@ int cpu_exec(CPUState *env1)
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next_tb = 0; /* force lookup of first TB */
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for(;;) {
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interrupt_request = env->interrupt_request;
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if (__builtin_expect(interrupt_request, 0) &&
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if (unlikely(interrupt_request) &&
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likely(!(env->singlestep_enabled & SSTEP_NOIRQ))) {
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if (interrupt_request & CPU_INTERRUPT_DEBUG) {
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env->interrupt_request &= ~CPU_INTERRUPT_DEBUG;
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@ -357,8 +357,8 @@ static inline target_ulong get_phys_addr_code(CPUState *env1, target_ulong addr)
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page_index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
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mmu_idx = cpu_mmu_index(env1);
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if (__builtin_expect(env1->tlb_table[mmu_idx][page_index].addr_code !=
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(addr & TARGET_PAGE_MASK), 0)) {
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if (unlikely(env1->tlb_table[mmu_idx][page_index].addr_code !=
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(addr & TARGET_PAGE_MASK))) {
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ldub_code(addr);
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}
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pd = env1->tlb_table[mmu_idx][page_index].addr_code & ~TARGET_PAGE_MASK;
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@ -231,8 +231,8 @@ static inline RES_TYPE glue(glue(ld, USUFFIX), MEMSUFFIX)(target_ulong ptr)
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addr = ptr;
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page_index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
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mmu_idx = CPU_MMU_INDEX;
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if (__builtin_expect(env->tlb_table[mmu_idx][page_index].ADDR_READ !=
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(addr & (TARGET_PAGE_MASK | (DATA_SIZE - 1))), 0)) {
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if (unlikely(env->tlb_table[mmu_idx][page_index].ADDR_READ !=
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(addr & (TARGET_PAGE_MASK | (DATA_SIZE - 1))))) {
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res = glue(glue(__ld, SUFFIX), MMUSUFFIX)(addr, mmu_idx);
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} else {
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physaddr = addr + env->tlb_table[mmu_idx][page_index].addend;
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@ -252,8 +252,8 @@ static inline int glue(glue(lds, SUFFIX), MEMSUFFIX)(target_ulong ptr)
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addr = ptr;
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page_index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
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mmu_idx = CPU_MMU_INDEX;
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if (__builtin_expect(env->tlb_table[mmu_idx][page_index].ADDR_READ !=
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(addr & (TARGET_PAGE_MASK | (DATA_SIZE - 1))), 0)) {
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if (unlikely(env->tlb_table[mmu_idx][page_index].ADDR_READ !=
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(addr & (TARGET_PAGE_MASK | (DATA_SIZE - 1))))) {
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res = (DATA_STYPE)glue(glue(__ld, SUFFIX), MMUSUFFIX)(addr, mmu_idx);
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} else {
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physaddr = addr + env->tlb_table[mmu_idx][page_index].addend;
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@ -277,8 +277,8 @@ static inline void glue(glue(st, SUFFIX), MEMSUFFIX)(target_ulong ptr, RES_TYPE
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addr = ptr;
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page_index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
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mmu_idx = CPU_MMU_INDEX;
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if (__builtin_expect(env->tlb_table[mmu_idx][page_index].addr_write !=
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(addr & (TARGET_PAGE_MASK | (DATA_SIZE - 1))), 0)) {
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if (unlikely(env->tlb_table[mmu_idx][page_index].addr_write !=
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(addr & (TARGET_PAGE_MASK | (DATA_SIZE - 1))))) {
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glue(glue(__st, SUFFIX), MMUSUFFIX)(addr, v, mmu_idx);
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} else {
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physaddr = addr + env->tlb_table[mmu_idx][page_index].addend;
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@ -97,7 +97,7 @@ void tlb_fill (target_ulong addr, int is_write, int mmu_idx, void *retaddr)
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saved_env = env;
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env = cpu_single_env;
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ret = cpu_arm_handle_mmu_fault(env, addr, is_write, mmu_idx, 1);
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if (__builtin_expect(ret, 0)) {
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if (unlikely(ret)) {
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if (retaddr) {
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/* now we have a real cpu fault */
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pc = (unsigned long)retaddr;
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@ -3393,7 +3393,7 @@ static inline void gen_goto_tb(DisasContext *s, int n, uint32_t dest)
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static inline void gen_jmp (DisasContext *s, uint32_t dest)
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{
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if (__builtin_expect(s->singlestep_enabled, 0)) {
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if (unlikely(s->singlestep_enabled)) {
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/* An indirect jump so that we still trigger the debug exception. */
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if (s->thumb)
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dest |= 1;
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@ -8703,7 +8703,7 @@ static inline int gen_intermediate_code_internal(CPUState *env,
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/* At this stage dc->condjmp will only be set when the skipped
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instruction was a conditional branch or trap, and the PC has
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already been written. */
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if (__builtin_expect(env->singlestep_enabled, 0)) {
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if (unlikely(env->singlestep_enabled)) {
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/* Make sure the pc is updated, and raise a debug exception. */
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if (dc->condjmp) {
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gen_set_condexec(dc);
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@ -61,7 +61,7 @@ void tlb_fill (target_ulong addr, int is_write, int mmu_idx, void *retaddr)
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D(fprintf(logfile, "%s pc=%x tpc=%x ra=%x\n", __func__,
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env->pc, env->debug1, retaddr));
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ret = cpu_cris_handle_mmu_fault(env, addr, is_write, mmu_idx, 1);
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if (__builtin_expect(ret, 0)) {
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if (unlikely(ret)) {
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if (retaddr) {
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/* now we have a real cpu fault */
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pc = (unsigned long)retaddr;
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@ -3191,7 +3191,7 @@ gen_intermediate_code_internal(CPUState *env, TranslationBlock *tb,
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cris_evaluate_flags (dc);
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if (__builtin_expect(env->singlestep_enabled, 0)) {
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if (unlikely(env->singlestep_enabled)) {
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tcg_gen_movi_tl(env_pc, npc);
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t_gen_raise_exception(EXCP_DEBUG);
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} else {
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@ -61,7 +61,7 @@ void tlb_fill (target_ulong addr, int is_write, int mmu_idx, void *retaddr)
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saved_env = env;
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env = cpu_single_env;
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ret = cpu_m68k_handle_mmu_fault(env, addr, is_write, mmu_idx, 1);
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if (__builtin_expect(ret, 0)) {
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if (unlikely(ret)) {
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if (retaddr) {
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/* now we have a real cpu fault */
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pc = (unsigned long)retaddr;
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@ -873,7 +873,7 @@ static void gen_jmp_tb(DisasContext *s, int n, uint32_t dest)
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TranslationBlock *tb;
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tb = s->tb;
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if (__builtin_expect (s->singlestep_enabled, 0)) {
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if (unlikely(s->singlestep_enabled)) {
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gen_exception(s, dest, EXCP_DEBUG);
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} else if ((tb->pc & TARGET_PAGE_MASK) == (dest & TARGET_PAGE_MASK) ||
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(s->pc & TARGET_PAGE_MASK) == (dest & TARGET_PAGE_MASK)) {
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@ -2991,7 +2991,7 @@ gen_intermediate_code_internal(CPUState *env, TranslationBlock *tb,
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if (tb->cflags & CF_LAST_IO)
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gen_io_end();
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if (__builtin_expect(env->singlestep_enabled, 0)) {
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if (unlikely(env->singlestep_enabled)) {
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/* Make sure the pc is updated, and raise a debug exception. */
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if (!dc->is_jmp) {
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gen_flush_cc_op(dc);
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