mirror of
https://gitlab.com/qemu-project/qemu
synced 2024-11-05 20:35:44 +00:00
tcg-aarch64: Simplify tcg_out_ldst_9 encoding
At first glance the code appears to be using 1's compliment encoding, a-la AArch32. Except that the constant is "off", creating a complicated split field 2's compliment encoding. Much clearer to just use a normal mask and shift. Reviewed-by: Claudio Fontana <claudio.fontana@huawei.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
This commit is contained in:
parent
017a86f7ad
commit
523fdc08cc
1 changed files with 2 additions and 12 deletions
|
@ -305,18 +305,8 @@ static inline void tcg_out_ldst_9(TCGContext *s,
|
|||
TCGReg rd, TCGReg rn, tcg_target_long offset)
|
||||
{
|
||||
/* use LDUR with BASE register with 9bit signed unscaled offset */
|
||||
unsigned int mod, off;
|
||||
|
||||
if (offset < 0) {
|
||||
off = (256 + offset);
|
||||
mod = 0x1;
|
||||
} else {
|
||||
off = offset;
|
||||
mod = 0x0;
|
||||
}
|
||||
|
||||
mod |= op_type;
|
||||
tcg_out32(s, op_data << 24 | mod << 20 | off << 12 | rn << 5 | rd);
|
||||
tcg_out32(s, op_data << 24 | op_type << 20
|
||||
| (offset & 0x1ff) << 12 | rn << 5 | rd);
|
||||
}
|
||||
|
||||
/* tcg_out_ldst_12 expects a scaled unsigned immediate offset */
|
||||
|
|
Loading…
Reference in a new issue