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hw/i386/pc: Create DMA controllers in south bridges

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Just like in the real hardware (and in PIIX4), create the DMA
controllers in the south bridges.

Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20221022150508.26830-2-shentey@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
This commit is contained in:
Bernhard Beschow 2022-10-22 17:04:26 +02:00 committed by Philippe Mathieu-Daudé
parent a6d89b454c
commit 503a35e7fd
5 changed files with 14 additions and 5 deletions
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3
hw/i386/pc.c
View file

@ -47,7 +47,6 @@
#include "multiboot.h"
#include "hw/rtc/mc146818rtc.h"
#include "hw/intc/i8259.h"
#include "hw/dma/i8257.h"
#include "hw/timer/i8254.h"
#include "hw/input/i8042.h"
#include "hw/irq.h"
@ -1320,8 +1319,6 @@ void pc_basic_device_init(struct PCMachineState *pcms,
pcspk_init(pcms->pcspk, isa_bus, pit);
}
i8257_dma_init(isa_bus, 0);
/* Super I/O */
pc_superio_init(isa_bus, create_fdctrl, pcms->i8042_enabled,
pcms->vmport != ON_OFF_AUTO_ON);

2
hw/i386/pc_piix.c
View file

@ -26,6 +26,7 @@
#include CONFIG_DEVICES
#include "qemu/units.h"
#include "hw/dma/i8257.h"
#include "hw/loader.h"
#include "hw/i386/x86.h"
#include "hw/i386/pc.h"
@ -225,6 +226,7 @@ static void pc_init1(MachineState *machine,
pci_bus = NULL;
isa_bus = isa_bus_new(NULL, get_system_memory(), system_io,
&error_abort);
i8257_dma_init(isa_bus, 0);
pcms->hpet_enabled = false;
}
isa_bus_irqs(isa_bus, x86ms->gsi);

2
hw/isa/Kconfig
View file

@ -33,6 +33,7 @@ config PC87312
config PIIX3
bool
select I8257
select ISA_BUS
config PIIX4
@ -68,6 +69,7 @@ config LPC_ICH9
bool
# For historical reasons, SuperIO devices are created in the board
# for ICH9.
select I8257
select ISA_BUS
select ACPI_SMBUS
select ACPI_X86_ICH

3
hw/isa/lpc_ich9.c
View file

@ -34,6 +34,7 @@
#include "qapi/error.h"
#include "qapi/visitor.h"
#include "qemu/range.h"
#include "hw/dma/i8257.h"
#include "hw/isa/isa.h"
#include "migration/vmstate.h"
#include "hw/irq.h"
@ -722,6 +723,8 @@ static void ich9_lpc_realize(PCIDevice *d, Error **errp)
qdev_init_gpio_out_named(dev, lpc->gsi, ICH9_GPIO_GSI, GSI_NUM_PINS);
isa_bus_irqs(isa_bus, lpc->gsi);
i8257_dma_init(isa_bus, 0);
}
static bool ich9_rst_cnt_needed(void *opaque)

9
hw/isa/piix3.c
View file

@ -25,6 +25,7 @@
#include "qemu/osdep.h"
#include "qemu/range.h"
#include "qapi/error.h"
#include "hw/dma/i8257.h"
#include "hw/southbridge/piix.h"
#include "hw/irq.h"
#include "hw/isa/isa.h"
@ -295,9 +296,11 @@ static const MemoryRegionOps rcr_ops = {
static void pci_piix3_realize(PCIDevice *dev, Error **errp)
{
PIIX3State *d = PIIX3_PCI_DEVICE(dev);
ISABus *isa_bus;
if (!isa_bus_new(DEVICE(d), get_system_memory(),
pci_address_space_io(dev), errp)) {
isa_bus = isa_bus_new(DEVICE(d), get_system_memory(),
pci_address_space_io(dev), errp);
if (!isa_bus) {
return;
}
@ -307,6 +310,8 @@ static void pci_piix3_realize(PCIDevice *dev, Error **errp)
PIIX_RCR_IOPORT, &d->rcr_mem, 1);
qemu_register_reset(piix3_reset, d);
i8257_dma_init(isa_bus, 0);
}
static void build_pci_isa_aml(AcpiDevAmlIf *adev, Aml *scope)