system/qemu
system/qemu
1
0
Fork 0
mirror of https://gitlab.com/qemu-project/qemu synced 2024-09-06 18:05:37 +00:00
Code Issues Packages Projects Releases Wiki Activity

esp: raise interrupt after every non-DMA byte transferred to the FIFO

Browse source 
This matches the description in the datasheet and is required as support for
non-DMA transfers is added.

Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Reviewed-by: Laurent Vivier <laurent@vivier.eu>
Message-Id: <20210304221103.6369-36-mark.cave-ayland@ilande.co.uk>
This commit is contained in:
Mark Cave-Ayland 2021-03-04 22:10:56 +00:00
parent 4aaa6ac383
commit 4e0ed62937
1 changed files with 6 additions and 0 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

6
hw/scsi/esp.c
View file

@ -760,6 +760,12 @@ void esp_reg_write(ESPState *s, uint32_t saddr, uint64_t val)
s->ti_size++;
s->ti_buf[s->ti_wptr++] = val & 0xff;
}
/* Non-DMA transfers raise an interrupt after every byte */
if (s->rregs[ESP_CMD] == CMD_TI) {
s->rregs[ESP_RINTR] |= INTR_FC | INTR_BS;
esp_raise_irq(s);
}
break;
case ESP_CMD:
s->rregs[saddr] = val;