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target-ppc: Altivec 2.07: vbpermq Instruction
This patch adds the Vector Bit Permute Quadword (vbpermq) instruction introduced in Power ISA Version 2.07. Signed-off-by: Tom Musta <tommusta@gmail.com> Signed-off-by: Alexander Graf <agraf@suse.de>
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@ -303,6 +303,7 @@ DEF_HELPER_2(vpopcntb, void, avr, avr)
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DEF_HELPER_2(vpopcnth, void, avr, avr)
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DEF_HELPER_2(vpopcntw, void, avr, avr)
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DEF_HELPER_2(vpopcntd, void, avr, avr)
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DEF_HELPER_3(vbpermq, void, avr, avr, avr)
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DEF_HELPER_2(xsadddp, void, env, i32)
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DEF_HELPER_2(xssubdp, void, env, i32)
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@ -1038,6 +1038,37 @@ void helper_vperm(CPUPPCState *env, ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b,
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*r = result;
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}
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#if defined(HOST_WORDS_BIGENDIAN)
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#define VBPERMQ_INDEX(avr, i) ((avr)->u8[(i)])
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#define VBPERMQ_DW(index) (((index) & 0x40) != 0)
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#else
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#define VBPERMQ_INDEX(avr, i) ((avr)->u8[15-(i)])
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#define VBPERMQ_DW(index) (((index) & 0x40) == 0)
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#endif
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void helper_vbpermq(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b)
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{
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int i;
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uint64_t perm = 0;
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VECTOR_FOR_INORDER_I(i, u8) {
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int index = VBPERMQ_INDEX(b, i);
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if (index < 128) {
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uint64_t mask = (1ull << (63-(index & 0x3F)));
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if (a->u64[VBPERMQ_DW(index)] & mask) {
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perm |= (0x8000 >> i);
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}
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}
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}
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r->u64[HI_IDX] = perm;
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r->u64[LO_IDX] = 0;
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}
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#undef VBPERMQ_INDEX
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#undef VBPERMQ_DW
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#if defined(HOST_WORDS_BIGENDIAN)
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#define PKBIG 1
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#else
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@ -7360,6 +7360,7 @@ GEN_VXFORM_DUAL(vclzw, PPC_NONE, PPC2_ALTIVEC_207, \
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vpopcntw, PPC_NONE, PPC2_ALTIVEC_207)
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GEN_VXFORM_DUAL(vclzd, PPC_NONE, PPC2_ALTIVEC_207, \
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vpopcntd, PPC_NONE, PPC2_ALTIVEC_207)
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GEN_VXFORM(vbpermq, 6, 21);
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/*** VSX extension ***/
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@ -10609,6 +10610,7 @@ GEN_VXFORM_DUAL(vclzh, vpopcnth, 1, 29, PPC_NONE, PPC2_ALTIVEC_207),
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GEN_VXFORM_DUAL(vclzw, vpopcntw, 1, 30, PPC_NONE, PPC2_ALTIVEC_207),
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GEN_VXFORM_DUAL(vclzd, vpopcntd, 1, 31, PPC_NONE, PPC2_ALTIVEC_207),
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GEN_VXFORM_207(vbpermq, 6, 21),
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GEN_HANDLER_E(lxsdx, 0x1F, 0x0C, 0x12, 0, PPC_NONE, PPC2_VSX),
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GEN_HANDLER_E(lxsiwax, 0x1F, 0x0C, 0x02, 0, PPC_NONE, PPC2_VSX207),
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