vga: make vram size configurable

Zap the global VGA_RAM_SIZE #define, make the vga ram size configurable
for standard vga and vmware vga.  cirrus and qxl are left with a fixed
size (and private VGA_RAM_SIZE #define) for now.

qxl needs some non-trivial adjustments in the mode list handling deal
with a runtime-configurable size, which calls for a separate qxl patch.

cirrus emulates cards which have 2 MB (isa) and 4 MB (pci), so I guess
it would make sense to use these sizes.  That change would break
migration though, so I left it fixed at 8 MB size.  Making it
configurabls is pretty pointless for cirrus as we have to match real
hardware.

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
This commit is contained in:
Gerd Hoffmann 2012-05-24 09:59:44 +02:00
parent e9c6149f6a
commit 4a1e244eb6
8 changed files with 50 additions and 14 deletions

View file

@ -43,6 +43,8 @@
//#define DEBUG_CIRRUS
//#define DEBUG_BITBLT
#define VGA_RAM_SIZE (8192 * 1024)
/***************************************
*
* definitions
@ -2891,7 +2893,8 @@ static int vga_initfn(ISADevice *dev)
ISACirrusVGAState *d = DO_UPCAST(ISACirrusVGAState, dev, dev);
VGACommonState *s = &d->cirrus_vga.vga;
vga_common_init(s, VGA_RAM_SIZE);
s->vram_size_mb = VGA_RAM_SIZE >> 20;
vga_common_init(s);
cirrus_init_common(&d->cirrus_vga, CIRRUS_ID_CLGD5430, 0,
isa_address_space(dev));
s->ds = graphic_console_init(s->update, s->invalidate,
@ -2933,7 +2936,8 @@ static int pci_cirrus_vga_initfn(PCIDevice *dev)
int16_t device_id = pc->device_id;
/* setup VGA */
vga_common_init(&s->vga, VGA_RAM_SIZE);
s->vga.vram_size_mb = VGA_RAM_SIZE >> 20;
vga_common_init(&s->vga);
cirrus_init_common(s, device_id, 1, pci_address_space(dev));
s->vga.ds = graphic_console_init(s->vga.update, s->vga.invalidate,
s->vga.screen_dump, s->vga.text_update,

View file

@ -27,6 +27,8 @@
#include "qxl.h"
#define VGA_RAM_SIZE (8192 * 1024)
/*
* NOTE: SPICE_RING_PROD_ITEM accesses memory on the pci bar and as
* such can be changed by the guest, so to avoid a guest trigerrable
@ -1854,7 +1856,8 @@ static int qxl_init_primary(PCIDevice *dev)
qxl->id = 0;
qxl_init_ramsize(qxl, 32);
vga_common_init(vga, qxl->vga.vram_size);
vga->vram_size_mb = qxl->vga.vram_size >> 20;
vga_common_init(vga);
vga_init(vga, pci_address_space(dev), pci_address_space_io(dev), false);
portio_list_init(qxl_vga_port_list, qxl_vga_portio_list, vga, "vga");
portio_list_add(qxl_vga_port_list, pci_address_space_io(dev), 0x3b0);

View file

@ -28,6 +28,8 @@
#include "pixel_ops.h"
#include "qemu-timer.h"
#define VGA_RAM_SIZE (8192 * 1024)
typedef struct ISAVGAMMState {
VGACommonState vga;
int it_shift;
@ -128,7 +130,8 @@ int isa_vga_mm_init(target_phys_addr_t vram_base,
s = g_malloc0(sizeof(*s));
vga_common_init(&s->vga, VGA_RAM_SIZE);
s->vga.vram_size_mb = VGA_RAM_SIZE >> 20;
vga_common_init(&s->vga);
vga_mm_init(s, vram_base, ctrl_base, it_shift, address_space);
s->vga.ds = graphic_console_init(s->vga.update, s->vga.invalidate,

View file

@ -49,7 +49,7 @@ static int vga_initfn(ISADevice *dev)
MemoryRegion *vga_io_memory;
const MemoryRegionPortio *vga_ports, *vbe_ports;
vga_common_init(s, VGA_RAM_SIZE);
vga_common_init(s);
s->legacy_address_space = isa_address_space(dev);
vga_io_memory = vga_init_io(s, &vga_ports, &vbe_ports);
isa_register_portio_list(dev, 0x3b0, vga_ports, s, "vga");
@ -69,6 +69,11 @@ static int vga_initfn(ISADevice *dev)
return 0;
}
static Property vga_isa_properties[] = {
DEFINE_PROP_UINT32("vgamem_mb", ISAVGAState, state.vram_size_mb, 8),
DEFINE_PROP_END_OF_LIST(),
};
static void vga_class_initfn(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
@ -76,6 +81,7 @@ static void vga_class_initfn(ObjectClass *klass, void *data)
ic->init = vga_initfn;
dc->reset = vga_reset_isa;
dc->vmsd = &vmstate_vga_common;
dc->props = vga_isa_properties;
}
static TypeInfo vga_info = {

View file

@ -53,7 +53,7 @@ static int pci_vga_initfn(PCIDevice *dev)
VGACommonState *s = &d->vga;
// vga + console init
vga_common_init(s, VGA_RAM_SIZE);
vga_common_init(s);
vga_init(s, pci_address_space(dev), pci_address_space_io(dev), true);
s->ds = graphic_console_init(s->update, s->invalidate,
@ -75,6 +75,11 @@ DeviceState *pci_vga_init(PCIBus *bus)
return &pci_create_simple(bus, -1, "VGA")->qdev;
}
static Property vga_pci_properties[] = {
DEFINE_PROP_UINT32("vgamem_mb", PCIVGAState, vga.vram_size_mb, 8),
DEFINE_PROP_END_OF_LIST(),
};
static void vga_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
@ -87,6 +92,7 @@ static void vga_class_init(ObjectClass *klass, void *data)
k->device_id = PCI_DEVICE_ID_QEMU_VGA;
k->class_id = PCI_CLASS_DISPLAY_VGA;
dc->vmsd = &vmstate_vga_pci;
dc->props = vga_pci_properties;
}
static TypeInfo vga_info = {

View file

@ -2225,7 +2225,7 @@ const VMStateDescription vmstate_vga_common = {
}
};
void vga_common_init(VGACommonState *s, int vga_ram_size)
void vga_common_init(VGACommonState *s)
{
int i, j, v, b;
@ -2252,16 +2252,23 @@ void vga_common_init(VGACommonState *s, int vga_ram_size)
expand4to8[i] = v;
}
/* valid range: 1 MB -> 256 MB */
s->vram_size = 1024 * 1024;
while (s->vram_size < (s->vram_size_mb << 20) &&
s->vram_size < (256 << 20)) {
s->vram_size <<= 1;
}
s->vram_size_mb = s->vram_size >> 20;
#ifdef CONFIG_BOCHS_VBE
s->is_vbe_vmstate = 1;
#else
s->is_vbe_vmstate = 0;
#endif
memory_region_init_ram(&s->vram, "vga.vram", vga_ram_size);
memory_region_init_ram(&s->vram, "vga.vram", s->vram_size);
vmstate_register_ram_global(&s->vram);
xen_register_framebuffer(&s->vram);
s->vram_ptr = memory_region_get_ram_ptr(&s->vram);
s->vram_size = vga_ram_size;
s->get_bpp = vga_get_bpp;
s->get_offsets = vga_get_offsets;
s->get_resolution = vga_get_resolution;

View file

@ -107,6 +107,7 @@ typedef struct VGACommonState {
MemoryRegion vram;
MemoryRegion vram_vbe;
uint32_t vram_size;
uint32_t vram_size_mb; /* property */
uint32_t latch;
MemoryRegion *chain4_alias;
uint8_t sr_index;
@ -184,7 +185,7 @@ static inline int c6_to_8(int v)
return (v << 2) | (b << 1) | b;
}
void vga_common_init(VGACommonState *s, int vga_ram_size);
void vga_common_init(VGACommonState *s);
void vga_init(VGACommonState *s, MemoryRegion *address_space,
MemoryRegion *address_space_io, bool init_vga_ports);
MemoryRegion *vga_init_io(VGACommonState *s,
@ -209,7 +210,6 @@ void vga_init_vbe(VGACommonState *s, MemoryRegion *address_space);
extern const uint8_t sr_mask[8];
extern const uint8_t gr_mask[16];
#define VGA_RAM_SIZE (8192 * 1024)
#define VGABIOS_FILENAME "vgabios.bin"
#define VGABIOS_CIRRUS_FILENAME "vgabios-cirrus.bin"

View file

@ -1078,7 +1078,7 @@ static const VMStateDescription vmstate_vmware_vga = {
}
};
static void vmsvga_init(struct vmsvga_state_s *s, int vga_ram_size,
static void vmsvga_init(struct vmsvga_state_s *s,
MemoryRegion *address_space, MemoryRegion *io)
{
s->scratch_size = SVGA_SCRATCH_SIZE;
@ -1095,7 +1095,7 @@ static void vmsvga_init(struct vmsvga_state_s *s, int vga_ram_size,
vmstate_register_ram_global(&s->fifo_ram);
s->fifo_ptr = memory_region_get_ram_ptr(&s->fifo_ram);
vga_common_init(&s->vga, vga_ram_size);
vga_common_init(&s->vga);
vga_init(&s->vga, address_space, io, true);
vmstate_register(NULL, 0, &vmstate_vga_common, &s->vga);
@ -1184,7 +1184,7 @@ static int pci_vmsvga_initfn(PCIDevice *dev)
"vmsvga-io", 0x10);
pci_register_bar(&s->card, 0, PCI_BASE_ADDRESS_SPACE_IO, &s->io_bar);
vmsvga_init(&s->chip, VGA_RAM_SIZE, pci_address_space(dev),
vmsvga_init(&s->chip, pci_address_space(dev),
pci_address_space_io(dev));
pci_register_bar(&s->card, 1, PCI_BASE_ADDRESS_MEM_PREFETCH, iomem);
@ -1199,6 +1199,12 @@ static int pci_vmsvga_initfn(PCIDevice *dev)
return 0;
}
static Property vga_vmware_properties[] = {
DEFINE_PROP_UINT32("vgamem_mb", struct pci_vmsvga_state_s,
chip.vga.vram_size_mb, 8),
DEFINE_PROP_END_OF_LIST(),
};
static void vmsvga_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
@ -1214,6 +1220,7 @@ static void vmsvga_class_init(ObjectClass *klass, void *data)
k->subsystem_id = SVGA_PCI_DEVICE_ID;
dc->reset = vmsvga_reset;
dc->vmsd = &vmstate_vmware_vga;
dc->props = vga_vmware_properties;
}
static TypeInfo vmsvga_info = {