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linux-user: implement HWCAP bits on MIPS
Add support for the two currently defined HWCAP bits on MIPS - R6 and MSA. Buglink: https://bugs.launchpad.net/qemu/+bug/1754372 Signed-off-by: James Cowgill <james.cowgill@mips.com> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20180315151348.6451-1-james.cowgill@mips.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
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@ -882,6 +882,30 @@ static void elf_core_copy_regs(target_elf_gregset_t *regs, const CPUMIPSState *e
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#define USE_ELF_CORE_DUMP
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#define ELF_EXEC_PAGESIZE 4096
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/* See arch/mips/include/uapi/asm/hwcap.h. */
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enum {
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HWCAP_MIPS_R6 = (1 << 0),
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HWCAP_MIPS_MSA = (1 << 1),
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};
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#define ELF_HWCAP get_elf_hwcap()
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static uint32_t get_elf_hwcap(void)
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{
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MIPSCPU *cpu = MIPS_CPU(thread_cpu);
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uint32_t hwcaps = 0;
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#define GET_FEATURE(flag, hwcap) \
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do { if (cpu->env.insn_flags & (flag)) { hwcaps |= hwcap; } } while (0)
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GET_FEATURE(ISA_MIPS32R6 | ISA_MIPS64R6, HWCAP_MIPS_R6);
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GET_FEATURE(ASE_MSA, HWCAP_MIPS_MSA);
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#undef GET_FEATURE
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return hwcaps;
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}
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#endif /* TARGET_MIPS */
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#ifdef TARGET_MICROBLAZE
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