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linux-headers: update to 3.18-rc5
This updates the Linux header to version 3.18-rc5, adding support for (among other things) read-only memslots on ARM and arm64. Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Message-id: 1416248898-6302-1-git-send-email-ard.biesheuvel@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Ard Biesheuvel
Peter Maydell
parent
f874bf905f
commit
444b1996cb
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@ -25,6 +25,7 @@
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#define __KVM_HAVE_GUEST_DEBUG
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#define __KVM_HAVE_IRQ_LINE
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#define __KVM_HAVE_READONLY_MEM
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#define KVM_REG_SIZE(id) \
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(1U << (((id) & KVM_REG_SIZE_MASK) >> KVM_REG_SIZE_SHIFT))
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@ -173,6 +174,7 @@ struct kvm_arch_memory_slot {
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#define KVM_DEV_ARM_VGIC_CPUID_MASK (0xffULL << KVM_DEV_ARM_VGIC_CPUID_SHIFT)
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#define KVM_DEV_ARM_VGIC_OFFSET_SHIFT 0
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#define KVM_DEV_ARM_VGIC_OFFSET_MASK (0xffffffffULL << KVM_DEV_ARM_VGIC_OFFSET_SHIFT)
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#define KVM_DEV_ARM_VGIC_GRP_NR_IRQS 3
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/* KVM_IRQ_LINE irq field index values */
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#define KVM_ARM_IRQ_TYPE_SHIFT 24
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@ -37,6 +37,7 @@
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#define __KVM_HAVE_GUEST_DEBUG
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#define __KVM_HAVE_IRQ_LINE
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#define __KVM_HAVE_READONLY_MEM
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#define KVM_REG_SIZE(id) \
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(1U << (((id) & KVM_REG_SIZE_MASK) >> KVM_REG_SIZE_SHIFT))
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@ -159,6 +160,7 @@ struct kvm_arch_memory_slot {
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#define KVM_DEV_ARM_VGIC_CPUID_MASK (0xffULL << KVM_DEV_ARM_VGIC_CPUID_SHIFT)
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#define KVM_DEV_ARM_VGIC_OFFSET_SHIFT 0
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#define KVM_DEV_ARM_VGIC_OFFSET_MASK (0xffffffffULL << KVM_DEV_ARM_VGIC_OFFSET_SHIFT)
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#define KVM_DEV_ARM_VGIC_GRP_NR_IRQS 3
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/* KVM_IRQ_LINE irq field index values */
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#define KVM_ARM_IRQ_TYPE_SHIFT 24
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@ -476,6 +476,11 @@ struct kvm_get_htab_header {
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/* FP and vector status/control registers */
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#define KVM_REG_PPC_FPSCR (KVM_REG_PPC | KVM_REG_SIZE_U64 | 0x80)
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/*
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* VSCR register is documented as a 32-bit register in the ISA, but it can
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* only be accesses via a vector register. Expose VSCR as a 32-bit register
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* even though the kernel represents it as a 128-bit vector.
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*/
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#define KVM_REG_PPC_VSCR (KVM_REG_PPC | KVM_REG_SIZE_U32 | 0x81)
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/* Virtual processor areas */
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@ -557,6 +562,7 @@ struct kvm_get_htab_header {
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#define KVM_REG_PPC_DABRX (KVM_REG_PPC | KVM_REG_SIZE_U32 | 0xb8)
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#define KVM_REG_PPC_WORT (KVM_REG_PPC | KVM_REG_SIZE_U64 | 0xb9)
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#define KVM_REG_PPC_SPRG9 (KVM_REG_PPC | KVM_REG_SIZE_U64 | 0xba)
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#define KVM_REG_PPC_DBSR (KVM_REG_PPC | KVM_REG_SIZE_U32 | 0xbb)
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/* Transactional Memory checkpointed state:
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* This is all GPRs, all VSX regs and a subset of SPRs
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@ -111,12 +111,22 @@ struct kvm_guest_debug_arch {
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#define KVM_SYNC_GPRS (1UL << 1)
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#define KVM_SYNC_ACRS (1UL << 2)
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#define KVM_SYNC_CRS (1UL << 3)
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#define KVM_SYNC_ARCH0 (1UL << 4)
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#define KVM_SYNC_PFAULT (1UL << 5)
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/* definition of registers in kvm_run */
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struct kvm_sync_regs {
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__u64 prefix; /* prefix register */
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__u64 gprs[16]; /* general purpose registers */
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__u32 acrs[16]; /* access registers */
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__u64 crs[16]; /* control registers */
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__u64 todpr; /* tod programmable register [ARCH0] */
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__u64 cputm; /* cpu timer [ARCH0] */
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__u64 ckc; /* clock comparator [ARCH0] */
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__u64 pp; /* program parameter [ARCH0] */
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__u64 gbea; /* guest breaking-event address [ARCH0] */
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__u64 pft; /* pfault token [PFAULT] */
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__u64 pfs; /* pfault select [PFAULT] */
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__u64 pfc; /* pfault compare [PFAULT] */
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};
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#define KVM_REG_S390_TODPR (KVM_REG_S390 | KVM_REG_SIZE_U32 | 0x1)
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@ -654,9 +654,7 @@ struct kvm_ppc_smmu_info {
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#endif
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/* Bug in KVM_SET_USER_MEMORY_REGION fixed: */
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#define KVM_CAP_DESTROY_MEMORY_REGION_WORKS 21
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#ifdef __KVM_HAVE_USER_NMI
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#define KVM_CAP_USER_NMI 22
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#endif
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#ifdef __KVM_HAVE_GUEST_DEBUG
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#define KVM_CAP_SET_GUEST_DEBUG 23
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#endif
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@ -738,9 +736,7 @@ struct kvm_ppc_smmu_info {
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#define KVM_CAP_PPC_GET_SMMU_INFO 78
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#define KVM_CAP_S390_COW 79
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#define KVM_CAP_PPC_ALLOC_HTAB 80
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#ifdef __KVM_HAVE_READONLY_MEM
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#define KVM_CAP_READONLY_MEM 81
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#endif
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#define KVM_CAP_IRQFD_RESAMPLE 82
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#define KVM_CAP_PPC_BOOKE_WATCHDOG 83
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#define KVM_CAP_PPC_HTAB_FD 84
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@ -947,15 +943,25 @@ struct kvm_device_attr {
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__u64 addr; /* userspace address of attr data */
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};
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#define KVM_DEV_TYPE_FSL_MPIC_20 1
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#define KVM_DEV_TYPE_FSL_MPIC_42 2
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#define KVM_DEV_TYPE_XICS 3
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#define KVM_DEV_TYPE_VFIO 4
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#define KVM_DEV_VFIO_GROUP 1
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#define KVM_DEV_VFIO_GROUP_ADD 1
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#define KVM_DEV_VFIO_GROUP_DEL 2
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#define KVM_DEV_TYPE_ARM_VGIC_V2 5
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#define KVM_DEV_TYPE_FLIC 6
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enum kvm_device_type {
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KVM_DEV_TYPE_FSL_MPIC_20 = 1,
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#define KVM_DEV_TYPE_FSL_MPIC_20 KVM_DEV_TYPE_FSL_MPIC_20
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KVM_DEV_TYPE_FSL_MPIC_42,
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#define KVM_DEV_TYPE_FSL_MPIC_42 KVM_DEV_TYPE_FSL_MPIC_42
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KVM_DEV_TYPE_XICS,
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#define KVM_DEV_TYPE_XICS KVM_DEV_TYPE_XICS
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KVM_DEV_TYPE_VFIO,
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#define KVM_DEV_TYPE_VFIO KVM_DEV_TYPE_VFIO
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KVM_DEV_TYPE_ARM_VGIC_V2,
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#define KVM_DEV_TYPE_ARM_VGIC_V2 KVM_DEV_TYPE_ARM_VGIC_V2
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KVM_DEV_TYPE_FLIC,
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#define KVM_DEV_TYPE_FLIC KVM_DEV_TYPE_FLIC
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KVM_DEV_TYPE_MAX,
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};
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/*
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* ioctls for VM fds
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@ -1093,7 +1099,7 @@ struct kvm_s390_ucas_mapping {
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#define KVM_S390_INITIAL_RESET _IO(KVMIO, 0x97)
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#define KVM_GET_MP_STATE _IOR(KVMIO, 0x98, struct kvm_mp_state)
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#define KVM_SET_MP_STATE _IOW(KVMIO, 0x99, struct kvm_mp_state)
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/* Available with KVM_CAP_NMI */
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/* Available with KVM_CAP_USER_NMI */
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#define KVM_NMI _IO(KVMIO, 0x9a)
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/* Available with KVM_CAP_SET_GUEST_DEBUG */
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#define KVM_SET_GUEST_DEBUG _IOW(KVMIO, 0x9b, struct kvm_guest_debug)
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@ -33,6 +33,9 @@
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/* Check if EEH is supported */
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#define VFIO_EEH 5
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/* Two-stage IOMMU */
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#define VFIO_TYPE1_NESTING_IOMMU 6 /* Implies v2 */
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/*
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* The IOCTL interface is designed for extensibility by embedding the
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* structure length (argsz) and flags into structures passed between
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