mirror of
https://gitlab.com/qemu-project/qemu
synced 2024-07-22 10:55:31 +00:00
Stellaris qdev conversion
Signed-off-by: Paul Brook <paul@codesourcery.com>
This commit is contained in:
Paul Brook
parent
2c6554bc6b
commit
40905a6a31
43
hw/armv7m.c
43
hw/armv7m.c
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@ -117,18 +117,35 @@ static CPUWriteMemoryFunc *bitband_writefn[] = {
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bitband_writel
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};
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typedef struct {
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SysBusDevice busdev;
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uint32_t base;
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} BitBandState;
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static void bitband_init(SysBusDevice *dev)
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{
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BitBandState *s = FROM_SYSBUS(BitBandState, dev);
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int iomemtype;
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s->base = qdev_get_prop_int(&dev->qdev, "base", 0);
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iomemtype = cpu_register_io_memory(0, bitband_readfn, bitband_writefn,
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&s->base);
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sysbus_init_mmio(dev, 0x02000000, iomemtype);
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}
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static void armv7m_bitband_init(void)
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{
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int iomemtype;
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static uint32_t bitband1_offset = 0x20000000;
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static uint32_t bitband2_offset = 0x40000000;
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DeviceState *dev;
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iomemtype = cpu_register_io_memory(0, bitband_readfn, bitband_writefn,
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&bitband1_offset);
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cpu_register_physical_memory(0x22000000, 0x02000000, iomemtype);
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iomemtype = cpu_register_io_memory(0, bitband_readfn, bitband_writefn,
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&bitband2_offset);
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cpu_register_physical_memory(0x42000000, 0x02000000, iomemtype);
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dev = qdev_create(NULL, "ARM,bitband-memory");
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qdev_set_prop_int(dev, "base", 0x20000000);
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qdev_init(dev);
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sysbus_mmio_map(sysbus_from_qdev(dev), 0, 0x22000000);
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dev = qdev_create(NULL, "ARM,bitband-memory");
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qdev_set_prop_int(dev, "base", 0x40000000);
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qdev_init(dev);
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sysbus_mmio_map(sysbus_from_qdev(dev), 0, 0x42000000);
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}
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/* Board init. */
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@ -220,3 +237,11 @@ qemu_irq *armv7m_init(int flash_size, int sram_size,
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return pic;
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}
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static void armv7m_register_devices(void)
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{
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sysbus_register_dev("ARM,bitband-memory", sizeof(BitBandState),
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bitband_init);
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}
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device_init(armv7m_register_devices)
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28
hw/pl061.c
28
hw/pl061.c
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@ -8,8 +8,7 @@
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* This code is licenced under the GPL.
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*/
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#include "hw.h"
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#include "primecell.h"
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#include "sysbus.h"
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//#define DEBUG_PL061 1
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@ -28,6 +27,7 @@ static const uint8_t pl061_id[12] =
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{ 0x00, 0x00, 0x00, 0x00, 0x61, 0x00, 0x18, 0x01, 0x0d, 0xf0, 0x05, 0xb1 };
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typedef struct {
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SysBusDevice busdev;
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int locked;
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uint8_t data;
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uint8_t old_data;
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@ -291,21 +291,25 @@ static int pl061_load(QEMUFile *f, void *opaque, int version_id)
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return 0;
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}
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/* Returns an array of inputs. */
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qemu_irq *pl061_init(uint32_t base, qemu_irq irq, qemu_irq **out)
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static void pl061_init(SysBusDevice *dev)
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{
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int iomemtype;
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pl061_state *s;
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pl061_state *s = FROM_SYSBUS(pl061_state, dev);
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s = (pl061_state *)qemu_mallocz(sizeof(pl061_state));
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iomemtype = cpu_register_io_memory(0, pl061_readfn,
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pl061_writefn, s);
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cpu_register_physical_memory(base, 0x00001000, iomemtype);
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s->irq = irq;
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sysbus_init_mmio(dev, 0x1000, iomemtype);
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sysbus_init_irq(dev, &s->irq);
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qdev_init_gpio_in(&dev->qdev, pl061_set_irq, 8);
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qdev_init_gpio_out(&dev->qdev, s->out, 8);
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pl061_reset(s);
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if (out)
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*out = s->out;
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register_savevm("pl061_gpio", -1, 1, pl061_save, pl061_load, s);
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return qemu_allocate_irqs(pl061_set_irq, s, 8);
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}
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static void pl061_register_devices(void)
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{
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sysbus_register_dev("pl061", sizeof(pl061_state),
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pl061_init);
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}
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device_init(pl061_register_devices)
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@ -5,10 +5,6 @@
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/* Also includes some devices that are currently only used by the
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ARM boards. */
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/* pl061.c */
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void pl061_float_high(void *opaque, uint8_t mask);
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qemu_irq *pl061_init(uint32_t base, qemu_irq irq, qemu_irq **out);
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/* pl080.c */
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void *pl080_init(uint32_t base, qemu_irq irq, int nchannels);
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@ -10,7 +10,6 @@
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#include "sysbus.h"
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#include "ssi.h"
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#include "arm-misc.h"
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#include "primecell.h"
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#include "devices.h"
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#include "qemu-timer.h"
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#include "i2c.h"
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@ -45,6 +44,7 @@ typedef const struct {
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/* General purpose timer module. */
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typedef struct gptm_state {
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SysBusDevice busdev;
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uint32_t config;
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uint32_t mode[2];
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uint32_t control;
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@ -112,8 +112,7 @@ static void gptm_tick(void *opaque)
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s->state |= 1;
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if ((s->control & 0x20)) {
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/* Output trigger. */
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qemu_irq_raise(s->trigger);
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qemu_irq_lower(s->trigger);
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qemu_irq_pulse(s->trigger);
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}
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if (s->mode[0] & 1) {
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/* One-shot. */
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@ -340,19 +339,19 @@ static int gptm_load(QEMUFile *f, void *opaque, int version_id)
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return 0;
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}
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static void stellaris_gptm_init(uint32_t base, qemu_irq irq, qemu_irq trigger)
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static void stellaris_gptm_init(SysBusDevice *dev)
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{
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int iomemtype;
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gptm_state *s;
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gptm_state *s = FROM_SYSBUS(gptm_state, dev);
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s = (gptm_state *)qemu_mallocz(sizeof(gptm_state));
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s->irq = irq;
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s->trigger = trigger;
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s->opaque[0] = s->opaque[1] = s;
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sysbus_init_irq(dev, &s->irq);
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qdev_init_gpio_out(&dev->qdev, &s->trigger, 1);
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iomemtype = cpu_register_io_memory(0, gptm_readfn,
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gptm_writefn, s);
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cpu_register_physical_memory(base, 0x00001000, iomemtype);
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sysbus_init_mmio(dev, 0x1000, iomemtype);
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s->opaque[0] = s->opaque[1] = s;
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s->timer[0] = qemu_new_timer(vm_clock, gptm_tick, &s->opaque[0]);
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s->timer[1] = qemu_new_timer(vm_clock, gptm_tick, &s->opaque[1]);
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register_savevm("stellaris_gptm", -1, 1, gptm_save, gptm_load, s);
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@ -906,6 +905,7 @@ static void stellaris_i2c_init(SysBusDevice * dev)
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typedef struct
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{
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SysBusDevice busdev;
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uint32_t actss;
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uint32_t ris;
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uint32_t im;
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@ -1178,26 +1178,23 @@ static int stellaris_adc_load(QEMUFile *f, void *opaque, int version_id)
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return 0;
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}
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static qemu_irq stellaris_adc_init(uint32_t base, qemu_irq *irq)
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static void stellaris_adc_init(SysBusDevice *dev)
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{
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stellaris_adc_state *s;
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stellaris_adc_state *s = FROM_SYSBUS(stellaris_adc_state, dev);
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int iomemtype;
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qemu_irq *qi;
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int n;
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s = (stellaris_adc_state *)qemu_mallocz(sizeof(stellaris_adc_state));
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for (n = 0; n < 4; n++) {
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s->irq[n] = irq[n];
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sysbus_init_irq(dev, &s->irq[n]);
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}
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iomemtype = cpu_register_io_memory(0, stellaris_adc_readfn,
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stellaris_adc_writefn, s);
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cpu_register_physical_memory(base, 0x00001000, iomemtype);
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sysbus_init_mmio(dev, 0x1000, iomemtype);
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stellaris_adc_reset(s);
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qi = qemu_allocate_irqs(stellaris_adc_trigger, s, 1);
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qdev_init_gpio_in(&dev->qdev, stellaris_adc_trigger, 1);
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register_savevm("stellaris_adc", -1, 1,
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stellaris_adc_save, stellaris_adc_load, s);
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return qi[0];
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}
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/* Some boards have both an OLED controller and SD card connected to
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@ -1294,27 +1291,36 @@ static void stellaris_init(const char *kernel_filename, const char *cpu_model,
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static const int gpio_irq[7] = {0, 1, 2, 3, 4, 30, 31};
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qemu_irq *pic;
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qemu_irq *gpio_in[7];
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qemu_irq *gpio_out[7];
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DeviceState *gpio_dev[7];
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qemu_irq gpio_in[7][8];
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qemu_irq gpio_out[7][8];
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qemu_irq adc;
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int sram_size;
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int flash_size;
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i2c_bus *i2c;
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DeviceState *dev;
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int i;
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int j;
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flash_size = ((board->dc0 & 0xffff) + 1) << 1;
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sram_size = (board->dc0 >> 18) + 1;
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pic = armv7m_init(flash_size, sram_size, kernel_filename, cpu_model);
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if (board->dc1 & (1 << 16)) {
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adc = stellaris_adc_init(0x40038000, pic + 14);
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dev = sysbus_create_varargs("stellaris-adc", 0x40038000,
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pic[14], pic[15], pic[16], pic[17], NULL);
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adc = qdev_get_gpio_in(dev, 0);
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} else {
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adc = NULL;
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}
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for (i = 0; i < 4; i++) {
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if (board->dc2 & (0x10000 << i)) {
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stellaris_gptm_init(0x40030000 + i * 0x1000,
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pic[timer_irq[i]], adc);
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dev = sysbus_create_simple("stellaris-gptm",
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0x40030000 + i * 0x1000,
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pic[timer_irq[i]]);
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/* TODO: This is incorrect, but we get away with it because
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the ADC output is only ever pulsed. */
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qdev_connect_gpio_out(dev, 0, adc);
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}
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}
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@ -1322,13 +1328,16 @@ static void stellaris_init(const char *kernel_filename, const char *cpu_model,
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for (i = 0; i < 7; i++) {
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if (board->dc4 & (1 << i)) {
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gpio_in[i] = pl061_init(gpio_addr[i], pic[gpio_irq[i]],
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&gpio_out[i]);
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gpio_dev[i] = sysbus_create_simple("pl061", gpio_addr[i],
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pic[gpio_irq[i]]);
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for (j = 0; j < 8; j++) {
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gpio_in[i][j] = qdev_get_gpio_in(gpio_dev[i], j);
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gpio_out[i][j] = NULL;
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}
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}
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}
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if (board->dc2 & (1 << 12)) {
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DeviceState *dev;
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dev = sysbus_create_simple("stellaris-i2c", 0x40020000, pic[8]);
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i2c = (i2c_bus *)qdev_get_child_bus(dev, "i2c");
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if (board->peripherals & BP_OLED_I2C) {
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@ -1343,7 +1352,6 @@ static void stellaris_init(const char *kernel_filename, const char *cpu_model,
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}
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}
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if (board->dc2 & (1 << 4)) {
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DeviceState *dev;
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dev = sysbus_create_simple("pl022", 0x40008000, pic[7]);
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if (board->peripherals & BP_OLED_SSI) {
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DeviceState *mux;
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@ -1387,6 +1395,15 @@ static void stellaris_init(const char *kernel_filename, const char *cpu_model,
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stellaris_gamepad_init(5, gpad_irq, gpad_keycode);
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}
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for (i = 0; i < 7; i++) {
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if (board->dc4 & (1 << i)) {
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for (j = 0; j < 8; j++) {
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if (gpio_out[i][j]) {
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qdev_connect_gpio_out(gpio_dev[i], j, gpio_out[i][j]);
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}
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}
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}
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}
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}
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/* FIXME: Figure out how to generate these from stellaris_boards. */
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@ -1435,6 +1452,10 @@ static void stellaris_register_devices(void)
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{
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sysbus_register_dev("stellaris-i2c", sizeof(stellaris_i2c_state),
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stellaris_i2c_init);
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sysbus_register_dev("stellaris-gptm", sizeof(gptm_state),
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stellaris_gptm_init);
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sysbus_register_dev("stellaris-adc", sizeof(stellaris_adc_state),
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stellaris_adc_init);
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ssi_register_slave("evb6965-ssi", sizeof(stellaris_ssi_bus_state),
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&stellaris_ssi_bus_info);
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}
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