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https://gitlab.com/qemu-project/qemu
synced 2024-09-06 18:05:37 +00:00
tcg-i386: Use new return-argument ld/st helpers
Discontinue the jump-around-jump-to-jump scheme, trading it for a single immediate move instruction. The two extra jumps always consume 7 bytes, whereas the immediate move is either 5 or 7 bytes depending on where the code_gen_buffer gets located. Signed-off-by: Richard Henderson <rth@twiddle.net>
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@ -326,18 +326,9 @@ extern uintptr_t tci_tb_ptr;
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(6) jump to corresponding code of the next of fast path
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*/
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# if defined(__i386__) || defined(__x86_64__)
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/* To avoid broken disassembling, long jmp is used for embedding fast path pc,
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so that the destination is the next code of fast path, though this jmp is
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never executed.
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call MMU helper
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jmp POST_PROC (2byte) <- GETRA()
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jmp NEXT_CODE (5byte)
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POST_PROCESS ... <- GETRA() + 7
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*/
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# define GETRA() ((uintptr_t)__builtin_return_address(0))
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# define GETPC_LDST() ((uintptr_t)(GETRA() + 7 + \
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*(int32_t *)((void *)GETRA() + 3) - 1))
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/* The return address argument for ldst is passed directly. */
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# define GETPC_LDST() (abort(), 0)
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# elif defined (_ARCH_PPC) && !defined (_ARCH_PPC64)
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# define GETRA() ((uintptr_t)__builtin_return_address(0))
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# define GETPC_LDST() ((uintptr_t) ((*(int32_t *)(GETRA() - 4)) - 1))
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@ -190,11 +190,11 @@ static int target_parse_constraint(TCGArgConstraint *ct, const char **pct_str)
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/* qemu_ld/st address constraint */
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case 'L':
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ct->ct |= TCG_CT_REG;
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#if TCG_TARGET_REG_BITS == 64
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if (TCG_TARGET_REG_BITS == 64) {
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tcg_regset_set32(ct->u.regs, 0, 0xffff);
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#else
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} else {
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tcg_regset_set32(ct->u.regs, 0, 0xff);
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#endif
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}
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tcg_regset_reset_reg(ct->u.regs, TCG_REG_L0);
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tcg_regset_reset_reg(ct->u.regs, TCG_REG_L1);
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break;
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@ -1025,22 +1025,24 @@ static void tcg_out_jmp(TCGContext *s, tcg_target_long dest)
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#include "exec/softmmu_defs.h"
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/* helper signature: helper_ld_mmu(CPUState *env, target_ulong addr,
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int mmu_idx) */
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static const void *qemu_ld_helpers[4] = {
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helper_ldb_mmu,
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helper_ldw_mmu,
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helper_ldl_mmu,
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helper_ldq_mmu,
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/* helper signature: helper_ret_ld_mmu(CPUState *env, target_ulong addr,
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* int mmu_idx, uintptr_t ra)
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*/
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static const void * const qemu_ld_helpers[4] = {
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helper_ret_ldb_mmu,
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helper_ret_ldw_mmu,
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helper_ret_ldl_mmu,
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helper_ret_ldq_mmu,
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};
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/* helper signature: helper_st_mmu(CPUState *env, target_ulong addr,
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uintxx_t val, int mmu_idx) */
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static const void *qemu_st_helpers[4] = {
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helper_stb_mmu,
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helper_stw_mmu,
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helper_stl_mmu,
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helper_stq_mmu,
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/* helper signature: helper_ret_st_mmu(CPUState *env, target_ulong addr,
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* uintxx_t val, int mmu_idx, uintptr_t ra)
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*/
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static const void * const qemu_st_helpers[4] = {
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helper_ret_stb_mmu,
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helper_ret_stw_mmu,
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helper_ret_stl_mmu,
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helper_ret_stq_mmu,
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};
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static void add_qemu_ldst_label(TCGContext *s,
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@ -1468,6 +1470,12 @@ static void add_qemu_ldst_label(TCGContext *s,
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}
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}
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/* See the GETPC definition in include/exec/exec-all.h. */
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static inline uintptr_t do_getpc(uint8_t *raddr)
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{
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return (uintptr_t)raddr - 1;
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}
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/*
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* Generate code for the slow path for a load at the end of block
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*/
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@ -1499,33 +1507,20 @@ static void tcg_out_qemu_ld_slow_path(TCGContext *s, TCGLabelQemuLdst *l)
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}
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tcg_out_sti(s, TCG_TYPE_I32, TCG_REG_ESP, ofs, l->mem_index);
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ofs += 4;
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tcg_out_sti(s, TCG_TYPE_I32, TCG_REG_ESP, ofs, do_getpc(l->raddr));
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} else {
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tcg_out_mov(s, TCG_TYPE_I64, tcg_target_call_iarg_regs[0], TCG_AREG0);
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tcg_out_mov(s, TCG_TYPE_PTR, tcg_target_call_iarg_regs[0], TCG_AREG0);
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/* The second argument is already loaded with addrlo. */
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tcg_out_movi(s, TCG_TYPE_I32, tcg_target_call_iarg_regs[2],
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l->mem_index);
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tcg_out_movi(s, TCG_TYPE_PTR, tcg_target_call_iarg_regs[3],
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do_getpc(l->raddr));
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}
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/* Code generation of qemu_ld/st's slow path calling MMU helper
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PRE_PROC ...
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call MMU helper
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jmp POST_PROC (2b) : short forward jump <- GETRA()
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jmp next_code (5b) : dummy long backward jump which is never executed
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POST_PROC ... : do post-processing <- GETRA() + 7
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jmp next_code : jump to the code corresponding to next IR of qemu_ld/st
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*/
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tcg_out_calli(s, (tcg_target_long)qemu_ld_helpers[s_bits]);
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/* Jump to post-processing code */
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tcg_out8(s, OPC_JMP_short);
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tcg_out8(s, 5);
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/* Dummy backward jump having information of fast path'pc for MMU helpers */
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tcg_out8(s, OPC_JMP_long);
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*(int32_t *)s->code_ptr = (int32_t)(l->raddr - s->code_ptr - 4);
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s->code_ptr += 4;
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data_reg = l->datalo_reg;
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switch(opc) {
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case 0 | 4:
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@ -1606,36 +1601,32 @@ static void tcg_out_qemu_st_slow_path(TCGContext *s, TCGLabelQemuLdst *l)
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}
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tcg_out_sti(s, TCG_TYPE_I32, TCG_REG_ESP, ofs, l->mem_index);
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ofs += 4;
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tcg_out_sti(s, TCG_TYPE_I32, TCG_REG_ESP, ofs, do_getpc(l->raddr));
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} else {
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tcg_out_mov(s, TCG_TYPE_I64, tcg_target_call_iarg_regs[0], TCG_AREG0);
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uintptr_t pc;
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tcg_out_mov(s, TCG_TYPE_PTR, tcg_target_call_iarg_regs[0], TCG_AREG0);
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/* The second argument is already loaded with addrlo. */
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tcg_out_mov(s, (opc == 3 ? TCG_TYPE_I64 : TCG_TYPE_I32),
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tcg_target_call_iarg_regs[2], l->datalo_reg);
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tcg_out_movi(s, TCG_TYPE_I32, tcg_target_call_iarg_regs[3],
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l->mem_index);
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pc = do_getpc(l->raddr);
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if (ARRAY_SIZE(tcg_target_call_iarg_regs) > 4) {
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tcg_out_movi(s, TCG_TYPE_PTR, tcg_target_call_iarg_regs[4], pc);
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} else if (pc == (int32_t)pc) {
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tcg_out_sti(s, TCG_TYPE_PTR, TCG_REG_ESP, 0, pc);
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} else {
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tcg_out_movi(s, TCG_TYPE_PTR, TCG_REG_RAX, pc);
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tcg_out_st(s, TCG_TYPE_PTR, TCG_REG_RAX, TCG_REG_ESP, 0);
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}
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}
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/* Code generation of qemu_ld/st's slow path calling MMU helper
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PRE_PROC ...
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call MMU helper
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jmp POST_PROC (2b) : short forward jump <- GETRA()
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jmp next_code (5b) : dummy long backward jump which is never executed
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POST_PROC ... : do post-processing <- GETRA() + 7
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jmp next_code : jump to the code corresponding to next IR of qemu_ld/st
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*/
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tcg_out_calli(s, (tcg_target_long)qemu_st_helpers[s_bits]);
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/* Jump to post-processing code */
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tcg_out8(s, OPC_JMP_short);
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tcg_out8(s, 5);
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/* Dummy backward jump having information of fast path'pc for MMU helpers */
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tcg_out8(s, OPC_JMP_long);
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*(int32_t *)s->code_ptr = (int32_t)(l->raddr - s->code_ptr - 4);
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s->code_ptr += 4;
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/* Jump to the code corresponding to next IR of qemu_st */
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tcg_out_jmp(s, (tcg_target_long)l->raddr);
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}
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