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target/ppc: fmadd: add macro for updating flags

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Adds FPU_MADDSUB_UPDATE macro, this will be used for other routines
having float32/16

Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
This commit is contained in:
Nikunj A Dadhania 2017-03-04 19:32:08 +05:30 committed by David Gibson
parent 806c9d71ab
commit 3e5b26cf57
1 changed files with 30 additions and 31 deletions
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61
target/ppc/fpu_helper.c
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@ -743,38 +743,37 @@ uint64_t helper_frim(CPUPPCState *env, uint64_t arg)
return do_fri(env, arg, float_round_down); return do_fri(env, arg, float_round_down);
} }
static void float64_maddsub_update_excp(CPUPPCState *env, float64 arg1, #define FPU_MADDSUB_UPDATE(NAME, TP) \
float64 arg2, float64 arg3, static void NAME(CPUPPCState *env, TP arg1, TP arg2, TP arg3, \
unsigned int madd_flags) unsigned int madd_flags) \
{ { \
if (unlikely(float64_is_signaling_nan(arg1, &env->fp_status) || if (TP##_is_signaling_nan(arg1, &env->fp_status) || \
float64_is_signaling_nan(arg2, &env->fp_status) || TP##_is_signaling_nan(arg2, &env->fp_status) || \
float64_is_signaling_nan(arg3, &env->fp_status))) { TP##_is_signaling_nan(arg3, &env->fp_status)) { \
/* sNaN operation */ /* sNaN operation */ \
float_invalid_op_excp(env, POWERPC_EXCP_FP_VXSNAN, 1); float_invalid_op_excp(env, POWERPC_EXCP_FP_VXSNAN, 1); \
} } \
if ((TP##_is_infinity(arg1) && TP##_is_zero(arg2)) || \
if (unlikely((float64_is_infinity(arg1) && float64_is_zero(arg2)) || (TP##_is_zero(arg1) && TP##_is_infinity(arg2))) { \
(float64_is_zero(arg1) && float64_is_infinity(arg2)))) { /* Multiplication of zero by infinity */ \
/* Multiplication of zero by infinity */ float_invalid_op_excp(env, POWERPC_EXCP_FP_VXIMZ, 1); \
float_invalid_op_excp(env, POWERPC_EXCP_FP_VXIMZ, 1); } \
} if ((TP##_is_infinity(arg1) || TP##_is_infinity(arg2)) && \
TP##_is_infinity(arg3)) { \
if ((float64_is_infinity(arg1) || float64_is_infinity(arg2)) && uint8_t aSign, bSign, cSign; \
float64_is_infinity(arg3)) { \
uint8_t aSign, bSign, cSign; aSign = TP##_is_neg(arg1); \
bSign = TP##_is_neg(arg2); \
aSign = float64_is_neg(arg1); cSign = TP##_is_neg(arg3); \
bSign = float64_is_neg(arg2); if (madd_flags & float_muladd_negate_c) { \
cSign = float64_is_neg(arg3); cSign ^= 1; \
if (madd_flags & float_muladd_negate_c) { } \
cSign ^= 1; if (aSign ^ bSign ^ cSign) { \
} float_invalid_op_excp(env, POWERPC_EXCP_FP_VXISI, 1); \
if (aSign ^ bSign ^ cSign) { } \
float_invalid_op_excp(env, POWERPC_EXCP_FP_VXISI, 1); } \
}
}
} }
FPU_MADDSUB_UPDATE(float64_maddsub_update_excp, float64)
#define FPU_FMADD(op, madd_flags) \ #define FPU_FMADD(op, madd_flags) \
uint64_t helper_##op(CPUPPCState *env, uint64_t arg1, \ uint64_t helper_##op(CPUPPCState *env, uint64_t arg1, \