tcg: Remove expansion to shift by vector from do_shifts

We do not reflect this expansion in tcg_can_emit_vecop_list,
so it is unused and unusable.  However, we actually perform
the same expansion in do_gvec_shifts, so it is also unneeded.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
Richard Henderson 2020-04-20 07:56:36 -07:00
parent 5d0ceda902
commit 3d5bb2ea5c

View file

@ -707,7 +707,7 @@ void tcg_gen_rotrv_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b)
}
static void do_shifts(unsigned vece, TCGv_vec r, TCGv_vec a,
TCGv_i32 s, TCGOpcode opc_s, TCGOpcode opc_v)
TCGv_i32 s, TCGOpcode opc)
{
TCGTemp *rt = tcgv_vec_temp(r);
TCGTemp *at = tcgv_vec_temp(a);
@ -716,48 +716,35 @@ static void do_shifts(unsigned vece, TCGv_vec r, TCGv_vec a,
TCGArg ai = temp_arg(at);
TCGArg si = temp_arg(st);
TCGType type = rt->base_type;
const TCGOpcode *hold_list;
int can;
tcg_debug_assert(at->base_type >= type);
tcg_assert_listed_vecop(opc_s);
hold_list = tcg_swap_vecop_list(NULL);
can = tcg_can_emit_vec_op(opc_s, type, vece);
tcg_assert_listed_vecop(opc);
can = tcg_can_emit_vec_op(opc, type, vece);
if (can > 0) {
vec_gen_3(opc_s, type, vece, ri, ai, si);
vec_gen_3(opc, type, vece, ri, ai, si);
} else if (can < 0) {
tcg_expand_vec_op(opc_s, type, vece, ri, ai, si);
const TCGOpcode *hold_list = tcg_swap_vecop_list(NULL);
tcg_expand_vec_op(opc, type, vece, ri, ai, si);
tcg_swap_vecop_list(hold_list);
} else {
TCGv_vec vec_s = tcg_temp_new_vec(type);
if (vece == MO_64) {
TCGv_i64 s64 = tcg_temp_new_i64();
tcg_gen_extu_i32_i64(s64, s);
tcg_gen_dup_i64_vec(MO_64, vec_s, s64);
tcg_temp_free_i64(s64);
} else {
tcg_gen_dup_i32_vec(vece, vec_s, s);
}
do_op3_nofail(vece, r, a, vec_s, opc_v);
tcg_temp_free_vec(vec_s);
g_assert_not_reached();
}
tcg_swap_vecop_list(hold_list);
}
void tcg_gen_shls_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_i32 b)
{
do_shifts(vece, r, a, b, INDEX_op_shls_vec, INDEX_op_shlv_vec);
do_shifts(vece, r, a, b, INDEX_op_shls_vec);
}
void tcg_gen_shrs_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_i32 b)
{
do_shifts(vece, r, a, b, INDEX_op_shrs_vec, INDEX_op_shrv_vec);
do_shifts(vece, r, a, b, INDEX_op_shrs_vec);
}
void tcg_gen_sars_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_i32 b)
{
do_shifts(vece, r, a, b, INDEX_op_sars_vec, INDEX_op_sarv_vec);
do_shifts(vece, r, a, b, INDEX_op_sars_vec);
}
void tcg_gen_bitsel_vec(unsigned vece, TCGv_vec r, TCGv_vec a,