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target/microblaze: Handle DISAS_EXIT_NEXT in delay slot
It is legal to put an mts instruction into a delay slot. We should continue to return to the main loop in that case so that we recognize any pending interrupts. Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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@ -1696,6 +1696,10 @@ static void mb_tr_translate_insn(DisasContextBase *dcb, CPUState *cs)
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dc->base.pc_next += 4;
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if (dc->jmp_cond != TCG_COND_NEVER && !(dc->tb_flags & D_FLAG)) {
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/*
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* Finish any return-from branch.
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* TODO: Diagnose rtXd in delay slot of rtYd earlier.
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*/
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if (dc->tb_flags & DRTI_FLAG) {
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do_rti(dc);
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} else if (dc->tb_flags & DRTB_FLAG) {
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@ -1703,7 +1707,35 @@ static void mb_tr_translate_insn(DisasContextBase *dcb, CPUState *cs)
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} else if (dc->tb_flags & DRTE_FLAG) {
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do_rte(dc);
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}
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dc->base.is_jmp = DISAS_JUMP;
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/* Complete the branch, ending the TB. */
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switch (dc->base.is_jmp) {
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case DISAS_NORETURN:
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/*
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* E.g. illegal insn in a delay slot. We've already exited
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* and will handle D_FLAG in mb_cpu_do_interrupt.
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*/
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break;
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case DISAS_EXIT:
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/*
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* TODO: diagnose brk/brki in delay slot earlier.
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* This would then fold into the illegal insn case above.
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*/
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break;
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case DISAS_NEXT:
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/* Normal insn a delay slot. */
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dc->base.is_jmp = DISAS_JUMP;
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break;
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case DISAS_EXIT_NEXT:
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/*
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* E.g. mts insn in a delay slot. Continue with btarget,
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* but still return to the main loop.
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*/
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dc->base.is_jmp = DISAS_EXIT_JUMP;
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break;
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default:
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g_assert_not_reached();
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}
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}
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}
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