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tcg: Add tcg_gen_vec_add{sub}16_i32

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Implement tcg_gen_vec_add{sub}16_tl by adding corresponding i32 OP.

Signed-off-by: LIU Zhiwei <zhiwei_liu@c-sky.com>
Message-Id: <20210624105023.3852-2-zhiwei_liu@c-sky.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
LIU Zhiwei 2021-06-24 18:50:19 +08:00 committed by Richard Henderson
parent 5f5a05cdd9
commit 3d066e5d80
2 changed files with 41 additions and 0 deletions
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13
include/tcg/tcg-op-gvec.h
View file

@ -401,4 +401,17 @@ void tcg_gen_vec_sar16i_i64(TCGv_i64 d, TCGv_i64 a, int64_t);
void tcg_gen_vec_rotl8i_i64(TCGv_i64 d, TCGv_i64 a, int64_t c);
void tcg_gen_vec_rotl16i_i64(TCGv_i64 d, TCGv_i64 a, int64_t c);
/* 32-bit vector operations. */
void tcg_gen_vec_add16_i32(TCGv_i32 d, TCGv_i32 a, TCGv_i32 b);
void tcg_gen_vec_sub16_i32(TCGv_i32 d, TCGv_i32 a, TCGv_i32 b);
#if TARGET_LONG_BITS == 64
#define tcg_gen_vec_add16_tl tcg_gen_vec_add16_i64
#define tcg_gen_vec_sub16_tl tcg_gen_vec_sub16_i64
#else
#define tcg_gen_vec_add16_tl tcg_gen_vec_add16_i32
#define tcg_gen_vec_sub16_tl tcg_gen_vec_sub16_i32
#endif
#endif

28
tcg/tcg-op-gvec.c
View file

@ -1742,6 +1742,20 @@ void tcg_gen_vec_add16_i64(TCGv_i64 d, TCGv_i64 a, TCGv_i64 b)
gen_addv_mask(d, a, b, m);
}
void tcg_gen_vec_add16_i32(TCGv_i32 d, TCGv_i32 a, TCGv_i32 b)
{
TCGv_i32 t1 = tcg_temp_new_i32();
TCGv_i32 t2 = tcg_temp_new_i32();
tcg_gen_andi_i32(t1, a, ~0xffff);
tcg_gen_add_i32(t2, a, b);
tcg_gen_add_i32(t1, t1, b);
tcg_gen_deposit_i32(d, t1, t2, 0, 16);
tcg_temp_free_i32(t1);
tcg_temp_free_i32(t2);
}
void tcg_gen_vec_add32_i64(TCGv_i64 d, TCGv_i64 a, TCGv_i64 b)
{
TCGv_i64 t1 = tcg_temp_new_i64();
@ -1892,6 +1906,20 @@ void tcg_gen_vec_sub16_i64(TCGv_i64 d, TCGv_i64 a, TCGv_i64 b)
gen_subv_mask(d, a, b, m);
}
void tcg_gen_vec_sub16_i32(TCGv_i32 d, TCGv_i32 a, TCGv_i32 b)
{
TCGv_i32 t1 = tcg_temp_new_i32();
TCGv_i32 t2 = tcg_temp_new_i32();
tcg_gen_andi_i32(t1, b, ~0xffff);
tcg_gen_sub_i32(t2, a, b);
tcg_gen_sub_i32(t1, a, t1);
tcg_gen_deposit_i32(d, t1, t2, 0, 16);
tcg_temp_free_i32(t1);
tcg_temp_free_i32(t2);
}
void tcg_gen_vec_sub32_i64(TCGv_i64 d, TCGv_i64 a, TCGv_i64 b)
{
TCGv_i64 t1 = tcg_temp_new_i64();