mirror of
https://gitlab.com/qemu-project/qemu
synced 2024-07-21 10:24:33 +00:00
accel/tcg: Move CPUNegativeOffsetState into CPUState
Retain the separate structure to emphasize its importance. Enforce CPUArchState always follows CPUState without padding. Reviewed-by: Anton Johansson <anjo@rev.ng> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
parent
5d30bdcb1b
commit
3b3d7df545
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@ -344,8 +344,8 @@ TranslationBlock *tb_gen_code(CPUState *cpu,
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tcg_ctx->page_bits = TARGET_PAGE_BITS;
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tcg_ctx->page_bits = TARGET_PAGE_BITS;
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tcg_ctx->page_mask = TARGET_PAGE_MASK;
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tcg_ctx->page_mask = TARGET_PAGE_MASK;
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tcg_ctx->tlb_dyn_max_bits = CPU_TLB_DYN_MAX_BITS;
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tcg_ctx->tlb_dyn_max_bits = CPU_TLB_DYN_MAX_BITS;
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tcg_ctx->tlb_fast_offset =
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tcg_ctx->tlb_fast_offset = (int)offsetof(ArchCPU, parent_obj.neg.tlb.f)
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(int)offsetof(ArchCPU, neg.tlb.f) - (int)offsetof(ArchCPU, env);
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- (int)offsetof(ArchCPU, env);
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#endif
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#endif
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tcg_ctx->insn_start_words = TARGET_INSN_START_WORDS;
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tcg_ctx->insn_start_words = TARGET_INSN_START_WORDS;
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#ifdef TCG_GUEST_DEFAULT_MO
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#ifdef TCG_GUEST_DEFAULT_MO
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@ -48,8 +48,8 @@ static TCGOp *gen_tb_start(DisasContextBase *db, uint32_t cflags)
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if ((cflags & CF_USE_ICOUNT) || !(cflags & CF_NOIRQ)) {
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if ((cflags & CF_USE_ICOUNT) || !(cflags & CF_NOIRQ)) {
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count = tcg_temp_new_i32();
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count = tcg_temp_new_i32();
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tcg_gen_ld_i32(count, cpu_env,
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tcg_gen_ld_i32(count, cpu_env,
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offsetof(ArchCPU, neg.icount_decr.u32) -
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offsetof(ArchCPU, parent_obj.neg.icount_decr.u32)
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offsetof(ArchCPU, env));
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- offsetof(ArchCPU, env));
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}
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}
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if (cflags & CF_USE_ICOUNT) {
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if (cflags & CF_USE_ICOUNT) {
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@ -78,8 +78,8 @@ static TCGOp *gen_tb_start(DisasContextBase *db, uint32_t cflags)
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if (cflags & CF_USE_ICOUNT) {
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if (cflags & CF_USE_ICOUNT) {
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tcg_gen_st16_i32(count, cpu_env,
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tcg_gen_st16_i32(count, cpu_env,
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offsetof(ArchCPU, neg.icount_decr.u16.low) -
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offsetof(ArchCPU, parent_obj.neg.icount_decr.u16.low)
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offsetof(ArchCPU, env));
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- offsetof(ArchCPU, env));
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}
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}
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/*
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/*
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@ -432,9 +432,13 @@ int cpu_exec(CPUState *cpu);
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static inline void cpu_set_cpustate_pointers(ArchCPU *cpu)
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static inline void cpu_set_cpustate_pointers(ArchCPU *cpu)
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{
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{
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cpu->parent_obj.env_ptr = &cpu->env;
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cpu->parent_obj.env_ptr = &cpu->env;
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cpu->parent_obj.icount_decr_ptr = &cpu->neg.icount_decr;
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cpu->parent_obj.icount_decr_ptr = &cpu->parent_obj.neg.icount_decr;
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}
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}
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/* Validate correct placement of CPUArchState. */
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QEMU_BUILD_BUG_ON(offsetof(ArchCPU, parent_obj) != 0);
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QEMU_BUILD_BUG_ON(offsetof(ArchCPU, env) != sizeof(CPUState));
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/**
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/**
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* env_archcpu(env)
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* env_archcpu(env)
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* @env: The architecture environment
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* @env: The architecture environment
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@ -443,7 +447,7 @@ static inline void cpu_set_cpustate_pointers(ArchCPU *cpu)
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*/
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*/
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static inline ArchCPU *env_archcpu(CPUArchState *env)
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static inline ArchCPU *env_archcpu(CPUArchState *env)
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{
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{
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return container_of(env, ArchCPU, env);
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return (void *)env - sizeof(CPUState);
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}
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}
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/**
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/**
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@ -454,15 +458,9 @@ static inline ArchCPU *env_archcpu(CPUArchState *env)
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*/
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*/
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static inline CPUState *env_cpu(CPUArchState *env)
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static inline CPUState *env_cpu(CPUArchState *env)
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{
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{
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return &env_archcpu(env)->parent_obj;
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return (void *)env - sizeof(CPUState);
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}
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}
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/*
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* Validate placement of CPUNegativeOffsetState.
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*/
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QEMU_BUILD_BUG_ON(offsetof(ArchCPU, env) - offsetof(ArchCPU, neg) >=
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sizeof(CPUNegativeOffsetState) + __alignof(CPUArchState));
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/**
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/**
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* env_neg(env)
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* env_neg(env)
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* @env: The architecture environment
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* @env: The architecture environment
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@ -471,8 +469,7 @@ QEMU_BUILD_BUG_ON(offsetof(ArchCPU, env) - offsetof(ArchCPU, neg) >=
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*/
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*/
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static inline CPUNegativeOffsetState *env_neg(CPUArchState *env)
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static inline CPUNegativeOffsetState *env_neg(CPUArchState *env)
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{
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{
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ArchCPU *arch_cpu = container_of(env, ArchCPU, env);
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return &env_cpu(env)->neg;
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return &arch_cpu->neg;
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}
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}
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/**
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/**
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@ -483,8 +480,7 @@ static inline CPUNegativeOffsetState *env_neg(CPUArchState *env)
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*/
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*/
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static inline CPUNegativeOffsetState *cpu_neg(CPUState *cpu)
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static inline CPUNegativeOffsetState *cpu_neg(CPUState *cpu)
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{
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{
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ArchCPU *arch_cpu = container_of(cpu, ArchCPU, parent_obj);
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return &cpu->neg;
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return &arch_cpu->neg;
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}
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}
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/**
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/**
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@ -345,8 +345,8 @@ typedef union IcountDecr {
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} IcountDecr;
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} IcountDecr;
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/*
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/*
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* This structure must be placed in ArchCPU immediately
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* Elements of CPUState most efficiently accessed from CPUArchState,
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* before CPUArchState, as a field named "neg".
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* via small negative offsets.
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*/
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*/
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typedef struct CPUNegativeOffsetState {
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typedef struct CPUNegativeOffsetState {
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CPUTLB tlb;
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CPUTLB tlb;
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@ -453,6 +453,9 @@ struct qemu_work_item;
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* dirty ring structure.
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* dirty ring structure.
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*
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*
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* State of one CPU core or thread.
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* State of one CPU core or thread.
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*
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* Align, in order to match possible alignment required by CPUArchState,
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* and eliminate a hole between CPUState and CPUArchState within ArchCPU.
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*/
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*/
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struct CPUState {
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struct CPUState {
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/*< private >*/
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/*< private >*/
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@ -571,8 +574,18 @@ struct CPUState {
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/* track IOMMUs whose translations we've cached in the TCG TLB */
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/* track IOMMUs whose translations we've cached in the TCG TLB */
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GArray *iommu_notifiers;
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GArray *iommu_notifiers;
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/*
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* MUST BE LAST in order to minimize the displacement to CPUArchState.
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*/
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char neg_align[-sizeof(CPUNegativeOffsetState) % 16] QEMU_ALIGNED(16);
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CPUNegativeOffsetState neg;
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};
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};
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/* Validate placement of CPUNegativeOffsetState. */
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QEMU_BUILD_BUG_ON(offsetof(CPUState, neg) !=
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sizeof(CPUState) - sizeof(CPUNegativeOffsetState));
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typedef QTAILQ_HEAD(CPUTailQ, CPUState) CPUTailQ;
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typedef QTAILQ_HEAD(CPUTailQ, CPUState) CPUTailQ;
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extern CPUTailQ cpus;
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extern CPUTailQ cpus;
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@ -263,7 +263,6 @@ struct ArchCPU {
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CPUState parent_obj;
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CPUState parent_obj;
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/*< public >*/
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/*< public >*/
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CPUNegativeOffsetState neg;
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CPUAlphaState env;
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CPUAlphaState env;
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/* This alarm doesn't exist in real hardware; we wish it did. */
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/* This alarm doesn't exist in real hardware; we wish it did. */
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@ -856,7 +856,6 @@ struct ArchCPU {
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CPUState parent_obj;
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CPUState parent_obj;
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/*< public >*/
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/*< public >*/
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CPUNegativeOffsetState neg;
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CPUARMState env;
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CPUARMState env;
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/* Coprocessor information */
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/* Coprocessor information */
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@ -148,7 +148,6 @@ struct ArchCPU {
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CPUState parent_obj;
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CPUState parent_obj;
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/*< public >*/
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/*< public >*/
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CPUNegativeOffsetState neg;
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CPUAVRState env;
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CPUAVRState env;
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};
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};
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@ -178,7 +178,6 @@ struct ArchCPU {
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CPUState parent_obj;
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CPUState parent_obj;
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/*< public >*/
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/*< public >*/
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CPUNegativeOffsetState neg;
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CPUCRISState env;
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CPUCRISState env;
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};
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};
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@ -141,7 +141,7 @@ struct ArchCPU {
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/*< private >*/
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/*< private >*/
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CPUState parent_obj;
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CPUState parent_obj;
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/*< public >*/
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/*< public >*/
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CPUNegativeOffsetState neg;
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CPUHexagonState env;
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CPUHexagonState env;
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bool lldb_compat;
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bool lldb_compat;
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@ -237,7 +237,6 @@ struct ArchCPU {
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CPUState parent_obj;
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CPUState parent_obj;
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/*< public >*/
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/*< public >*/
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CPUNegativeOffsetState neg;
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CPUHPPAState env;
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CPUHPPAState env;
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QEMUTimer *alarm_timer;
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QEMUTimer *alarm_timer;
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};
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};
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@ -1901,7 +1901,6 @@ struct ArchCPU {
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CPUState parent_obj;
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CPUState parent_obj;
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/*< public >*/
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/*< public >*/
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CPUNegativeOffsetState neg;
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CPUX86State env;
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CPUX86State env;
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VMChangeStateEntry *vmsentry;
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VMChangeStateEntry *vmsentry;
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@ -375,7 +375,6 @@ struct ArchCPU {
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CPUState parent_obj;
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CPUState parent_obj;
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/*< public >*/
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/*< public >*/
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CPUNegativeOffsetState neg;
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CPULoongArchState env;
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CPULoongArchState env;
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QEMUTimer timer;
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QEMUTimer timer;
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uint32_t phy_id;
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uint32_t phy_id;
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@ -168,7 +168,6 @@ struct ArchCPU {
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CPUState parent_obj;
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CPUState parent_obj;
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/*< public >*/
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/*< public >*/
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CPUNegativeOffsetState neg;
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CPUM68KState env;
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CPUM68KState env;
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};
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};
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@ -345,15 +345,15 @@ typedef struct {
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struct ArchCPU {
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struct ArchCPU {
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/*< private >*/
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/*< private >*/
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CPUState parent_obj;
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CPUState parent_obj;
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/*< public >*/
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/*< public >*/
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CPUMBState env;
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bool ns_axi_dp;
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bool ns_axi_dp;
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bool ns_axi_ip;
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bool ns_axi_ip;
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bool ns_axi_dc;
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bool ns_axi_dc;
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bool ns_axi_ic;
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bool ns_axi_ic;
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CPUNegativeOffsetState neg;
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CPUMBState env;
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MicroBlazeCPUConfig cfg;
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MicroBlazeCPUConfig cfg;
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};
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};
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@ -1213,10 +1213,10 @@ struct ArchCPU {
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CPUState parent_obj;
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CPUState parent_obj;
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/*< public >*/
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/*< public >*/
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CPUMIPSState env;
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Clock *clock;
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Clock *clock;
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Clock *count_div; /* Divider for CP0_Count clock */
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Clock *count_div; /* Divider for CP0_Count clock */
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CPUNegativeOffsetState neg;
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CPUMIPSState env;
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};
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};
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@ -218,7 +218,6 @@ struct ArchCPU {
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CPUState parent_obj;
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CPUState parent_obj;
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/*< public >*/
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/*< public >*/
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CPUNegativeOffsetState neg;
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CPUNios2State env;
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CPUNios2State env;
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bool diverr_present;
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bool diverr_present;
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@ -305,7 +305,6 @@ struct ArchCPU {
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CPUState parent_obj;
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CPUState parent_obj;
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/*< public >*/
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/*< public >*/
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CPUNegativeOffsetState neg;
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CPUOpenRISCState env;
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CPUOpenRISCState env;
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};
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};
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@ -1317,7 +1317,6 @@ struct ArchCPU {
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CPUState parent_obj;
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CPUState parent_obj;
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/*< public >*/
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/*< public >*/
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CPUNegativeOffsetState neg;
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CPUPPCState env;
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CPUPPCState env;
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int vcpu_id;
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int vcpu_id;
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@ -388,7 +388,7 @@ struct ArchCPU {
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/* < private > */
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/* < private > */
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CPUState parent_obj;
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CPUState parent_obj;
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/* < public > */
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/* < public > */
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CPUNegativeOffsetState neg;
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CPURISCVState env;
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CPURISCVState env;
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char *dyn_csr_xml;
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char *dyn_csr_xml;
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@ -111,7 +111,6 @@ struct ArchCPU {
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CPUState parent_obj;
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CPUState parent_obj;
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/*< public >*/
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/*< public >*/
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CPUNegativeOffsetState neg;
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CPURXState env;
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CPURXState env;
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};
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};
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@ -170,7 +170,6 @@ struct ArchCPU {
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CPUState parent_obj;
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CPUState parent_obj;
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/*< public >*/
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/*< public >*/
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CPUNegativeOffsetState neg;
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CPUS390XState env;
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CPUS390XState env;
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S390CPUModel *model;
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S390CPUModel *model;
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/* needed for live migration */
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/* needed for live migration */
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@ -208,7 +208,6 @@ struct ArchCPU {
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CPUState parent_obj;
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CPUState parent_obj;
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/*< public >*/
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/*< public >*/
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CPUNegativeOffsetState neg;
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CPUSH4State env;
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CPUSH4State env;
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};
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};
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@ -561,7 +561,6 @@ struct ArchCPU {
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CPUState parent_obj;
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CPUState parent_obj;
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/*< public >*/
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/*< public >*/
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CPUNegativeOffsetState neg;
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CPUSPARCState env;
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CPUSPARCState env;
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};
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};
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@ -67,7 +67,6 @@ struct ArchCPU {
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CPUState parent_obj;
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CPUState parent_obj;
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/*< public >*/
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/*< public >*/
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CPUNegativeOffsetState neg;
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CPUTriCoreState env;
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CPUTriCoreState env;
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};
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};
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@ -560,9 +560,8 @@ struct ArchCPU {
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CPUState parent_obj;
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CPUState parent_obj;
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/*< public >*/
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/*< public >*/
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Clock *clock;
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CPUNegativeOffsetState neg;
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CPUXtensaState env;
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CPUXtensaState env;
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Clock *clock;
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};
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};
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