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https://gitlab.com/qemu-project/qemu
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i386/monitor.c: make addresses canonical for "info mem" and "info tlb"
Correct the output of the "info mem" and "info tlb" monitor commands to correctly show canonical addresses. In 48-bit addressing mode, the upper 16 bits of linear addresses are equal to bit 47. In 57-bit addressing mode (LA57), the upper 7 bits of linear addresses are equal to bit 56. Signed-off-by: Doug Gale <doug16k@gmail.com> Message-Id: <20180617084025.29198-1-doug16k@gmail.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
This commit is contained in:
Doug Gale
Paolo Bonzini
parent
fe441054bb
commit
3afc969a6e
1 changed files with 44 additions and 32 deletions
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@ -35,21 +35,28 @@
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#include "sev_i386.h"
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#include "qapi/qapi-commands-misc.h"
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static void print_pte(Monitor *mon, CPUArchState *env, hwaddr addr,
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hwaddr pte, hwaddr mask)
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/* Perform linear address sign extension */
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static hwaddr addr_canonical(CPUArchState *env, hwaddr addr)
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{
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#ifdef TARGET_X86_64
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if (env->cr[4] & CR4_LA57_MASK) {
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if (addr & (1ULL << 56)) {
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addr |= -1LL << 57;
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addr |= (hwaddr)-(1LL << 57);
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}
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} else {
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if (addr & (1ULL << 47)) {
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addr |= -1LL << 48;
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addr |= (hwaddr)-(1LL << 48);
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}
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}
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#endif
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return addr;
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}
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static void print_pte(Monitor *mon, CPUArchState *env, hwaddr addr,
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hwaddr pte, hwaddr mask)
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{
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addr = addr_canonical(env, addr);
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monitor_printf(mon, TARGET_FMT_plx ": " TARGET_FMT_plx
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" %c%c%c%c%c%c%c%c%c\n",
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addr,
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@ -243,8 +250,8 @@ void hmp_info_tlb(Monitor *mon, const QDict *qdict)
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}
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}
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static void mem_print(Monitor *mon, hwaddr *pstart,
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int *plast_prot,
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static void mem_print(Monitor *mon, CPUArchState *env,
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hwaddr *pstart, int *plast_prot,
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hwaddr end, int prot)
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{
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int prot1;
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@ -253,7 +260,9 @@ static void mem_print(Monitor *mon, hwaddr *pstart,
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if (*pstart != -1) {
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monitor_printf(mon, TARGET_FMT_plx "-" TARGET_FMT_plx " "
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TARGET_FMT_plx " %c%c%c\n",
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*pstart, end, end - *pstart,
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addr_canonical(env, *pstart),
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addr_canonical(env, end),
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addr_canonical(env, end - *pstart),
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prot1 & PG_USER_MASK ? 'u' : '-',
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'r',
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prot1 & PG_RW_MASK ? 'w' : '-');
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@ -283,7 +292,7 @@ static void mem_info_32(Monitor *mon, CPUArchState *env)
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if (pde & PG_PRESENT_MASK) {
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if ((pde & PG_PSE_MASK) && (env->cr[4] & CR4_PSE_MASK)) {
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prot = pde & (PG_USER_MASK | PG_RW_MASK | PG_PRESENT_MASK);
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mem_print(mon, &start, &last_prot, end, prot);
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mem_print(mon, env, &start, &last_prot, end, prot);
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} else {
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for(l2 = 0; l2 < 1024; l2++) {
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cpu_physical_memory_read((pde & ~0xfff) + l2 * 4, &pte, 4);
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@ -295,16 +304,16 @@ static void mem_info_32(Monitor *mon, CPUArchState *env)
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} else {
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prot = 0;
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}
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mem_print(mon, &start, &last_prot, end, prot);
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mem_print(mon, env, &start, &last_prot, end, prot);
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}
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}
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} else {
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prot = 0;
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mem_print(mon, &start, &last_prot, end, prot);
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mem_print(mon, env, &start, &last_prot, end, prot);
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}
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}
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/* Flush last range */
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mem_print(mon, &start, &last_prot, (hwaddr)1 << 32, 0);
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mem_print(mon, env, &start, &last_prot, (hwaddr)1 << 32, 0);
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}
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static void mem_info_pae32(Monitor *mon, CPUArchState *env)
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@ -332,7 +341,7 @@ static void mem_info_pae32(Monitor *mon, CPUArchState *env)
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if (pde & PG_PSE_MASK) {
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prot = pde & (PG_USER_MASK | PG_RW_MASK |
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PG_PRESENT_MASK);
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mem_print(mon, &start, &last_prot, end, prot);
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mem_print(mon, env, &start, &last_prot, end, prot);
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} else {
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pt_addr = pde & 0x3fffffffff000ULL;
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for (l3 = 0; l3 < 512; l3++) {
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@ -345,21 +354,21 @@ static void mem_info_pae32(Monitor *mon, CPUArchState *env)
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} else {
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prot = 0;
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}
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mem_print(mon, &start, &last_prot, end, prot);
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mem_print(mon, env, &start, &last_prot, end, prot);
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}
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}
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} else {
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prot = 0;
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mem_print(mon, &start, &last_prot, end, prot);
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mem_print(mon, env, &start, &last_prot, end, prot);
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}
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}
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} else {
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prot = 0;
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mem_print(mon, &start, &last_prot, end, prot);
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mem_print(mon, env, &start, &last_prot, end, prot);
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}
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}
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/* Flush last range */
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mem_print(mon, &start, &last_prot, (hwaddr)1 << 32, 0);
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mem_print(mon, env, &start, &last_prot, (hwaddr)1 << 32, 0);
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}
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@ -389,7 +398,7 @@ static void mem_info_la48(Monitor *mon, CPUArchState *env)
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prot = pdpe & (PG_USER_MASK | PG_RW_MASK |
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PG_PRESENT_MASK);
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prot &= pml4e;
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mem_print(mon, &start, &last_prot, end, prot);
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mem_print(mon, env, &start, &last_prot, end, prot);
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} else {
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pd_addr = pdpe & 0x3fffffffff000ULL;
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for (l3 = 0; l3 < 512; l3++) {
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@ -401,7 +410,8 @@ static void mem_info_la48(Monitor *mon, CPUArchState *env)
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prot = pde & (PG_USER_MASK | PG_RW_MASK |
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PG_PRESENT_MASK);
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prot &= pml4e & pdpe;
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mem_print(mon, &start, &last_prot, end, prot);
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mem_print(mon, env, &start,
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&last_prot, end, prot);
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} else {
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pt_addr = pde & 0x3fffffffff000ULL;
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for (l4 = 0; l4 < 512; l4++) {
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@ -418,27 +428,29 @@ static void mem_info_la48(Monitor *mon, CPUArchState *env)
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} else {
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prot = 0;
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}
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mem_print(mon, &start, &last_prot, end, prot);
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mem_print(mon, env, &start,
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&last_prot, end, prot);
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}
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}
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} else {
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prot = 0;
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mem_print(mon, &start, &last_prot, end, prot);
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mem_print(mon, env, &start,
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&last_prot, end, prot);
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}
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}
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}
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} else {
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prot = 0;
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mem_print(mon, &start, &last_prot, end, prot);
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mem_print(mon, env, &start, &last_prot, end, prot);
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}
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}
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} else {
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prot = 0;
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mem_print(mon, &start, &last_prot, end, prot);
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mem_print(mon, env, &start, &last_prot, end, prot);
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}
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}
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/* Flush last range */
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mem_print(mon, &start, &last_prot, (hwaddr)1 << 48, 0);
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mem_print(mon, env, &start, &last_prot, (hwaddr)1 << 48, 0);
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}
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static void mem_info_la57(Monitor *mon, CPUArchState *env)
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@ -457,7 +469,7 @@ static void mem_info_la57(Monitor *mon, CPUArchState *env)
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end = l0 << 48;
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if (!(pml5e & PG_PRESENT_MASK)) {
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prot = 0;
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mem_print(mon, &start, &last_prot, end, prot);
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mem_print(mon, env, &start, &last_prot, end, prot);
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continue;
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}
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@ -468,7 +480,7 @@ static void mem_info_la57(Monitor *mon, CPUArchState *env)
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end = (l0 << 48) + (l1 << 39);
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if (!(pml4e & PG_PRESENT_MASK)) {
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prot = 0;
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mem_print(mon, &start, &last_prot, end, prot);
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mem_print(mon, env, &start, &last_prot, end, prot);
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continue;
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}
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@ -479,7 +491,7 @@ static void mem_info_la57(Monitor *mon, CPUArchState *env)
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end = (l0 << 48) + (l1 << 39) + (l2 << 30);
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if (pdpe & PG_PRESENT_MASK) {
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prot = 0;
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mem_print(mon, &start, &last_prot, end, prot);
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mem_print(mon, env, &start, &last_prot, end, prot);
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continue;
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}
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@ -487,7 +499,7 @@ static void mem_info_la57(Monitor *mon, CPUArchState *env)
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prot = pdpe & (PG_USER_MASK | PG_RW_MASK |
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PG_PRESENT_MASK);
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prot &= pml5e & pml4e;
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mem_print(mon, &start, &last_prot, end, prot);
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mem_print(mon, env, &start, &last_prot, end, prot);
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continue;
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}
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@ -498,7 +510,7 @@ static void mem_info_la57(Monitor *mon, CPUArchState *env)
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end = (l0 << 48) + (l1 << 39) + (l2 << 30) + (l3 << 21);
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if (pde & PG_PRESENT_MASK) {
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prot = 0;
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mem_print(mon, &start, &last_prot, end, prot);
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mem_print(mon, env, &start, &last_prot, end, prot);
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continue;
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}
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@ -506,7 +518,7 @@ static void mem_info_la57(Monitor *mon, CPUArchState *env)
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prot = pde & (PG_USER_MASK | PG_RW_MASK |
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PG_PRESENT_MASK);
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prot &= pml5e & pml4e & pdpe;
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mem_print(mon, &start, &last_prot, end, prot);
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mem_print(mon, env, &start, &last_prot, end, prot);
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continue;
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}
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@ -523,14 +535,14 @@ static void mem_info_la57(Monitor *mon, CPUArchState *env)
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} else {
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prot = 0;
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}
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mem_print(mon, &start, &last_prot, end, prot);
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mem_print(mon, env, &start, &last_prot, end, prot);
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}
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}
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}
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}
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}
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/* Flush last range */
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mem_print(mon, &start, &last_prot, (hwaddr)1 << 57, 0);
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mem_print(mon, env, &start, &last_prot, (hwaddr)1 << 57, 0);
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}
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#endif /* TARGET_X86_64 */
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