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https://gitlab.com/qemu-project/qemu
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esp: use trace framework instead of stderr output
Signed-off-by: Hervé Poussineau <hpoussin@reactos.org> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
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parent
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commit
3af4e9aa56
13
hw/esp.c
13
hw/esp.c
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@ -26,6 +26,7 @@
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#include "scsi.h"
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#include "esp.h"
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#include "trace.h"
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#include "qemu-log.h"
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/*
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* On Sparc32, this is the ESP (NCR53C90) part of chip STP2000 (Master I/O),
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@ -35,9 +36,6 @@
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* http://www.ibiblio.org/pub/historic-linux/early-ports/Sparc/NCR/NCR53C9X.txt
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*/
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#define ESP_ERROR(fmt, ...) \
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do { printf("ESP ERROR: %s: " fmt, __func__ , ## __VA_ARGS__); } while (0)
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#define ESP_REGS 16
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#define TI_BUFSZ 16
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@ -503,7 +501,8 @@ static uint64_t esp_reg_read(ESPState *s, uint32_t saddr)
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s->ti_size--;
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if ((s->rregs[ESP_RSTAT] & STAT_PIO_MASK) == 0) {
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/* Data out. */
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ESP_ERROR("PIO data read not implemented\n");
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qemu_log_mask(LOG_UNIMP,
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"esp: PIO data read not implemented\n");
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s->rregs[ESP_FIFO] = 0;
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} else {
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s->rregs[ESP_FIFO] = s->ti_buf[s->ti_rptr++];
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@ -543,7 +542,7 @@ static void esp_reg_write(ESPState *s, uint32_t saddr, uint64_t val)
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if (s->do_cmd) {
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s->cmdbuf[s->cmdlen++] = val & 0xff;
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} else if (s->ti_size == TI_BUFSZ - 1) {
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ESP_ERROR("fifo overrun\n");
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trace_esp_error_fifo_overrun();
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} else {
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s->ti_size++;
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s->ti_buf[s->ti_wptr++] = val & 0xff;
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@ -631,7 +630,7 @@ static void esp_reg_write(ESPState *s, uint32_t saddr, uint64_t val)
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esp_raise_irq(s);
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break;
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default:
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ESP_ERROR("Unhandled ESP command (%2.2x)\n", (unsigned)val);
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trace_esp_error_unhandled_command(val);
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break;
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}
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break;
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@ -646,7 +645,7 @@ static void esp_reg_write(ESPState *s, uint32_t saddr, uint64_t val)
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s->rregs[saddr] = val;
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break;
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default:
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ESP_ERROR("invalid write of 0x%02x at [0x%x]\n", (unsigned)val, saddr);
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trace_esp_error_invalid_write(val, saddr);
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return;
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}
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s->wregs[saddr] = val;
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@ -726,6 +726,9 @@ iscsi_aio_read16_cb(void *iscsi, int status, void *acb, int canceled) "iscsi %p
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iscsi_aio_readv(void *iscsi, int64_t sector_num, int nb_sectors, void *opaque, void *acb) "iscsi %p sector_num %"PRId64" nb_sectors %d opaque %p acb %p"
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# hw/esp.c
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esp_error_fifo_overrun(void) "FIFO overrun"
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esp_error_unhandled_command(uint32_t val) "unhandled command (%2.2x)"
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esp_error_invalid_write(uint32_t val, uint32_t addr) "invalid write of 0x%02x at [0x%x]"
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esp_raise_irq(void) "Raise IRQ"
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esp_lower_irq(void) "Lower IRQ"
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esp_dma_enable(void) "Raise enable"
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