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Xen patches

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- Xen PCI passthrough fixes
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Merge tag 'pull-xen-20220705' of https://xenbits.xen.org/git-http/people/aperard/qemu-dm into staging

Xen patches

- Xen PCI passthrough fixes

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# gpg: Signature made Tue 05 Jul 2022 07:14:51 PM +0530
# gpg:                using RSA key F80C006308E22CFD8A92E7980CF5572FD7FB55AF
# gpg: Good signature from "Anthony PERARD <anthony.perard@gmail.com>" [unknown]
# gpg:                 aka "Anthony PERARD <anthony.perard@citrix.com>" [unknown]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg:          There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 5379 2F71 024C 600F 778A  7161 D8D5 7199 DF83 42C8
#      Subkey fingerprint: F80C 0063 08E2 2CFD 8A92  E798 0CF5 572F D7FB 55AF

* tag 'pull-xen-20220705' of https://xenbits.xen.org/git-http/people/aperard/qemu-dm:
  xen/pass-through: don't create needless register group
  xen/pass-through: merge emulated bits correctly

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
Richard Henderson 2022-07-05 22:13:51 +05:30
parent d82423a697 c0e86b7624
commit 39e19f5f67
1 changed files with 15 additions and 10 deletions
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25
hw/xen/xen_pt_config_init.c
View file

@ -1965,11 +1965,12 @@ static void xen_pt_config_reg_init(XenPCIPassthroughState *s,
if ((data & host_mask) != (val & host_mask)) {
uint32_t new_val;
/* Mask out host (including past size). */
new_val = val & host_mask;
/* Merge emulated ones (excluding the non-emulated ones). */
new_val |= data & host_mask;
/*
* Merge the emulated bits (data) with the host bits (val)
* and mask out the bits past size to enable restoration
* of the proper value for logging below.
*/
new_val = XEN_PT_MERGE_VALUE(val, data, host_mask) & size_mask;
/* Leave intact host and emulated values past the size - even though
* we do not care as we write per reg->size granularity, but for the
* logging below lets have the proper value. */
@ -2031,12 +2032,16 @@ void xen_pt_config_init(XenPCIPassthroughState *s, Error **errp)
}
}
/*
* By default we will trap up to 0x40 in the cfg space.
* If an intel device is pass through we need to trap 0xfc,
* therefore the size should be 0xff.
*/
if (xen_pt_emu_reg_grps[i].grp_id == XEN_PCI_INTEL_OPREGION) {
if (!is_igd_vga_passthrough(&s->real_device) ||
s->real_device.vendor_id != PCI_VENDOR_ID_INTEL) {
continue;
}
/*
* By default we will trap up to 0x40 in the cfg space.
* If an intel device is pass through we need to trap 0xfc,
* therefore the size should be 0xff.
*/
reg_grp_offset = XEN_PCI_INTEL_OPREGION;
}