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https://gitlab.com/qemu-project/qemu
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exec: Return CPUState from qemu_get_cpu()
Move the declaration to qemu/cpu.h and add documentation. The implementation still depends on CPUArchState for CPU iteration. Signed-off-by: Andreas Färber <afaerber@suse.de>
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parent
4a1e40b509
commit
38d8f5c84e
6
exec.c
6
exec.c
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@ -247,10 +247,10 @@ static const VMStateDescription vmstate_cpu_common = {
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};
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};
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#endif
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#endif
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CPUArchState *qemu_get_cpu(int index)
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CPUState *qemu_get_cpu(int index)
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{
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{
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CPUArchState *env = first_cpu;
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CPUArchState *env = first_cpu;
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CPUState *cpu;
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CPUState *cpu = NULL;
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while (env) {
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while (env) {
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cpu = ENV_GET_CPU(env);
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cpu = ENV_GET_CPU(env);
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@ -260,7 +260,7 @@ CPUArchState *qemu_get_cpu(int index)
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env = env->next_cpu;
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env = env->next_cpu;
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}
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}
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return env;
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return cpu;
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}
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}
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void cpu_exec_init(CPUArchState *env)
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void cpu_exec_init(CPUArchState *env)
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@ -277,7 +277,7 @@ static int pxa2xx_gpio_initfn(SysBusDevice *dev)
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s = FROM_SYSBUS(PXA2xxGPIOInfo, dev);
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s = FROM_SYSBUS(PXA2xxGPIOInfo, dev);
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s->cpu = arm_env_get_cpu(qemu_get_cpu(s->ncpu));
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s->cpu = ARM_CPU(qemu_get_cpu(s->ncpu));
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qdev_init_gpio_in(&dev->qdev, pxa2xx_gpio_set, s->lines);
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qdev_init_gpio_in(&dev->qdev, pxa2xx_gpio_set, s->lines);
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qdev_init_gpio_out(&dev->qdev, s->handler, s->lines);
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qdev_init_gpio_out(&dev->qdev, s->handler, s->lines);
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@ -354,7 +354,6 @@ int page_check_range(target_ulong start, target_ulong len, int flags);
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#endif
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#endif
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CPUArchState *cpu_copy(CPUArchState *env);
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CPUArchState *cpu_copy(CPUArchState *env);
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CPUArchState *qemu_get_cpu(int cpu);
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#define CPU_DUMP_CODE 0x00010000
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#define CPU_DUMP_CODE 0x00010000
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#define CPU_DUMP_FPU 0x00020000 /* dump FPU register state, not just integer */
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#define CPU_DUMP_FPU 0x00020000 /* dump FPU register state, not just integer */
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@ -156,5 +156,15 @@ bool cpu_is_stopped(CPUState *cpu);
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*/
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*/
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void run_on_cpu(CPUState *cpu, void (*func)(void *data), void *data);
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void run_on_cpu(CPUState *cpu, void (*func)(void *data), void *data);
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/**
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* qemu_get_cpu:
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* @index: The CPUState@cpu_index value of the CPU to obtain.
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*
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* Gets a CPU matching @index.
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*
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* Returns: The CPU or %NULL if there is no matching CPU.
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*/
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CPUState *qemu_get_cpu(int index);
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#endif
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#endif
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@ -585,8 +585,9 @@ static inline void mips_tc_sleep(MIPSCPU *cpu, int tc)
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walking the list of CPUMIPSStates. */
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walking the list of CPUMIPSStates. */
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static CPUMIPSState *mips_cpu_map_tc(CPUMIPSState *env, int *tc)
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static CPUMIPSState *mips_cpu_map_tc(CPUMIPSState *env, int *tc)
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{
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{
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MIPSCPU *cpu;
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CPUState *cs;
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CPUState *cs;
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CPUMIPSState *other;
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CPUState *other_cs;
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int vpe_idx;
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int vpe_idx;
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int tc_idx = *tc;
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int tc_idx = *tc;
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@ -599,8 +600,12 @@ static CPUMIPSState *mips_cpu_map_tc(CPUMIPSState *env, int *tc)
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cs = CPU(mips_env_get_cpu(env));
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cs = CPU(mips_env_get_cpu(env));
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vpe_idx = tc_idx / cs->nr_threads;
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vpe_idx = tc_idx / cs->nr_threads;
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*tc = tc_idx % cs->nr_threads;
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*tc = tc_idx % cs->nr_threads;
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other = qemu_get_cpu(vpe_idx);
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other_cs = qemu_get_cpu(vpe_idx);
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return other ? other : env;
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if (other_cs == NULL) {
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return env;
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}
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cpu = MIPS_CPU(other_cs);
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return &cpu->env;
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}
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}
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/* The per VPE CP0_Status register shares some fields with the per TC
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/* The per VPE CP0_Status register shares some fields with the per TC
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