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https://gitlab.com/qemu-project/qemu
synced 2024-09-06 18:05:37 +00:00
tcg-sparc: Fixup function argument types
Use TCGReg everywhere appropriate. Use int32_t for all arguments that may be registers or immediate constants. Merge tcg_out_addi into its only caller. Signed-off-by: Richard Henderson <rth@twiddle.net>
This commit is contained in:
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b357f902bf
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35e2da1556
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@ -390,22 +390,20 @@ static inline int tcg_target_const_match(tcg_target_long val, TCGType type,
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}
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}
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static inline void tcg_out_arith(TCGContext *s, int rd, int rs1, int rs2,
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int op)
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static inline void tcg_out_arith(TCGContext *s, TCGReg rd, TCGReg rs1,
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TCGReg rs2, int op)
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{
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tcg_out32(s, op | INSN_RD(rd) | INSN_RS1(rs1) |
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INSN_RS2(rs2));
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tcg_out32(s, op | INSN_RD(rd) | INSN_RS1(rs1) | INSN_RS2(rs2));
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}
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static inline void tcg_out_arithi(TCGContext *s, int rd, int rs1,
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uint32_t offset, int op)
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static inline void tcg_out_arithi(TCGContext *s, TCGReg rd, TCGReg rs1,
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int32_t offset, int op)
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{
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tcg_out32(s, op | INSN_RD(rd) | INSN_RS1(rs1) |
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INSN_IMM13(offset));
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tcg_out32(s, op | INSN_RD(rd) | INSN_RS1(rs1) | INSN_IMM13(offset));
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}
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static void tcg_out_arithc(TCGContext *s, int rd, int rs1,
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int val2, int val2const, int op)
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static void tcg_out_arithc(TCGContext *s, TCGReg rd, TCGReg rs1,
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int32_t val2, int val2const, int op)
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{
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tcg_out32(s, op | INSN_RD(rd) | INSN_RS1(rs1)
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| (val2const ? INSN_IMM13(val2) : INSN_RS2(val2)));
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@ -419,12 +417,12 @@ static inline void tcg_out_mov(TCGContext *s, TCGType type,
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}
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}
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static inline void tcg_out_sethi(TCGContext *s, int ret, uint32_t arg)
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static inline void tcg_out_sethi(TCGContext *s, TCGReg ret, uint32_t arg)
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{
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tcg_out32(s, SETHI | INSN_RD(ret) | ((arg & 0xfffffc00) >> 10));
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}
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static inline void tcg_out_movi_imm13(TCGContext *s, int ret, uint32_t arg)
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static inline void tcg_out_movi_imm13(TCGContext *s, TCGReg ret, int32_t arg)
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{
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tcg_out_arithi(s, ret, TCG_REG_G0, arg, ARITH_OR);
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}
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@ -471,14 +469,14 @@ static void tcg_out_movi(TCGContext *s, TCGType type,
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}
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}
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static inline void tcg_out_ldst_rr(TCGContext *s, int data, int a1,
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int a2, int op)
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static inline void tcg_out_ldst_rr(TCGContext *s, TCGReg data, TCGReg a1,
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TCGReg a2, int op)
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{
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tcg_out32(s, op | INSN_RD(data) | INSN_RS1(a1) | INSN_RS2(a2));
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}
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static inline void tcg_out_ldst(TCGContext *s, int ret, int addr,
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int offset, int op)
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static void tcg_out_ldst(TCGContext *s, TCGReg ret, TCGReg addr,
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intptr_t offset, int op)
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{
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if (check_fit_ptr(offset, 13)) {
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tcg_out32(s, op | INSN_RD(ret) | INSN_RS1(addr) |
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@ -501,40 +499,24 @@ static inline void tcg_out_st(TCGContext *s, TCGType type, TCGReg arg,
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tcg_out_ldst(s, arg, arg1, arg2, (type == TCG_TYPE_I32 ? STW : STX));
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}
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static inline void tcg_out_ld_ptr(TCGContext *s, TCGReg ret, uintptr_t arg)
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static void tcg_out_ld_ptr(TCGContext *s, TCGReg ret, uintptr_t arg)
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{
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TCGReg base = TCG_REG_G0;
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if (!check_fit_ptr(arg, 10)) {
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tcg_out_movi(s, TCG_TYPE_PTR, ret, arg & ~0x3ff);
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base = ret;
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}
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tcg_out_ld(s, TCG_TYPE_PTR, ret, base, arg & 0x3ff);
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tcg_out_movi(s, TCG_TYPE_PTR, ret, arg & ~0x3ff);
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tcg_out_ld(s, TCG_TYPE_PTR, ret, ret, arg & 0x3ff);
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}
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static inline void tcg_out_sety(TCGContext *s, int rs)
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static inline void tcg_out_sety(TCGContext *s, TCGReg rs)
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{
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tcg_out32(s, WRY | INSN_RS1(TCG_REG_G0) | INSN_RS2(rs));
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}
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static inline void tcg_out_rdy(TCGContext *s, int rd)
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static inline void tcg_out_rdy(TCGContext *s, TCGReg rd)
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{
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tcg_out32(s, RDY | INSN_RD(rd));
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}
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static inline void tcg_out_addi(TCGContext *s, int reg, tcg_target_long val)
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{
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if (val != 0) {
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if (check_fit_tl(val, 13))
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tcg_out_arithi(s, reg, reg, val, ARITH_ADD);
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else {
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tcg_out_movi(s, TCG_TYPE_PTR, TCG_REG_T1, val);
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tcg_out_arith(s, reg, reg, TCG_REG_T1, ARITH_ADD);
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}
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}
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}
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static void tcg_out_div32(TCGContext *s, int rd, int rs1,
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int val2, int val2const, int uns)
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static void tcg_out_div32(TCGContext *s, TCGReg rd, TCGReg rs1,
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int32_t val2, int val2const, int uns)
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{
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/* Load Y with the sign/zero extension of RS1 to 64-bits. */
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if (uns) {
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@ -595,37 +577,37 @@ static void tcg_out_bpcc(TCGContext *s, int scond, int flags, int label)
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tcg_out_bpcc0(s, scond, flags, off19);
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}
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static void tcg_out_cmp(TCGContext *s, TCGArg c1, TCGArg c2, int c2const)
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static void tcg_out_cmp(TCGContext *s, TCGReg c1, int32_t c2, int c2const)
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{
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tcg_out_arithc(s, TCG_REG_G0, c1, c2, c2const, ARITH_SUBCC);
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}
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static void tcg_out_brcond_i32(TCGContext *s, TCGCond cond, TCGArg arg1,
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TCGArg arg2, int const_arg2, int label)
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static void tcg_out_brcond_i32(TCGContext *s, TCGCond cond, TCGReg arg1,
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int32_t arg2, int const_arg2, int label)
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{
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tcg_out_cmp(s, arg1, arg2, const_arg2);
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tcg_out_bpcc(s, tcg_cond_to_bcond[cond], BPCC_ICC | BPCC_PT, label);
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tcg_out_nop(s);
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}
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static void tcg_out_movcc(TCGContext *s, TCGCond cond, int cc, TCGArg ret,
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TCGArg v1, int v1const)
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static void tcg_out_movcc(TCGContext *s, TCGCond cond, int cc, TCGReg ret,
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int32_t v1, int v1const)
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{
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tcg_out32(s, ARITH_MOVCC | cc | INSN_RD(ret)
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| INSN_RS1(tcg_cond_to_bcond[cond])
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| (v1const ? INSN_IMM11(v1) : INSN_RS2(v1)));
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}
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static void tcg_out_movcond_i32(TCGContext *s, TCGCond cond, TCGArg ret,
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TCGArg c1, TCGArg c2, int c2const,
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TCGArg v1, int v1const)
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static void tcg_out_movcond_i32(TCGContext *s, TCGCond cond, TCGReg ret,
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TCGReg c1, int32_t c2, int c2const,
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int32_t v1, int v1const)
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{
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tcg_out_cmp(s, c1, c2, c2const);
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tcg_out_movcc(s, cond, MOVCC_ICC, ret, v1, v1const);
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}
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static void tcg_out_brcond_i64(TCGContext *s, TCGCond cond, TCGArg arg1,
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TCGArg arg2, int const_arg2, int label)
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static void tcg_out_brcond_i64(TCGContext *s, TCGCond cond, TCGReg arg1,
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int32_t arg2, int const_arg2, int label)
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{
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/* For 64-bit signed comparisons vs zero, we can avoid the compare. */
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if (arg2 == 0 && !is_unsigned_cond(cond)) {
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@ -648,23 +630,23 @@ static void tcg_out_brcond_i64(TCGContext *s, TCGCond cond, TCGArg arg1,
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tcg_out_nop(s);
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}
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static void tcg_out_movr(TCGContext *s, TCGCond cond, TCGArg ret, TCGArg c1,
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TCGArg v1, int v1const)
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static void tcg_out_movr(TCGContext *s, TCGCond cond, TCGReg ret, TCGReg c1,
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int32_t v1, int v1const)
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{
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tcg_out32(s, ARITH_MOVR | INSN_RD(ret) | INSN_RS1(c1)
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| (tcg_cond_to_rcond[cond] << 10)
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| (v1const ? INSN_IMM10(v1) : INSN_RS2(v1)));
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}
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static void tcg_out_movcond_i64(TCGContext *s, TCGCond cond, TCGArg ret,
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TCGArg c1, TCGArg c2, int c2const,
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TCGArg v1, int v1const)
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static void tcg_out_movcond_i64(TCGContext *s, TCGCond cond, TCGReg ret,
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TCGReg c1, int32_t c2, int c2const,
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int32_t v1, int v1const)
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{
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/* For 64-bit signed comparisons vs zero, we can avoid the compare.
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Note that the immediate range is one bit smaller, so we must check
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for that as well. */
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if (c2 == 0 && !is_unsigned_cond(cond)
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&& (!v1const || check_fit_tl(v1, 10))) {
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&& (!v1const || check_fit_i32(v1, 10))) {
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tcg_out_movr(s, cond, ret, c1, v1, v1const);
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} else {
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tcg_out_cmp(s, c1, c2, c2const);
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@ -672,8 +654,8 @@ static void tcg_out_movcond_i64(TCGContext *s, TCGCond cond, TCGArg ret,
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}
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}
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static void tcg_out_setcond_i32(TCGContext *s, TCGCond cond, TCGArg ret,
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TCGArg c1, TCGArg c2, int c2const)
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static void tcg_out_setcond_i32(TCGContext *s, TCGCond cond, TCGReg ret,
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TCGReg c1, int32_t c2, int c2const)
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{
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/* For 32-bit comparisons, we can play games with ADDX/SUBX. */
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switch (cond) {
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@ -698,7 +680,7 @@ static void tcg_out_setcond_i32(TCGContext *s, TCGCond cond, TCGArg ret,
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swap the operands on GTU/LEU. There's no benefit to loading
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the constant into a temporary register. */
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if (!c2const || c2 == 0) {
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TCGArg t = c1;
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TCGReg t = c1;
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c1 = c2;
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c2 = t;
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c2const = 0;
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@ -722,8 +704,8 @@ static void tcg_out_setcond_i32(TCGContext *s, TCGCond cond, TCGArg ret,
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}
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}
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static void tcg_out_setcond_i64(TCGContext *s, TCGCond cond, TCGArg ret,
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TCGArg c1, TCGArg c2, int c2const)
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static void tcg_out_setcond_i64(TCGContext *s, TCGCond cond, TCGReg ret,
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TCGReg c1, int32_t c2, int c2const)
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{
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/* For 64-bit signed comparisons vs zero, we can avoid the compare
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if the input does not overlap the output. */
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@ -737,11 +719,11 @@ static void tcg_out_setcond_i64(TCGContext *s, TCGCond cond, TCGArg ret,
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}
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}
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static void tcg_out_addsub2(TCGContext *s, TCGArg rl, TCGArg rh,
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TCGArg al, TCGArg ah, TCGArg bl, int blconst,
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TCGArg bh, int bhconst, int opl, int oph)
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static void tcg_out_addsub2(TCGContext *s, TCGReg rl, TCGReg rh,
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TCGReg al, TCGReg ah, int32_t bl, int blconst,
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int32_t bh, int bhconst, int opl, int oph)
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{
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TCGArg tmp = TCG_REG_T1;
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TCGReg tmp = TCG_REG_T1;
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/* Note that the low parts are fully consumed before tmp is set. */
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if (rl != ah && (bhconst || rl != bh)) {
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@ -753,7 +735,7 @@ static void tcg_out_addsub2(TCGContext *s, TCGArg rl, TCGArg rh,
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tcg_out_mov(s, TCG_TYPE_I32, rl, tmp);
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}
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static inline void tcg_out_calli(TCGContext *s, uintptr_t dest)
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static void tcg_out_calli(TCGContext *s, uintptr_t dest)
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{
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intptr_t disp = dest - (uintptr_t)s->code_ptr;
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@ -960,7 +942,10 @@ static TCGReg tcg_out_tlb_load(TCGContext *s, TCGReg addr, int mem_index,
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/* Find a base address that can load both tlb comparator and addend. */
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tlb_ofs = offsetof(CPUArchState, tlb_table[mem_index][0]);
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if (!check_fit_ptr(tlb_ofs + sizeof(CPUTLBEntry), 13)) {
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tcg_out_addi(s, r1, tlb_ofs & ~0x3ff);
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if (tlb_ofs & ~0x3ff) {
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tcg_out_movi(s, TCG_TYPE_PTR, TCG_REG_T1, tlb_ofs & ~0x3ff);
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tcg_out_arith(s, r1, r1, TCG_REG_T1, ARITH_ADD);
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}
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tlb_ofs &= 0x3ff;
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}
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