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target/i386: introduce function to set rounding mode from FPCW or MXCSR bits

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VROUND, FSTCW and STMXCSR all have to perform the same conversion from
x86 rounding modes to softfloat constants.  Since the ISA is consistent
on the meaning of the two-bit rounding modes, extract the common code
into a wrapper for set_float_rounding_mode.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
This commit is contained in:
Paolo Bonzini 2022-10-19 14:01:36 +02:00
parent 0d4bcac3ca
commit 314d3eff66
2 changed files with 25 additions and 95 deletions
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60
target/i386/ops_sse.h
View file

@ -1684,20 +1684,7 @@ void glue(helper_roundps, SUFFIX)(CPUX86State *env, Reg *d, Reg *s,
prev_rounding_mode = env->sse_status.float_rounding_mode;
if (!(mode & (1 << 2))) {
switch (mode & 3) {
case 0:
set_float_rounding_mode(float_round_nearest_even, &env->sse_status);
break;
case 1:
set_float_rounding_mode(float_round_down, &env->sse_status);
break;
case 2:
set_float_rounding_mode(float_round_up, &env->sse_status);
break;
case 3:
set_float_rounding_mode(float_round_to_zero, &env->sse_status);
break;
}
set_x86_rounding_mode(mode & 3, &env->sse_status);
}
for (i = 0; i < 2 << SHIFT; i++) {
@ -1721,20 +1708,7 @@ void glue(helper_roundpd, SUFFIX)(CPUX86State *env, Reg *d, Reg *s,
prev_rounding_mode = env->sse_status.float_rounding_mode;
if (!(mode & (1 << 2))) {
switch (mode & 3) {
case 0:
set_float_rounding_mode(float_round_nearest_even, &env->sse_status);
break;
case 1:
set_float_rounding_mode(float_round_down, &env->sse_status);
break;
case 2:
set_float_rounding_mode(float_round_up, &env->sse_status);
break;
case 3:
set_float_rounding_mode(float_round_to_zero, &env->sse_status);
break;
}
set_x86_rounding_mode(mode & 3, &env->sse_status);
}
for (i = 0; i < 1 << SHIFT; i++) {
@ -1759,20 +1733,7 @@ void glue(helper_roundss, SUFFIX)(CPUX86State *env, Reg *d, Reg *v, Reg *s,
prev_rounding_mode = env->sse_status.float_rounding_mode;
if (!(mode & (1 << 2))) {
switch (mode & 3) {
case 0:
set_float_rounding_mode(float_round_nearest_even, &env->sse_status);
break;
case 1:
set_float_rounding_mode(float_round_down, &env->sse_status);
break;
case 2:
set_float_rounding_mode(float_round_up, &env->sse_status);
break;
case 3:
set_float_rounding_mode(float_round_to_zero, &env->sse_status);
break;
}
set_x86_rounding_mode(mode & 3, &env->sse_status);
}
d->ZMM_S(0) = float32_round_to_int(s->ZMM_S(0), &env->sse_status);
@ -1797,20 +1758,7 @@ void glue(helper_roundsd, SUFFIX)(CPUX86State *env, Reg *d, Reg *v, Reg *s,
prev_rounding_mode = env->sse_status.float_rounding_mode;
if (!(mode & (1 << 2))) {
switch (mode & 3) {
case 0:
set_float_rounding_mode(float_round_nearest_even, &env->sse_status);
break;
case 1:
set_float_rounding_mode(float_round_down, &env->sse_status);
break;
case 2:
set_float_rounding_mode(float_round_up, &env->sse_status);
break;
case 3:
set_float_rounding_mode(float_round_to_zero, &env->sse_status);
break;
}
set_x86_rounding_mode(mode & 3, &env->sse_status);
}
d->ZMM_D(0) = float64_round_to_int(s->ZMM_D(0), &env->sse_status);

60
target/i386/tcg/fpu_helper.c
View file

@ -32,7 +32,8 @@
#define ST(n) (env->fpregs[(env->fpstt + (n)) & 7].d)
#define ST1 ST(1)
#define FPU_RC_MASK 0xc00
#define FPU_RC_SHIFT 10
#define FPU_RC_MASK (3 << FPU_RC_SHIFT)
#define FPU_RC_NEAR 0x000
#define FPU_RC_DOWN 0x400
#define FPU_RC_UP 0x800
@ -685,28 +686,26 @@ uint32_t helper_fnstcw(CPUX86State *env)
return env->fpuc;
}
static void set_x86_rounding_mode(unsigned mode, float_status *status)
{
static FloatRoundMode x86_round_mode[4] = {
float_round_nearest_even,
float_round_down,
float_round_up,
float_round_to_zero
};
assert(mode < ARRAY_SIZE(x86_round_mode));
set_float_rounding_mode(x86_round_mode[mode], status);
}
void update_fp_status(CPUX86State *env)
{
FloatRoundMode rnd_mode;
int rnd_mode;
FloatX80RoundPrec rnd_prec;
/* set rounding mode */
switch (env->fpuc & FPU_RC_MASK) {
default:
case FPU_RC_NEAR:
rnd_mode = float_round_nearest_even;
break;
case FPU_RC_DOWN:
rnd_mode = float_round_down;
break;
case FPU_RC_UP:
rnd_mode = float_round_up;
break;
case FPU_RC_CHOP:
rnd_mode = float_round_to_zero;
break;
}
set_float_rounding_mode(rnd_mode, &env->fp_status);
rnd_mode = (env->fpuc & FPU_RC_MASK) >> FPU_RC_SHIFT;
set_x86_rounding_mode(rnd_mode, &env->fp_status);
switch ((env->fpuc >> 8) & 3) {
case 0:
@ -3038,11 +3037,8 @@ void helper_xsetbv(CPUX86State *env, uint32_t ecx, uint64_t mask)
/* XXX: optimize by storing fptt and fptags in the static cpu state */
#define SSE_DAZ 0x0040
#define SSE_RC_MASK 0x6000
#define SSE_RC_NEAR 0x0000
#define SSE_RC_DOWN 0x2000
#define SSE_RC_UP 0x4000
#define SSE_RC_CHOP 0x6000
#define SSE_RC_SHIFT 13
#define SSE_RC_MASK (3 << SSE_RC_SHIFT)
#define SSE_FZ 0x8000
void update_mxcsr_status(CPUX86State *env)
@ -3051,22 +3047,8 @@ void update_mxcsr_status(CPUX86State *env)
int rnd_type;
/* set rounding mode */
switch (mxcsr & SSE_RC_MASK) {
default:
case SSE_RC_NEAR:
rnd_type = float_round_nearest_even;
break;
case SSE_RC_DOWN:
rnd_type = float_round_down;
break;
case SSE_RC_UP:
rnd_type = float_round_up;
break;
case SSE_RC_CHOP:
rnd_type = float_round_to_zero;
break;
}
set_float_rounding_mode(rnd_type, &env->sse_status);
rnd_type = (mxcsr & SSE_RC_MASK) >> SSE_RC_SHIFT;
set_x86_rounding_mode(rnd_type, &env->sse_status);
/* Set exception flags. */
set_float_exception_flags((mxcsr & FPUS_IE ? float_flag_invalid : 0) |