From 23609e47c0f62b537ba9803cb15e69993fd0c266 Mon Sep 17 00:00:00 2001 From: Igor Mammedov Date: Wed, 8 Jun 2022 09:53:06 -0400 Subject: [PATCH 01/53] acpi: add interface to build device specific AML There is already ISADeviceClass::build_aml() callback which builds device specific AML blob for some ISA devices. To extend the same idea to other devices, add TYPE_ACPI_DEV_AML_IF Interface that will provide a more generic callback which will be used not only for ISA but other devices. It will allow get rid of some data-mining and ad-hoc AML building, by asking device(s) to generate its own AML blob like it's done for ISA devices. Signed-off-by: Igor Mammedov Acked-by: Gerd Hoffmann Message-Id: <20220608135340.3304695-2-imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- hw/acpi/acpi_interface.c | 8 ++++++ hw/acpi/meson.build | 2 +- include/hw/acpi/acpi_aml_interface.h | 40 ++++++++++++++++++++++++++++ 3 files changed, 49 insertions(+), 1 deletion(-) create mode 100644 include/hw/acpi/acpi_aml_interface.h diff --git a/hw/acpi/acpi_interface.c b/hw/acpi/acpi_interface.c index 6583917b8e..c668d361f6 100644 --- a/hw/acpi/acpi_interface.c +++ b/hw/acpi/acpi_interface.c @@ -1,5 +1,6 @@ #include "qemu/osdep.h" #include "hw/acpi/acpi_dev_interface.h" +#include "hw/acpi/acpi_aml_interface.h" #include "qemu/module.h" void acpi_send_event(DeviceState *dev, AcpiEventStatusBits event) @@ -18,8 +19,15 @@ static void register_types(void) .parent = TYPE_INTERFACE, .class_size = sizeof(AcpiDeviceIfClass), }; + static const TypeInfo acpi_dev_aml_if_info = { + .name = TYPE_ACPI_DEV_AML_IF, + .parent = TYPE_INTERFACE, + .class_size = sizeof(AcpiDevAmlIfClass), + }; + type_register_static(&acpi_dev_if_info); + type_register_static(&acpi_dev_aml_if_info); } type_init(register_types) diff --git a/hw/acpi/meson.build b/hw/acpi/meson.build index cea2f5f93a..f8c820ca94 100644 --- a/hw/acpi/meson.build +++ b/hw/acpi/meson.build @@ -29,7 +29,7 @@ acpi_ss.add(when: 'CONFIG_PC', if_false: files('acpi-x86-stub.c')) if have_tpm acpi_ss.add(files('tpm.c')) endif -softmmu_ss.add(when: 'CONFIG_ACPI', if_false: files('acpi-stub.c', 'aml-build-stub.c', 'ghes-stub.c')) +softmmu_ss.add(when: 'CONFIG_ACPI', if_false: files('acpi-stub.c', 'aml-build-stub.c', 'ghes-stub.c', 'acpi_interface.c')) softmmu_ss.add_all(when: 'CONFIG_ACPI', if_true: acpi_ss) softmmu_ss.add(when: 'CONFIG_ALL', if_true: files('acpi-stub.c', 'aml-build-stub.c', 'acpi-x86-stub.c', 'ipmi-stub.c', 'ghes-stub.c', diff --git a/include/hw/acpi/acpi_aml_interface.h b/include/hw/acpi/acpi_aml_interface.h new file mode 100644 index 0000000000..ab76f0e55d --- /dev/null +++ b/include/hw/acpi/acpi_aml_interface.h @@ -0,0 +1,40 @@ +#ifndef ACPI_AML_INTERFACE_H +#define ACPI_AML_INTERFACE_H + +#include "qom/object.h" +#include "hw/acpi/aml-build.h" + +#define TYPE_ACPI_DEV_AML_IF "acpi-dev-aml-interface" +typedef struct AcpiDevAmlIfClass AcpiDevAmlIfClass; +DECLARE_CLASS_CHECKERS(AcpiDevAmlIfClass, ACPI_DEV_AML_IF, TYPE_ACPI_DEV_AML_IF) +#define ACPI_DEV_AML_IF(obj) \ + INTERFACE_CHECK(AcpiDevAmlIf, (obj), TYPE_ACPI_DEV_AML_IF) + +typedef struct AcpiDevAmlIf AcpiDevAmlIf; +typedef void (*dev_aml_fn)(AcpiDevAmlIf *adev, Aml *scope); + +/** + * AcpiDevAmlIfClass: + * + * build_dev_aml: adds device specific AML blob to provided scope + * + * Interface is designed for providing generic callback that builds device + * specific AML blob. + */ +struct AcpiDevAmlIfClass { + /* */ + InterfaceClass parent_class; + + /* */ + dev_aml_fn build_dev_aml; +}; + +static inline void call_dev_aml_func(DeviceState *dev, Aml *scope) +{ + if (object_dynamic_cast(OBJECT(dev), TYPE_ACPI_DEV_AML_IF)) { + AcpiDevAmlIfClass *klass = ACPI_DEV_AML_IF_GET_CLASS(dev); + klass->build_dev_aml(ACPI_DEV_AML_IF(dev), scope); + } +} + +#endif From f974e0b75b42e50e6f3d529603e316df3e571ca1 Mon Sep 17 00:00:00 2001 From: Igor Mammedov Date: Wed, 8 Jun 2022 09:53:07 -0400 Subject: [PATCH 02/53] acpi: make isa_build_aml() support AcpiDevAmlIf interface To allow incremental conversion from ISADeviceClass::build_aml to AcpiDevAmlIf, add support for the later without removing the former. Once conversion is complete, another commit will drop ISADeviceClass::build_aml related code. Signed-off-by: Igor Mammedov Reviewed-by: Ani Sinha Acked-by: Gerd Hoffmann Message-Id: <20220608135340.3304695-3-imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- hw/isa/isa-bus.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/hw/isa/isa-bus.c b/hw/isa/isa-bus.c index cd5ad3687d..237e2cee12 100644 --- a/hw/isa/isa-bus.c +++ b/hw/isa/isa-bus.c @@ -24,6 +24,7 @@ #include "hw/sysbus.h" #include "sysemu/sysemu.h" #include "hw/isa/isa.h" +#include "hw/acpi/acpi_aml_interface.h" static ISABus *isabus; @@ -196,8 +197,12 @@ void isa_build_aml(ISABus *bus, Aml *scope) QTAILQ_FOREACH(kid, &bus->parent_obj.children, sibling) { dev = ISA_DEVICE(kid->child); dc = ISA_DEVICE_GET_CLASS(dev); + bool has_build_dev_aml = !!object_dynamic_cast(OBJECT(dev), + TYPE_ACPI_DEV_AML_IF); if (dc->build_aml) { dc->build_aml(dev, scope); + } else if (has_build_dev_aml) { + call_dev_aml_func(DEVICE(dev), scope); } } } From e7c72a678ab707e1c76c5cdf9befb410cb25e72c Mon Sep 17 00:00:00 2001 From: Igor Mammedov Date: Wed, 8 Jun 2022 09:53:08 -0400 Subject: [PATCH 03/53] acpi: fdc-isa: replace ISADeviceClass::build_aml with AcpiDevAmlIfClass:build_dev_aml Signed-off-by: Igor Mammedov Acked-by: Gerd Hoffmann Message-Id: <20220608135340.3304695-4-imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- hw/block/fdc-isa.c | 16 ++++++++++------ hw/i386/acpi-build.c | 1 - 2 files changed, 10 insertions(+), 7 deletions(-) diff --git a/hw/block/fdc-isa.c b/hw/block/fdc-isa.c index fa20450747..fee1ca68a8 100644 --- a/hw/block/fdc-isa.c +++ b/hw/block/fdc-isa.c @@ -32,7 +32,7 @@ #include "qapi/error.h" #include "qemu/error-report.h" #include "qemu/timer.h" -#include "hw/acpi/aml-build.h" +#include "hw/acpi/acpi_aml_interface.h" #include "hw/irq.h" #include "hw/isa/isa.h" #include "hw/qdev-properties.h" @@ -214,9 +214,9 @@ int cmos_get_fd_drive_type(FloppyDriveType fd0) return val; } -static void fdc_isa_build_aml(ISADevice *isadev, Aml *scope) +static void build_fdc_aml(AcpiDevAmlIf *adev, Aml *scope) { - FDCtrlISABus *isa = ISA_FDC(isadev); + FDCtrlISABus *isa = ISA_FDC(adev); Aml *dev; Aml *crs; int i; @@ -241,7 +241,7 @@ static void fdc_isa_build_aml(ISADevice *isadev, Aml *scope) aml_append(dev, aml_name_decl("_CRS", crs)); for (i = 0; i < MIN(MAX_FD, ACPI_FDE_MAX_FD); i++) { - FloppyDriveType type = isa_fdc_get_drive_type(isadev, i); + FloppyDriveType type = isa_fdc_get_drive_type(ISA_DEVICE(adev), i); if (type < FLOPPY_DRIVE_TYPE_NONE) { fde_buf[i] = cpu_to_le32(1); /* drive present */ @@ -283,14 +283,14 @@ static Property isa_fdc_properties[] = { static void isabus_fdc_class_init(ObjectClass *klass, void *data) { DeviceClass *dc = DEVICE_CLASS(klass); - ISADeviceClass *isa = ISA_DEVICE_CLASS(klass); + AcpiDevAmlIfClass *adevc = ACPI_DEV_AML_IF_CLASS(klass); dc->desc = "virtual floppy controller"; dc->realize = isabus_fdc_realize; dc->fw_name = "fdc"; dc->reset = fdctrl_external_reset_isa; dc->vmsd = &vmstate_isa_fdc; - isa->build_aml = fdc_isa_build_aml; + adevc->build_dev_aml = build_fdc_aml; device_class_set_props(dc, isa_fdc_properties); set_bit(DEVICE_CATEGORY_STORAGE, dc->categories); } @@ -313,6 +313,10 @@ static const TypeInfo isa_fdc_info = { .instance_size = sizeof(FDCtrlISABus), .class_init = isabus_fdc_class_init, .instance_init = isabus_fdc_instance_init, + .interfaces = (InterfaceInfo[]) { + { TYPE_ACPI_DEV_AML_IF }, + { }, + }, }; static void isa_fdc_register_types(void) diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c index c125939ed6..1449832aa9 100644 --- a/hw/i386/acpi-build.c +++ b/hw/i386/acpi-build.c @@ -40,7 +40,6 @@ #include "hw/acpi/bios-linker-loader.h" #include "hw/isa/isa.h" #include "hw/input/i8042.h" -#include "hw/block/fdc.h" #include "hw/acpi/memory_hotplug.h" #include "sysemu/tpm.h" #include "hw/acpi/tpm.h" From ef26fc47baf57be482e5d32bfe9b4769906f5eb7 Mon Sep 17 00:00:00 2001 From: Igor Mammedov Date: Wed, 8 Jun 2022 09:53:09 -0400 Subject: [PATCH 04/53] acpi: parallel port: replace ISADeviceClass::build_aml with AcpiDevAmlIfClass:build_dev_aml Signed-off-by: Igor Mammedov Acked-by: Gerd Hoffmann Message-Id: <20220608135340.3304695-5-imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- hw/char/parallel.c | 14 +++++++++----- 1 file changed, 9 insertions(+), 5 deletions(-) diff --git a/hw/char/parallel.c b/hw/char/parallel.c index f735a6cd7f..1c9ca47820 100644 --- a/hw/char/parallel.c +++ b/hw/char/parallel.c @@ -28,7 +28,7 @@ #include "qemu/module.h" #include "chardev/char-parallel.h" #include "chardev/char-fe.h" -#include "hw/acpi/aml-build.h" +#include "hw/acpi/acpi_aml_interface.h" #include "hw/irq.h" #include "hw/isa/isa.h" #include "hw/qdev-properties.h" @@ -570,9 +570,9 @@ static void parallel_isa_realizefn(DeviceState *dev, Error **errp) s, "parallel"); } -static void parallel_isa_build_aml(ISADevice *isadev, Aml *scope) +static void parallel_isa_build_aml(AcpiDevAmlIf *adev, Aml *scope) { - ISAParallelState *isa = ISA_PARALLEL(isadev); + ISAParallelState *isa = ISA_PARALLEL(adev); Aml *dev; Aml *crs; @@ -645,11 +645,11 @@ static Property parallel_isa_properties[] = { static void parallel_isa_class_initfn(ObjectClass *klass, void *data) { DeviceClass *dc = DEVICE_CLASS(klass); - ISADeviceClass *isa = ISA_DEVICE_CLASS(klass); + AcpiDevAmlIfClass *adevc = ACPI_DEV_AML_IF_CLASS(klass); dc->realize = parallel_isa_realizefn; dc->vmsd = &vmstate_parallel_isa; - isa->build_aml = parallel_isa_build_aml; + adevc->build_dev_aml = parallel_isa_build_aml; device_class_set_props(dc, parallel_isa_properties); set_bit(DEVICE_CATEGORY_INPUT, dc->categories); } @@ -659,6 +659,10 @@ static const TypeInfo parallel_isa_info = { .parent = TYPE_ISA_DEVICE, .instance_size = sizeof(ISAParallelState), .class_init = parallel_isa_class_initfn, + .interfaces = (InterfaceInfo[]) { + { TYPE_ACPI_DEV_AML_IF }, + { }, + }, }; static void parallel_register_types(void) From 0d170dc13c54d46566fb1717f9342826b8c0c7de Mon Sep 17 00:00:00 2001 From: Igor Mammedov Date: Wed, 8 Jun 2022 09:53:10 -0400 Subject: [PATCH 05/53] acpi: serial-is: replace ISADeviceClass::build_aml with AcpiDevAmlIfClass:build_dev_aml Signed-off-by: Igor Mammedov Acked-by: Gerd Hoffmann Message-Id: <20220608135340.3304695-6-imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- hw/char/serial-isa.c | 14 +++++++++----- 1 file changed, 9 insertions(+), 5 deletions(-) diff --git a/hw/char/serial-isa.c b/hw/char/serial-isa.c index 7a7ed239cd..141a6cb168 100644 --- a/hw/char/serial-isa.c +++ b/hw/char/serial-isa.c @@ -27,7 +27,7 @@ #include "qapi/error.h" #include "qemu/module.h" #include "sysemu/sysemu.h" -#include "hw/acpi/aml-build.h" +#include "hw/acpi/acpi_aml_interface.h" #include "hw/char/serial.h" #include "hw/isa/isa.h" #include "hw/qdev-properties.h" @@ -83,9 +83,9 @@ static void serial_isa_realizefn(DeviceState *dev, Error **errp) isa_register_ioport(isadev, &s->io, isa->iobase); } -static void serial_isa_build_aml(ISADevice *isadev, Aml *scope) +static void serial_isa_build_aml(AcpiDevAmlIf *adev, Aml *scope) { - ISASerialState *isa = ISA_SERIAL(isadev); + ISASerialState *isa = ISA_SERIAL(adev); Aml *dev; Aml *crs; @@ -122,11 +122,11 @@ static Property serial_isa_properties[] = { static void serial_isa_class_initfn(ObjectClass *klass, void *data) { DeviceClass *dc = DEVICE_CLASS(klass); - ISADeviceClass *isa = ISA_DEVICE_CLASS(klass); + AcpiDevAmlIfClass *adevc = ACPI_DEV_AML_IF_CLASS(klass); dc->realize = serial_isa_realizefn; dc->vmsd = &vmstate_isa_serial; - isa->build_aml = serial_isa_build_aml; + adevc->build_dev_aml = serial_isa_build_aml; device_class_set_props(dc, serial_isa_properties); set_bit(DEVICE_CATEGORY_INPUT, dc->categories); } @@ -146,6 +146,10 @@ static const TypeInfo serial_isa_info = { .instance_size = sizeof(ISASerialState), .instance_init = serial_isa_initfn, .class_init = serial_isa_class_initfn, + .interfaces = (InterfaceInfo[]) { + { TYPE_ACPI_DEV_AML_IF }, + { }, + }, }; static void serial_register_types(void) From d9cf178cc0bcad20fb2c6f1a08bb24a2b45c1c77 Mon Sep 17 00:00:00 2001 From: Igor Mammedov Date: Wed, 8 Jun 2022 09:53:11 -0400 Subject: [PATCH 06/53] acpi: mc146818rtc: replace ISADeviceClass::build_aml with AcpiDevAmlIfClass:build_dev_aml Signed-off-by: Igor Mammedov Acked-by: Gerd Hoffmann Message-Id: <20220608135340.3304695-7-imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- hw/rtc/mc146818rtc.c | 14 +++++++++----- 1 file changed, 9 insertions(+), 5 deletions(-) diff --git a/hw/rtc/mc146818rtc.c b/hw/rtc/mc146818rtc.c index f235c2ddbe..ef9765bb8f 100644 --- a/hw/rtc/mc146818rtc.c +++ b/hw/rtc/mc146818rtc.c @@ -26,7 +26,7 @@ #include "qemu/cutils.h" #include "qemu/module.h" #include "qemu/bcd.h" -#include "hw/acpi/aml-build.h" +#include "hw/acpi/acpi_aml_interface.h" #include "hw/irq.h" #include "hw/qdev-properties.h" #include "hw/qdev-properties-system.h" @@ -1017,9 +1017,9 @@ static void rtc_reset_hold(Object *obj) qemu_irq_lower(s->irq); } -static void rtc_build_aml(ISADevice *isadev, Aml *scope) +static void rtc_build_aml(AcpiDevAmlIf *adev, Aml *scope) { - RTCState *s = MC146818_RTC(isadev); + RTCState *s = MC146818_RTC(adev); Aml *dev; Aml *crs; @@ -1043,13 +1043,13 @@ static void rtc_class_initfn(ObjectClass *klass, void *data) { DeviceClass *dc = DEVICE_CLASS(klass); ResettableClass *rc = RESETTABLE_CLASS(klass); - ISADeviceClass *isa = ISA_DEVICE_CLASS(klass); + AcpiDevAmlIfClass *adevc = ACPI_DEV_AML_IF_CLASS(klass); dc->realize = rtc_realizefn; dc->vmsd = &vmstate_rtc; rc->phases.enter = rtc_reset_enter; rc->phases.hold = rtc_reset_hold; - isa->build_aml = rtc_build_aml; + adevc->build_dev_aml = rtc_build_aml; device_class_set_props(dc, mc146818rtc_properties); set_bit(DEVICE_CATEGORY_MISC, dc->categories); } @@ -1059,6 +1059,10 @@ static const TypeInfo mc146818rtc_info = { .parent = TYPE_ISA_DEVICE, .instance_size = sizeof(RTCState), .class_init = rtc_class_initfn, + .interfaces = (InterfaceInfo[]) { + { TYPE_ACPI_DEV_AML_IF }, + { }, + }, }; static void mc146818rtc_register_types(void) From 68f01317b4e43ef67ef9cffd646773a4db857fbf Mon Sep 17 00:00:00 2001 From: Igor Mammedov Date: Wed, 8 Jun 2022 09:53:12 -0400 Subject: [PATCH 07/53] acpi: pckbd: replace ISADeviceClass::build_aml with AcpiDevAmlIfClass:build_dev_aml Signed-off-by: Igor Mammedov Acked-by: Gerd Hoffmann Message-Id: <20220608135340.3304695-8-imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- hw/input/pckbd.c | 14 +++++++++----- 1 file changed, 9 insertions(+), 5 deletions(-) diff --git a/hw/input/pckbd.c b/hw/input/pckbd.c index 4efdf75620..45c40fe3f3 100644 --- a/hw/input/pckbd.c +++ b/hw/input/pckbd.c @@ -29,7 +29,7 @@ #include "qapi/error.h" #include "hw/isa/isa.h" #include "migration/vmstate.h" -#include "hw/acpi/aml-build.h" +#include "hw/acpi/acpi_aml_interface.h" #include "hw/input/ps2.h" #include "hw/irq.h" #include "hw/input/i8042.h" @@ -767,9 +767,9 @@ static void i8042_realizefn(DeviceState *dev, Error **errp) qemu_register_reset(kbd_reset, s); } -static void i8042_build_aml(ISADevice *isadev, Aml *scope) +static void i8042_build_aml(AcpiDevAmlIf *adev, Aml *scope) { - ISAKBDState *isa_s = I8042(isadev); + ISAKBDState *isa_s = I8042(adev); Aml *kbd; Aml *mou; Aml *crs; @@ -807,12 +807,12 @@ static Property i8042_properties[] = { static void i8042_class_initfn(ObjectClass *klass, void *data) { DeviceClass *dc = DEVICE_CLASS(klass); - ISADeviceClass *isa = ISA_DEVICE_CLASS(klass); + AcpiDevAmlIfClass *adevc = ACPI_DEV_AML_IF_CLASS(klass); device_class_set_props(dc, i8042_properties); dc->realize = i8042_realizefn; dc->vmsd = &vmstate_kbd_isa; - isa->build_aml = i8042_build_aml; + adevc->build_dev_aml = i8042_build_aml; set_bit(DEVICE_CATEGORY_INPUT, dc->categories); } @@ -822,6 +822,10 @@ static const TypeInfo i8042_info = { .instance_size = sizeof(ISAKBDState), .instance_init = i8042_initfn, .class_init = i8042_class_initfn, + .interfaces = (InterfaceInfo[]) { + { TYPE_ACPI_DEV_AML_IF }, + { }, + }, }; static void i8042_register_types(void) From a576158ee9e68d3237bb5a2b0ff0280b291e7972 Mon Sep 17 00:00:00 2001 From: Igor Mammedov Date: Wed, 8 Jun 2022 09:53:13 -0400 Subject: [PATCH 08/53] isa-bus: drop no longer used ISADeviceClass::build_aml Signed-off-by: Igor Mammedov Acked-by: Gerd Hoffmann Message-Id: <20220608135340.3304695-9-imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- hw/isa/isa-bus.c | 12 +----------- include/hw/isa/isa.h | 1 - 2 files changed, 1 insertion(+), 12 deletions(-) diff --git a/hw/isa/isa-bus.c b/hw/isa/isa-bus.c index 237e2cee12..1bee1a47f1 100644 --- a/hw/isa/isa-bus.c +++ b/hw/isa/isa-bus.c @@ -191,19 +191,9 @@ ISADevice *isa_vga_init(ISABus *bus) void isa_build_aml(ISABus *bus, Aml *scope) { BusChild *kid; - ISADevice *dev; - ISADeviceClass *dc; QTAILQ_FOREACH(kid, &bus->parent_obj.children, sibling) { - dev = ISA_DEVICE(kid->child); - dc = ISA_DEVICE_GET_CLASS(dev); - bool has_build_dev_aml = !!object_dynamic_cast(OBJECT(dev), - TYPE_ACPI_DEV_AML_IF); - if (dc->build_aml) { - dc->build_aml(dev, scope); - } else if (has_build_dev_aml) { - call_dev_aml_func(DEVICE(dev), scope); - } + call_dev_aml_func(DEVICE(kid->child), scope); } } diff --git a/include/hw/isa/isa.h b/include/hw/isa/isa.h index 034d706ba1..5c5a3d43a7 100644 --- a/include/hw/isa/isa.h +++ b/include/hw/isa/isa.h @@ -64,7 +64,6 @@ struct IsaDmaClass { struct ISADeviceClass { DeviceClass parent_class; - void (*build_aml)(ISADevice *dev, Aml *scope); }; struct ISABus { From dc35bfb6e0be460b05193af87c89a7a3cd0dae54 Mon Sep 17 00:00:00 2001 From: Igor Mammedov Date: Wed, 8 Jun 2022 09:53:14 -0400 Subject: [PATCH 09/53] tests: acpi: add and whitelist DSDT.ipmismbus expected blob .. which will be used by follow up smbus-ipmi test-case Signed-off-by: Igor Mammedov Message-Id: <20220608135340.3304695-10-imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- tests/data/acpi/q35/DSDT.ipmismbus | 0 tests/qtest/bios-tables-test-allowed-diff.h | 1 + 2 files changed, 1 insertion(+) create mode 100644 tests/data/acpi/q35/DSDT.ipmismbus diff --git a/tests/data/acpi/q35/DSDT.ipmismbus b/tests/data/acpi/q35/DSDT.ipmismbus new file mode 100644 index 0000000000..e69de29bb2 diff --git a/tests/qtest/bios-tables-test-allowed-diff.h b/tests/qtest/bios-tables-test-allowed-diff.h index dfb8523c8b..b4687d1cc8 100644 --- a/tests/qtest/bios-tables-test-allowed-diff.h +++ b/tests/qtest/bios-tables-test-allowed-diff.h @@ -1 +1,2 @@ /* List of comma-separated changed AML files to ignore */ +"tests/data/acpi/q35/DSDT.ipmismbus", From ac70b4a3f158152f8a60aa882eb8d98b2f041729 Mon Sep 17 00:00:00 2001 From: Igor Mammedov Date: Wed, 8 Jun 2022 09:53:15 -0400 Subject: [PATCH 10/53] tests: acpi: q35: add test for smbus-ipmi device expected new device node: Device (MI1) { Name (_HID, EisaId ("IPI0001")) // _HID: Hardware ID Name (_STR, "ipmi_smbus") // _STR: Description String Name (_UID, One) // _UID: Unique ID Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings { I2cSerialBusV2 (0x0000, ControllerInitiated, 0x000186A0, AddressingMode7Bit, "\\_SB.PCI0.SMB0", 0x00, ResourceProducer, , Exclusive, ) }) Name (_IFT, 0x04) // _IFT: IPMI Interface Type Name (_SRV, 0x0200) // _SRV: IPMI Spec Revision } Signed-off-by: Igor Mammedov Acked-by: Gerd Hoffmann Message-Id: <20220608135340.3304695-11-imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- tests/qtest/bios-tables-test.c | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/tests/qtest/bios-tables-test.c b/tests/qtest/bios-tables-test.c index a4a46e97f0..d896840270 100644 --- a/tests/qtest/bios-tables-test.c +++ b/tests/qtest/bios-tables-test.c @@ -955,6 +955,21 @@ static void test_acpi_q35_tcg_ipmi(void) free_test_data(&data); } +static void test_acpi_q35_tcg_smbus_ipmi(void) +{ + test_data data; + + memset(&data, 0, sizeof(data)); + data.machine = MACHINE_Q35; + data.variant = ".ipmismbus"; + data.required_struct_types = ipmi_required_struct_types; + data.required_struct_types_len = ARRAY_SIZE(ipmi_required_struct_types); + test_acpi_one("-device ipmi-bmc-sim,id=bmc0" + " -device smbus-ipmi,bmc=bmc0", + &data); + free_test_data(&data); +} + static void test_acpi_piix4_tcg_ipmi(void) { test_data data; @@ -1743,6 +1758,7 @@ int main(int argc, char *argv[]) qtest_add_func("acpi/q35/mmio64", test_acpi_q35_tcg_mmio64); qtest_add_func("acpi/piix4/ipmi", test_acpi_piix4_tcg_ipmi); qtest_add_func("acpi/q35/ipmi", test_acpi_q35_tcg_ipmi); + qtest_add_func("acpi/q35/smbus/ipmi", test_acpi_q35_tcg_smbus_ipmi); qtest_add_func("acpi/piix4/cpuhp", test_acpi_piix4_tcg_cphp); qtest_add_func("acpi/q35/cpuhp", test_acpi_q35_tcg_cphp); qtest_add_func("acpi/piix4/memhp", test_acpi_piix4_tcg_memhp); From f4e2fb67bc40b06bf7544536c03e5e234ab5320b Mon Sep 17 00:00:00 2001 From: Igor Mammedov Date: Wed, 8 Jun 2022 09:53:16 -0400 Subject: [PATCH 11/53] tests: acpi: update expected blob DSDT.ipmismbus basic q35 DSDT with an extra device node: Device (MI1) { Name (_HID, EisaId ("IPI0001")) // _HID: Hardware ID Name (_STR, "ipmi_smbus") // _STR: Description String Name (_UID, One) // _UID: Unique ID Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings { I2cSerialBusV2 (0x0000, ControllerInitiated, 0x000186A0, AddressingMode7Bit, "\\_SB.PCI0.SMB0", 0x00, ResourceProducer, , Exclusive, ) }) Name (_IFT, 0x04) // _IFT: IPMI Interface Type Name (_SRV, 0x0200) // _SRV: IPMI Spec Revision } Signed-off-by: Igor Mammedov Message-Id: <20220608135340.3304695-12-imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- tests/data/acpi/q35/DSDT.ipmismbus | Bin 0 -> 8391 bytes tests/qtest/bios-tables-test-allowed-diff.h | 1 - 2 files changed, 1 deletion(-) diff --git a/tests/data/acpi/q35/DSDT.ipmismbus b/tests/data/acpi/q35/DSDT.ipmismbus index e69de29bb2d1d6434b8b29ae775ad8c2e48c5391..07ba873b79caadd73ed9721fcbeee84c57676e2a 100644 GIT binary patch literal 8391 zcmb7JOKcm*8J^`!tL0K!Qk3OaY{E{`M+%3s^JhY z_y6rLX27<-bna|z1|Qz)Z7~AvZ3UJ^2Tp0O>leG7zH2qz zTHfqdYo1-WZ<%J-6-QCCTku-U>~7RNmR+6cuK8~4_G`@bt}G85@xe}d!E!qFe_s0b z?CD>Aapmp8y%I{g>CR>9?cOf?(LyqjM}zucCeK5L!+c!@Ea28TX>9F0bQ7KhAv zmpOG)s4SV)W~nVz8qh|nI{VdTyUuLJ?thnLvCd70;)Rz=4KLShdEH$0xvt+Xuz*^6 z0X1#D*R!17(Ee=DV}o9DG&*3zxz7fh?6;dX`}hCi2kgL_7kx`xb05u8U+#a$VvM0T zPhOzj(0F(HCu@G8%ZC`{&!Q{MT5COG^(@<2nSVMefrRSxpIIq-0E=rBMeoroS?0L4 zSTTC6#|)!lTw~YpdoF@%o&MwXwT(m8{DQ_Zt@t?_p-%teYO}p8bH~K>HZ-hbr7Ffd z(RZSzd2XL)zUZ#i4>@t5F`832526pE%sl6C&J(S+d)S*~c>Q?lfCbDj&oKi-)JQ)Z zqy47qw~gdI+cI%!C~z@$8##P=xz4^{x{O)yH`~I6OH$w#^QFr;QEb#(M)JO(QQ#IE z8}(eX=DnQj7{yh0g=L>;x~0pJ&UuPPqhN;+!MnyTqa2+dQ1b!HK2-o`8j5lS^wkTo zy{wmLdVYOwxEfB4`_KRVKmN1t)jwPMrheitZatt}ufNe7o*!Ii!xMvDD}ovD0l$xI z+_ocjkd7KR>5JW68ZHj5TQfl>9$_iA8T4*#GIp?OHfwH~W$iA0jbMi&=hIgVx>+3e z8$OYnt#&iBa$`S}jN$HNtBsWs6UPRQ%PeD4yA?rDkwFwem1R;f^aC?V;KGPl0M3bX zoCl~3iHZCi8{te~!-$v?8eyCXC}$!hCVIoMQO=Y-h%#bIXjCu(5OxxgvJF^b{?UsGok5BaHfPNbe#xQoim!w8BOPmt`niE)6{gD znod*KiBQ#vCy+AIvzpFXT_-|Sr={t%G@X{N6QQazsp(8=I+MCigsM(F3zh3>YdURR zCqh+cO4FIrbf$Ej2vwbPn$9^*=bWw+p{jFU(>br{oY!?CRCPLqMyP%xF3@n$C=_6QQbeLDRXQ>0HotB2;x|HJw>aXI9sVP}RAp>0H!wF6ufF zsydHpI*(~OkLfxQsygu|fxAyWhn6&*OS(>ks?Ot@&f}WSO(lj!`%? zPy{F|f+zx66b34A+>#7NEZIK;MFsTGKoLr5Fi?S&2C6{GKn3*BKoO!h(m(|^jHsq+ zpaObmpa{_;j)j2=Y#4`0?L_Wpa`W-7^uKV$y` zEN8+%6(|{~fN~}oC_Az;Y%GRDqI#3Mglifg+ST zVW0xbnJ`cVN(L&RoJj_XQ0jz%3M^;BKouw%sDN@N87M-j69y``0?L_Wpa`W-7^uKf}LawZulLa7r5ibyd~M5=)zR1FlNVxS5W2C6X0Kouq# zsKSJSDohxt!XyJ#m}H;|69%d)R`Lm~^^j|8iYS4Oz(QK_3;JE8W`f};ZGa1%i)=P9;rmqTpRn6=|Z5^ut!`b(( z{T(c_%pO?D>@&4>w>1kuE1#aTlAk2lEMEzFm))i|D~|74@cxc9&*%u9XkqDPbq4PU z1-ay5W4VSFgG_YWPam@uKAB^)QMen!^PAyGjMa{g>1U()qM5=9b5an zWuDff7!YoY$4gzmo>Jc9<-M`;-Vx=!uzYE}eC!d* zmz44)UcNL|zH~(SQdqt`UOxT^<;zO>GA~~qD_=gMd^s#%884rBgz^=oe1(^7MBCJK6Z0~or^5@#L^{znHQmHK!xAvfGbs#jB@^jH+thRu^CqjO z!>h_fI?*;Y-NZat)YIYpWg?wuo0@LozCNa>!%NLXI?*;Y-Nb#mq^HB1&O|!Vrl)fX z=EDW;zBl97i`ZSsp9@-eZ>4sFH+H)>-q_l^akw5&yB$wj z=Rbvg;}6?J2{!zQ4z6PL_X3&f1c_Sd#yWA6aY zM+@{{+m_wA`9lf{Eax^$4a2Q9e8X+kUox=Fo~N&}!J@8P_pp?oA!O9`ORG7+y+S*O z742H1W(JHJF}E&V<%5O}iB6^pZnKupFXyQnVtXo{O}p*#E0Li!*kK>J`FwsiTTNh( zpfKAxfA#5@+(03rB!CwA$D2_sV7=kV!T1T15LokA+@CnJx^mFV*5f4W(Fz&ksgPl6 z{%rY}>$?r}2pOi^C|$`!MgiLnjB8(dnZY$9VAlep7qHDQSMA>ndd8h?H1&e*@seEd zcq1;#aOuu?D=y3SSHs!CrZqyDuYzgkhmTK;99{Qd`xf6^`~1Y7QsRUJ|p_VzT^Y@fo+&*H}KrU=Ube9U?0XQ z>{K!KU%r*g&(q8IXhbjH^ocNSlh?#%*&oCi_IvHjJ?#E|C(hh^@%B^L7!I?EHX1G3 zX~V#2ABt%!)Qw?q#9lbxXD(oH#G{egm1m;Z9!-k(1pZ9SC2|Ra@26glHLJ~*7-HJ2 zewYMsYPjROaBMa#| Date: Wed, 8 Jun 2022 09:53:17 -0400 Subject: [PATCH 12/53] tests: acpi: whitelist DSDT.ipmismbus expected blob Signed-off-by: Igor Mammedov Message-Id: <20220608135340.3304695-13-imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- tests/qtest/bios-tables-test-allowed-diff.h | 1 + 1 file changed, 1 insertion(+) diff --git a/tests/qtest/bios-tables-test-allowed-diff.h b/tests/qtest/bios-tables-test-allowed-diff.h index dfb8523c8b..b4687d1cc8 100644 --- a/tests/qtest/bios-tables-test-allowed-diff.h +++ b/tests/qtest/bios-tables-test-allowed-diff.h @@ -1 +1,2 @@ /* List of comma-separated changed AML files to ignore */ +"tests/data/acpi/q35/DSDT.ipmismbus", From ea01c52291ffb7b571e21bb137470abd9e1c3175 Mon Sep 17 00:00:00 2001 From: Igor Mammedov Date: Wed, 8 Jun 2022 09:53:18 -0400 Subject: [PATCH 13/53] ipmi: acpi: use relative path to resource source smbus-ipmi AML description needs to specify a path to its parent node in _CRS. The rest of IPMI inplementations (ISA based) do not need path at all. Instead of passing through a full path use relative path to point to smbus-ipmi's parent node, it will let follow up patches to create IPMI device AML in a generic way instead of current ad-hoc way. (i.e. AML will be generated the same way it's done for other ISA device, and smbus will be converted to generate AML for its slave devices the same way as ISA) expected AML change: Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings { I2cSerialBusV2 (0x0000, ControllerInitiated, 0x000186A0, - AddressingMode7Bit, "\\_SB.PCI0.SMB0", + AddressingMode7Bit, "^", 0x00, ResourceProducer, , Exclusive, ) }) Signed-off-by: Igor Mammedov Acked-by: Gerd Hoffmann Message-Id: <20220608135340.3304695-14-imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- hw/acpi/ipmi-stub.c | 2 +- hw/acpi/ipmi.c | 12 ++++++------ hw/i386/acpi-build.c | 4 ++-- include/hw/acpi/ipmi.h | 2 +- 4 files changed, 10 insertions(+), 10 deletions(-) diff --git a/hw/acpi/ipmi-stub.c b/hw/acpi/ipmi-stub.c index 8634fb325c..f525f71c2d 100644 --- a/hw/acpi/ipmi-stub.c +++ b/hw/acpi/ipmi-stub.c @@ -10,6 +10,6 @@ #include "qemu/osdep.h" #include "hw/acpi/ipmi.h" -void build_acpi_ipmi_devices(Aml *table, BusState *bus, const char *resource) +void build_acpi_ipmi_devices(Aml *table, BusState *bus) { } diff --git a/hw/acpi/ipmi.c b/hw/acpi/ipmi.c index 96e48eba15..c30b44fcf5 100644 --- a/hw/acpi/ipmi.c +++ b/hw/acpi/ipmi.c @@ -13,7 +13,7 @@ #include "hw/acpi/acpi.h" #include "hw/acpi/ipmi.h" -static Aml *aml_ipmi_crs(IPMIFwInfo *info, const char *resource) +static Aml *aml_ipmi_crs(IPMIFwInfo *info) { Aml *crs = aml_resource_template(); @@ -49,7 +49,7 @@ static Aml *aml_ipmi_crs(IPMIFwInfo *info, const char *resource) break; case IPMI_MEMSPACE_SMBUS: aml_append(crs, aml_i2c_serial_bus_device(info->base_address, - resource)); + "^")); break; default: abort(); @@ -62,7 +62,7 @@ static Aml *aml_ipmi_crs(IPMIFwInfo *info, const char *resource) return crs; } -static Aml *aml_ipmi_device(IPMIFwInfo *info, const char *resource) +static Aml *aml_ipmi_device(IPMIFwInfo *info) { Aml *dev; uint16_t version = ((info->ipmi_spec_major_revision << 8) @@ -75,14 +75,14 @@ static Aml *aml_ipmi_device(IPMIFwInfo *info, const char *resource) aml_append(dev, aml_name_decl("_STR", aml_string("ipmi_%s", info->interface_name))); aml_append(dev, aml_name_decl("_UID", aml_int(info->uuid))); - aml_append(dev, aml_name_decl("_CRS", aml_ipmi_crs(info, resource))); + aml_append(dev, aml_name_decl("_CRS", aml_ipmi_crs(info))); aml_append(dev, aml_name_decl("_IFT", aml_int(info->interface_type))); aml_append(dev, aml_name_decl("_SRV", aml_int(version))); return dev; } -void build_acpi_ipmi_devices(Aml *scope, BusState *bus, const char *resource) +void build_acpi_ipmi_devices(Aml *scope, BusState *bus) { BusChild *kid; @@ -102,6 +102,6 @@ void build_acpi_ipmi_devices(Aml *scope, BusState *bus, const char *resource) iic = IPMI_INTERFACE_GET_CLASS(obj); memset(&info, 0, sizeof(info)); iic->get_fwinfo(ii, &info); - aml_append(scope, aml_ipmi_device(&info, resource)); + aml_append(scope, aml_ipmi_device(&info)); } } diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c index 1449832aa9..88506d563f 100644 --- a/hw/i386/acpi-build.c +++ b/hw/i386/acpi-build.c @@ -873,7 +873,7 @@ static void build_isa_devices_aml(Aml *table) assert(obj && !ambiguous); scope = aml_scope("_SB.PCI0.ISA"); - build_acpi_ipmi_devices(scope, BUS(obj), "\\_SB.PCI0.ISA"); + build_acpi_ipmi_devices(scope, BUS(obj)); isa_build_aml(ISA_BUS(obj), scope); aml_append(table, scope); @@ -1406,7 +1406,7 @@ static void build_smb0(Aml *table, I2CBus *smbus, int devnr, int func) Aml *dev = aml_device("SMB0"); aml_append(dev, aml_name_decl("_ADR", aml_int(devnr << 16 | func))); - build_acpi_ipmi_devices(dev, BUS(smbus), "\\_SB.PCI0.SMB0"); + build_acpi_ipmi_devices(dev, BUS(smbus)); aml_append(scope, dev); aml_append(table, scope); } diff --git a/include/hw/acpi/ipmi.h b/include/hw/acpi/ipmi.h index c14ad682ac..c38483565c 100644 --- a/include/hw/acpi/ipmi.h +++ b/include/hw/acpi/ipmi.h @@ -16,6 +16,6 @@ * bus matches the given bus. The resource is the ACPI resource that * contains the IPMI device, this is required for the I2C CRS. */ -void build_acpi_ipmi_devices(Aml *table, BusState *bus, const char *resource); +void build_acpi_ipmi_devices(Aml *table, BusState *bus); #endif /* HW_ACPI_IPMI_H */ From 0f5b3fd7483e3fe8f0c8fc28346a1b0cd91de106 Mon Sep 17 00:00:00 2001 From: Igor Mammedov Date: Wed, 8 Jun 2022 09:53:19 -0400 Subject: [PATCH 14/53] tests: acpi: update expected DSDT.ipmismbus blob expected AML change: Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings { I2cSerialBusV2 (0x0000, ControllerInitiated, 0x000186A0, - AddressingMode7Bit, "\\_SB.PCI0.SMB0", + AddressingMode7Bit, "^", 0x00, ResourceProducer, , Exclusive, ) }) Signed-off-by: Igor Mammedov Message-Id: <20220608135340.3304695-15-imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- tests/data/acpi/q35/DSDT.ipmismbus | Bin 8391 -> 8378 bytes tests/qtest/bios-tables-test-allowed-diff.h | 1 - 2 files changed, 1 deletion(-) diff --git a/tests/data/acpi/q35/DSDT.ipmismbus b/tests/data/acpi/q35/DSDT.ipmismbus index 07ba873b79caadd73ed9721fcbeee84c57676e2a..415fe08a407690c0e118743d872de79d22f01a4c 100644 GIT binary patch delta 85 zcmX@^xXY2tCD80n^Yqk0Lq6G-v9sr delta 98 zcmdnxc-)c8CD$MJ|5 sqMMx9CjXGsR#xLu?vrC+1VW%jHiiXlAVv&OqaH}39!S?_OQ}XS01jdo-v9sr diff --git a/tests/qtest/bios-tables-test-allowed-diff.h b/tests/qtest/bios-tables-test-allowed-diff.h index b4687d1cc8..dfb8523c8b 100644 --- a/tests/qtest/bios-tables-test-allowed-diff.h +++ b/tests/qtest/bios-tables-test-allowed-diff.h @@ -1,2 +1 @@ /* List of comma-separated changed AML files to ignore */ -"tests/data/acpi/q35/DSDT.ipmismbus", From 4b66ddcc4d2d690f11152aeed1097f44ecff1aa4 Mon Sep 17 00:00:00 2001 From: Igor Mammedov Date: Wed, 8 Jun 2022 09:53:20 -0400 Subject: [PATCH 15/53] acpi: ich9-smb: add support for AcpiDevAmlIf interface wire AcpiDevAmlIf interface to build ich9-smb and its slave devices AML. It will be used by followup patches to switch from creating AML in ad-hoc way to a more systematic one that will scan present devices and ask them to provide their AML code like it's done with ISA devices. This patch is a partial conversion, as it only fetches AML from slave devices attached to its I2C bus. The conversion will be completed when PCI bus is switched to use AcpiDevAmlIf and build_smb0() could be dropped. Signed-off-by: Igor Mammedov Acked-by: Gerd Hoffmann Message-Id: <20220608135340.3304695-16-imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- hw/i2c/smbus_ich9.c | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/hw/i2c/smbus_ich9.c b/hw/i2c/smbus_ich9.c index 44dd5653b7..ee50ba1f2c 100644 --- a/hw/i2c/smbus_ich9.c +++ b/hw/i2c/smbus_ich9.c @@ -29,6 +29,7 @@ #include "hw/i386/ich9.h" #include "qom/object.h" +#include "hw/acpi/acpi_aml_interface.h" OBJECT_DECLARE_SIMPLE_TYPE(ICH9SMBState, ICH9_SMB_DEVICE) @@ -94,10 +95,22 @@ static void ich9_smbus_realize(PCIDevice *d, Error **errp) &s->smb.io); } +static void build_ich9_smb_aml(AcpiDevAmlIf *adev, Aml *scope) +{ + BusChild *kid; + ICH9SMBState *s = ICH9_SMB_DEVICE(adev); + BusState *bus = BUS(s->smb.smbus); + + QTAILQ_FOREACH(kid, &bus->children, sibling) { + call_dev_aml_func(DEVICE(kid->child), scope); + } +} + static void ich9_smb_class_init(ObjectClass *klass, void *data) { DeviceClass *dc = DEVICE_CLASS(klass); PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); + AcpiDevAmlIfClass *adevc = ACPI_DEV_AML_IF_CLASS(klass); k->vendor_id = PCI_VENDOR_ID_INTEL; k->device_id = PCI_DEVICE_ID_INTEL_ICH9_6; @@ -112,6 +125,7 @@ static void ich9_smb_class_init(ObjectClass *klass, void *data) * pc_q35_init() */ dc->user_creatable = false; + adevc->build_dev_aml = build_ich9_smb_aml; } static void ich9_smb_set_irq(PMSMBus *pmsmb, bool enabled) @@ -143,6 +157,7 @@ static const TypeInfo ich9_smb_info = { .class_init = ich9_smb_class_init, .interfaces = (InterfaceInfo[]) { { INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { TYPE_ACPI_DEV_AML_IF }, { }, }, }; From 5876d9b53fee5fc5a341fad1618cf3a9731206da Mon Sep 17 00:00:00 2001 From: Igor Mammedov Date: Wed, 8 Jun 2022 09:53:21 -0400 Subject: [PATCH 16/53] acpi: ipmi: use AcpiDevAmlIf interface to build IPMI device descriptors convert ad-hoc way we use to generate AML for ISA/SMB IPMI devices to a generic approach (i.e. make devices provide its own AML blobs like it is done with other ISA devices (ex. KBD)) Signed-off-by: Igor Mammedov Acked-by: Gerd Hoffmann Message-Id: <20220608135340.3304695-17-imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- hw/acpi/ipmi-stub.c | 2 +- hw/acpi/ipmi.c | 49 +++++++++++++----------------------------- hw/i386/acpi-build.c | 17 ++++++++++----- hw/ipmi/isa_ipmi_bt.c | 4 ++++ hw/ipmi/isa_ipmi_kcs.c | 4 ++++ hw/ipmi/smbus_ipmi.c | 4 ++++ include/hw/acpi/ipmi.h | 9 ++------ 7 files changed, 42 insertions(+), 47 deletions(-) diff --git a/hw/acpi/ipmi-stub.c b/hw/acpi/ipmi-stub.c index f525f71c2d..befaf0a882 100644 --- a/hw/acpi/ipmi-stub.c +++ b/hw/acpi/ipmi-stub.c @@ -10,6 +10,6 @@ #include "qemu/osdep.h" #include "hw/acpi/ipmi.h" -void build_acpi_ipmi_devices(Aml *table, BusState *bus) +void build_ipmi_dev_aml(AcpiDevAmlIf *adev, Aml *scope) { } diff --git a/hw/acpi/ipmi.c b/hw/acpi/ipmi.c index c30b44fcf5..a20e57d465 100644 --- a/hw/acpi/ipmi.c +++ b/hw/acpi/ipmi.c @@ -62,46 +62,27 @@ static Aml *aml_ipmi_crs(IPMIFwInfo *info) return crs; } -static Aml *aml_ipmi_device(IPMIFwInfo *info) +void build_ipmi_dev_aml(AcpiDevAmlIf *adev, Aml *scope) { Aml *dev; - uint16_t version = ((info->ipmi_spec_major_revision << 8) - | (info->ipmi_spec_minor_revision << 4)); + IPMIFwInfo info = {}; + IPMIInterface *ii = IPMI_INTERFACE(adev); + IPMIInterfaceClass *iic = IPMI_INTERFACE_GET_CLASS(ii); + uint16_t version; - assert(info->ipmi_spec_minor_revision <= 15); + iic->get_fwinfo(ii, &info); + assert(info.ipmi_spec_minor_revision <= 15); + version = ((info.ipmi_spec_major_revision << 8) + | (info.ipmi_spec_minor_revision << 4)); - dev = aml_device("MI%d", info->uuid); + dev = aml_device("MI%d", info.uuid); aml_append(dev, aml_name_decl("_HID", aml_eisaid("IPI0001"))); aml_append(dev, aml_name_decl("_STR", aml_string("ipmi_%s", - info->interface_name))); - aml_append(dev, aml_name_decl("_UID", aml_int(info->uuid))); - aml_append(dev, aml_name_decl("_CRS", aml_ipmi_crs(info))); - aml_append(dev, aml_name_decl("_IFT", aml_int(info->interface_type))); + info.interface_name))); + aml_append(dev, aml_name_decl("_UID", aml_int(info.uuid))); + aml_append(dev, aml_name_decl("_CRS", aml_ipmi_crs(&info))); + aml_append(dev, aml_name_decl("_IFT", aml_int(info.interface_type))); aml_append(dev, aml_name_decl("_SRV", aml_int(version))); - return dev; -} - -void build_acpi_ipmi_devices(Aml *scope, BusState *bus) -{ - - BusChild *kid; - - QTAILQ_FOREACH(kid, &bus->children, sibling) { - IPMIInterface *ii; - IPMIInterfaceClass *iic; - IPMIFwInfo info; - Object *obj = object_dynamic_cast(OBJECT(kid->child), - TYPE_IPMI_INTERFACE); - - if (!obj) { - continue; - } - - ii = IPMI_INTERFACE(obj); - iic = IPMI_INTERFACE_GET_CLASS(obj); - memset(&info, 0, sizeof(info)); - iic->get_fwinfo(ii, &info); - aml_append(scope, aml_ipmi_device(&info)); - } + aml_append(scope, dev); } diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c index 88506d563f..5b963cca32 100644 --- a/hw/i386/acpi-build.c +++ b/hw/i386/acpi-build.c @@ -39,6 +39,7 @@ #include "hw/nvram/fw_cfg.h" #include "hw/acpi/bios-linker-loader.h" #include "hw/isa/isa.h" +#include "hw/acpi/acpi_aml_interface.h" #include "hw/input/i8042.h" #include "hw/acpi/memory_hotplug.h" #include "sysemu/tpm.h" @@ -73,7 +74,6 @@ #include "hw/i386/intel_iommu.h" #include "hw/virtio/virtio-iommu.h" -#include "hw/acpi/ipmi.h" #include "hw/acpi/hmat.h" #include "hw/acpi/viot.h" #include "hw/acpi/cxl.h" @@ -873,7 +873,6 @@ static void build_isa_devices_aml(Aml *table) assert(obj && !ambiguous); scope = aml_scope("_SB.PCI0.ISA"); - build_acpi_ipmi_devices(scope, BUS(obj)); isa_build_aml(ISA_BUS(obj), scope); aml_append(table, scope); @@ -1400,13 +1399,21 @@ static Aml *build_q35_osc_method(bool enable_native_pcie_hotplug) return method; } -static void build_smb0(Aml *table, I2CBus *smbus, int devnr, int func) +static void build_smb0(Aml *table, int devnr, int func) { Aml *scope = aml_scope("_SB.PCI0"); Aml *dev = aml_device("SMB0"); + bool ambiguous; + Object *obj; + /* + * temporarily fish out device hosting SMBUS, build_smb0 will be gone once + * PCI enumeration will be switched to call_dev_aml_func() + */ + obj = object_resolve_path_type("", TYPE_ICH9_SMB_DEVICE, &ambiguous); + assert(obj && !ambiguous); aml_append(dev, aml_name_decl("_ADR", aml_int(devnr << 16 | func))); - build_acpi_ipmi_devices(dev, BUS(smbus)); + call_dev_aml_func(DEVICE(obj), dev); aml_append(scope, dev); aml_append(table, scope); } @@ -1524,7 +1531,7 @@ build_dsdt(GArray *table_data, BIOSLinker *linker, } build_q35_pci0_int(dsdt); if (pcms->smbus && !pcmc->do_not_add_smb_acpi) { - build_smb0(dsdt, pcms->smbus, ICH9_SMB_DEV, ICH9_SMB_FUNC); + build_smb0(dsdt, ICH9_SMB_DEV, ICH9_SMB_FUNC); } } diff --git a/hw/ipmi/isa_ipmi_bt.c b/hw/ipmi/isa_ipmi_bt.c index 88aa734e9e..a83e7243d6 100644 --- a/hw/ipmi/isa_ipmi_bt.c +++ b/hw/ipmi/isa_ipmi_bt.c @@ -31,6 +31,7 @@ #include "hw/qdev-properties.h" #include "migration/vmstate.h" #include "qom/object.h" +#include "hw/acpi/ipmi.h" #define TYPE_ISA_IPMI_BT "isa-ipmi-bt" OBJECT_DECLARE_SIMPLE_TYPE(ISAIPMIBTDevice, ISA_IPMI_BT) @@ -144,6 +145,7 @@ static void isa_ipmi_bt_class_init(ObjectClass *oc, void *data) { DeviceClass *dc = DEVICE_CLASS(oc); IPMIInterfaceClass *iic = IPMI_INTERFACE_CLASS(oc); + AcpiDevAmlIfClass *adevc = ACPI_DEV_AML_IF_CLASS(oc); dc->realize = isa_ipmi_bt_realize; device_class_set_props(dc, ipmi_isa_properties); @@ -151,6 +153,7 @@ static void isa_ipmi_bt_class_init(ObjectClass *oc, void *data) iic->get_backend_data = isa_ipmi_bt_get_backend_data; ipmi_bt_class_init(iic); iic->get_fwinfo = isa_ipmi_bt_get_fwinfo; + adevc->build_dev_aml = build_ipmi_dev_aml; } static const TypeInfo isa_ipmi_bt_info = { @@ -161,6 +164,7 @@ static const TypeInfo isa_ipmi_bt_info = { .class_init = isa_ipmi_bt_class_init, .interfaces = (InterfaceInfo[]) { { TYPE_IPMI_INTERFACE }, + { TYPE_ACPI_DEV_AML_IF }, { } } }; diff --git a/hw/ipmi/isa_ipmi_kcs.c b/hw/ipmi/isa_ipmi_kcs.c index afabb95ebe..b2ed70b9da 100644 --- a/hw/ipmi/isa_ipmi_kcs.c +++ b/hw/ipmi/isa_ipmi_kcs.c @@ -31,6 +31,7 @@ #include "hw/qdev-properties.h" #include "migration/vmstate.h" #include "qom/object.h" +#include "hw/acpi/ipmi.h" #define TYPE_ISA_IPMI_KCS "isa-ipmi-kcs" OBJECT_DECLARE_SIMPLE_TYPE(ISAIPMIKCSDevice, ISA_IPMI_KCS) @@ -151,6 +152,7 @@ static void isa_ipmi_kcs_class_init(ObjectClass *oc, void *data) { DeviceClass *dc = DEVICE_CLASS(oc); IPMIInterfaceClass *iic = IPMI_INTERFACE_CLASS(oc); + AcpiDevAmlIfClass *adevc = ACPI_DEV_AML_IF_CLASS(oc); dc->realize = ipmi_isa_realize; device_class_set_props(dc, ipmi_isa_properties); @@ -158,6 +160,7 @@ static void isa_ipmi_kcs_class_init(ObjectClass *oc, void *data) iic->get_backend_data = isa_ipmi_kcs_get_backend_data; ipmi_kcs_class_init(iic); iic->get_fwinfo = isa_ipmi_kcs_get_fwinfo; + adevc->build_dev_aml = build_ipmi_dev_aml; } static const TypeInfo isa_ipmi_kcs_info = { @@ -168,6 +171,7 @@ static const TypeInfo isa_ipmi_kcs_info = { .class_init = isa_ipmi_kcs_class_init, .interfaces = (InterfaceInfo[]) { { TYPE_IPMI_INTERFACE }, + { TYPE_ACPI_DEV_AML_IF }, { } } }; diff --git a/hw/ipmi/smbus_ipmi.c b/hw/ipmi/smbus_ipmi.c index 1fdf0a66b6..9ef9112dd5 100644 --- a/hw/ipmi/smbus_ipmi.c +++ b/hw/ipmi/smbus_ipmi.c @@ -28,6 +28,7 @@ #include "qemu/error-report.h" #include "hw/ipmi/ipmi.h" #include "qom/object.h" +#include "hw/acpi/ipmi.h" #define TYPE_SMBUS_IPMI "smbus-ipmi" OBJECT_DECLARE_SIMPLE_TYPE(SMBusIPMIDevice, SMBUS_IPMI) @@ -353,6 +354,7 @@ static void smbus_ipmi_class_init(ObjectClass *oc, void *data) DeviceClass *dc = DEVICE_CLASS(oc); IPMIInterfaceClass *iic = IPMI_INTERFACE_CLASS(oc); SMBusDeviceClass *sc = SMBUS_DEVICE_CLASS(oc); + AcpiDevAmlIfClass *adevc = ACPI_DEV_AML_IF_CLASS(oc); sc->receive_byte = ipmi_receive_byte; sc->write_data = ipmi_write_data; @@ -363,6 +365,7 @@ static void smbus_ipmi_class_init(ObjectClass *oc, void *data) iic->handle_if_event = smbus_ipmi_handle_event; iic->set_irq_enable = smbus_ipmi_set_irq_enable; iic->get_fwinfo = smbus_ipmi_get_fwinfo; + adevc->build_dev_aml = build_ipmi_dev_aml; } static const TypeInfo smbus_ipmi_info = { @@ -373,6 +376,7 @@ static const TypeInfo smbus_ipmi_info = { .class_init = smbus_ipmi_class_init, .interfaces = (InterfaceInfo[]) { { TYPE_IPMI_INTERFACE }, + { TYPE_ACPI_DEV_AML_IF }, { } } }; diff --git a/include/hw/acpi/ipmi.h b/include/hw/acpi/ipmi.h index c38483565c..6c8079c97a 100644 --- a/include/hw/acpi/ipmi.h +++ b/include/hw/acpi/ipmi.h @@ -9,13 +9,8 @@ #ifndef HW_ACPI_IPMI_H #define HW_ACPI_IPMI_H -#include "hw/acpi/aml-build.h" +#include "hw/acpi/acpi_aml_interface.h" -/* - * Add ACPI IPMI entries for all registered IPMI devices whose parent - * bus matches the given bus. The resource is the ACPI resource that - * contains the IPMI device, this is required for the I2C CRS. - */ -void build_acpi_ipmi_devices(Aml *table, BusState *bus); +void build_ipmi_dev_aml(AcpiDevAmlIf *adev, Aml *scope); #endif /* HW_ACPI_IPMI_H */ From 38003951b5948865f0a6be3e43b3658ae54d6e97 Mon Sep 17 00:00:00 2001 From: Igor Mammedov Date: Wed, 8 Jun 2022 09:53:22 -0400 Subject: [PATCH 17/53] q35: acpi: drop not needed PCMachineClass::do_not_add_smb_acpi by default we do not version ACPI AML as it's considered a part of firmware. Drop do_not_add_smb_acpi that blocked SMBUS AML description on 3.1 and older machine types without providing justification. Signed-off-by: Igor Mammedov Acked-by: Gerd Hoffmann Message-Id: <20220608135340.3304695-18-imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- hw/i386/acpi-build.c | 2 +- hw/i386/pc_piix.c | 1 - hw/i386/pc_q35.c | 1 - include/hw/i386/pc.h | 1 - 4 files changed, 1 insertion(+), 4 deletions(-) diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c index 5b963cca32..d943354999 100644 --- a/hw/i386/acpi-build.c +++ b/hw/i386/acpi-build.c @@ -1530,7 +1530,7 @@ build_dsdt(GArray *table_data, BIOSLinker *linker, build_x86_acpi_pci_hotplug(dsdt, pm->pcihp_io_base); } build_q35_pci0_int(dsdt); - if (pcms->smbus && !pcmc->do_not_add_smb_acpi) { + if (pcms->smbus) { build_smb0(dsdt, ICH9_SMB_DEV, ICH9_SMB_FUNC); } } diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c index 578e537b35..7f777f7aed 100644 --- a/hw/i386/pc_piix.c +++ b/hw/i386/pc_piix.c @@ -564,7 +564,6 @@ static void pc_i440fx_3_1_machine_options(MachineClass *m) pc_i440fx_4_0_machine_options(m); m->is_default = false; - pcmc->do_not_add_smb_acpi = true; m->smbus_no_migration_support = true; m->alias = NULL; pcmc->pvh_enabled = false; diff --git a/hw/i386/pc_q35.c b/hw/i386/pc_q35.c index 42eb8b9707..f96cbd04e2 100644 --- a/hw/i386/pc_q35.c +++ b/hw/i386/pc_q35.c @@ -514,7 +514,6 @@ static void pc_q35_3_1_machine_options(MachineClass *m) pc_q35_4_0_machine_options(m); m->default_kernel_irqchip_split = false; - pcmc->do_not_add_smb_acpi = true; m->smbus_no_migration_support = true; m->alias = NULL; pcmc->pvh_enabled = false; diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h index ffcac5121e..dee38cfac4 100644 --- a/include/hw/i386/pc.h +++ b/include/hw/i386/pc.h @@ -104,7 +104,6 @@ struct PCMachineClass { bool rsdp_in_ram; int legacy_acpi_table_size; unsigned acpi_data_size; - bool do_not_add_smb_acpi; int pci_root_uid; /* SMBIOS compat: */ From 6a4b286ced99377652f1ae0963e69ccac8c3df3b Mon Sep 17 00:00:00 2001 From: Igor Mammedov Date: Thu, 9 Jun 2022 07:48:55 -0400 Subject: [PATCH 18/53] tests: acpi: white-list to be re-factored pc/q35 DSDT Signed-off-by: Igor Mammedov Message-Id: <20220609114855.3477822-1-imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- tests/qtest/bios-tables-test-allowed-diff.h | 32 +++++++++++++++++++++ 1 file changed, 32 insertions(+) diff --git a/tests/qtest/bios-tables-test-allowed-diff.h b/tests/qtest/bios-tables-test-allowed-diff.h index dfb8523c8b..666e257bf9 100644 --- a/tests/qtest/bios-tables-test-allowed-diff.h +++ b/tests/qtest/bios-tables-test-allowed-diff.h @@ -1 +1,33 @@ /* List of comma-separated changed AML files to ignore */ +"tests/data/acpi/pc/DSDT", +"tests/data/acpi/pc/DSDT.acpierst", +"tests/data/acpi/pc/DSDT.acpihmat", +"tests/data/acpi/pc/DSDT.bridge", +"tests/data/acpi/pc/DSDT.cphp", +"tests/data/acpi/pc/DSDT.dimmpxm", +"tests/data/acpi/pc/DSDT.hpbridge", +"tests/data/acpi/pc/DSDT.ipmikcs", +"tests/data/acpi/pc/DSDT.memhp", +"tests/data/acpi/pc/DSDT.nohpet", +"tests/data/acpi/pc/DSDT.numamem", +"tests/data/acpi/pc/DSDT.roothp", +"tests/data/acpi/pc/DSDT.hpbrroot", +"tests/data/acpi/q35/DSDT", +"tests/data/acpi/q35/DSDT.acpierst", +"tests/data/acpi/q35/DSDT.acpihmat", +"tests/data/acpi/q35/DSDT.bridge", +"tests/data/acpi/q35/DSDT.cphp", +"tests/data/acpi/q35/DSDT.dimmpxm", +"tests/data/acpi/q35/DSDT.ipmibt", +"tests/data/acpi/q35/DSDT.ivrs", +"tests/data/acpi/q35/DSDT.memhp", +"tests/data/acpi/q35/DSDT.mmio64", +"tests/data/acpi/q35/DSDT.multi-bridge", +"tests/data/acpi/q35/DSDT.nohpet", +"tests/data/acpi/q35/DSDT.numamem", +"tests/data/acpi/q35/DSDT.tis.tpm12", +"tests/data/acpi/q35/DSDT.tis.tpm2", +"tests/data/acpi/q35/DSDT.viot", +"tests/data/acpi/q35/DSDT.xapic", +"tests/data/acpi/q35/DSDT.ipmismbus", +"tests/data/acpi/q35/DSDT.cxl", From 92ea7fb3fe311d30905e12a962b22a38251c1a79 Mon Sep 17 00:00:00 2001 From: Igor Mammedov Date: Wed, 8 Jun 2022 09:53:24 -0400 Subject: [PATCH 19/53] acpi: pc: isa bridge: use AcpiDevAmlIf interface to build ISA device descriptors replaces ad-hoc build_isa_devices_aml() with generic AcpiDevAmlIf way to build bridge AML including all devices that are attached to its ISA bus. Later when PCI is converted to AcpiDevAmlIf, build_piix4_isa_bridge() will also be dropped since PCI parts itself will take care of building device prologue/epilogue AML for each enumerated PCI device. Expected AML change is contextual, where ISA devices are moved from separately declared _SB.PCI0.ISA scope , directly under Device(ISA) node. Signed-off-by: Igor Mammedov Acked-by: Gerd Hoffmann Message-Id: <20220608135340.3304695-20-imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- hw/i386/acpi-build.c | 16 +++++++++++----- hw/isa/piix3.c | 17 +++++++++++++++++ 2 files changed, 28 insertions(+), 5 deletions(-) diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c index d943354999..f903f30b7e 100644 --- a/hw/i386/acpi-build.c +++ b/hw/i386/acpi-build.c @@ -1280,15 +1280,22 @@ static void build_piix4_isa_bridge(Aml *table) { Aml *dev; Aml *scope; + Object *obj; + bool ambiguous; + + /* + * temporarily fish out isa bridge, build_piix4_isa_bridge() will be dropped + * once PCI is converted to AcpiDevAmlIf and would be ble to generate + * AML for bridge itself + */ + obj = object_resolve_path_type("", TYPE_PIIX3_PCI_DEVICE, &ambiguous); + assert(obj && !ambiguous); scope = aml_scope("_SB.PCI0"); dev = aml_device("ISA"); aml_append(dev, aml_name_decl("_ADR", aml_int(0x00010000))); - /* PIIX PCI to ISA irq remapping */ - aml_append(dev, aml_operation_region("P40C", AML_PCI_CONFIG, - aml_int(0x60), 0x04)); - + call_dev_aml_func(DEVICE(obj), dev); aml_append(scope, dev); aml_append(table, scope); } @@ -1476,7 +1483,6 @@ build_dsdt(GArray *table_data, BIOSLinker *linker, build_hpet_aml(dsdt); } build_piix4_isa_bridge(dsdt); - build_isa_devices_aml(dsdt); if (pm->pcihp_bridge_en || pm->pcihp_root_en) { build_x86_acpi_pci_hotplug(dsdt, pm->pcihp_io_base); } diff --git a/hw/isa/piix3.c b/hw/isa/piix3.c index dab901c9ad..bfccd666d4 100644 --- a/hw/isa/piix3.c +++ b/hw/isa/piix3.c @@ -32,6 +32,7 @@ #include "sysemu/reset.h" #include "sysemu/runstate.h" #include "migration/vmstate.h" +#include "hw/acpi/acpi_aml_interface.h" #define XEN_PIIX_NUM_PIRQS 128ULL @@ -286,10 +287,24 @@ static void piix3_realize(PCIDevice *dev, Error **errp) qemu_register_reset(piix3_reset, d); } +static void build_pci_isa_aml(AcpiDevAmlIf *adev, Aml *scope) +{ + BusChild *kid; + BusState *bus = qdev_get_child_bus(DEVICE(adev), "isa.0"); + + /* PIIX PCI to ISA irq remapping */ + aml_append(scope, aml_operation_region("P40C", AML_PCI_CONFIG, + aml_int(0x60), 0x04)); + QTAILQ_FOREACH(kid, &bus->children, sibling) { + call_dev_aml_func(DEVICE(kid->child), scope); + } +} + static void pci_piix3_class_init(ObjectClass *klass, void *data) { DeviceClass *dc = DEVICE_CLASS(klass); PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); + AcpiDevAmlIfClass *adevc = ACPI_DEV_AML_IF_CLASS(klass); dc->desc = "ISA bridge"; dc->vmsd = &vmstate_piix3; @@ -304,6 +319,7 @@ static void pci_piix3_class_init(ObjectClass *klass, void *data) * pc_piix.c's pc_init1() */ dc->user_creatable = false; + adevc->build_dev_aml = build_pci_isa_aml; } static const TypeInfo piix3_pci_type_info = { @@ -314,6 +330,7 @@ static const TypeInfo piix3_pci_type_info = { .class_init = pci_piix3_class_init, .interfaces = (InterfaceInfo[]) { { INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { TYPE_ACPI_DEV_AML_IF }, { }, }, }; From 887e8e9d3a4578059bd0a213e9b3cae81943dc18 Mon Sep 17 00:00:00 2001 From: Igor Mammedov Date: Wed, 8 Jun 2022 09:53:25 -0400 Subject: [PATCH 20/53] acpi: q35: isa bridge: use AcpiDevAmlIf interface to build ISA device descriptors replaces adhoc build_isa_devices_aml() with generic AcpiDevAmlIf way to build bridge AML including all devices that are attached to its ISA bus. Later when PCI is converted to AcpiDevAmlIf, build_q35_isa_bridge() will also be dropped since PCI parts itself will take care of building device prologue/epilogue AML for each enumerated PCI device. Expected AML change is contextual, where ISA devices are moved from separately declared _SB.PCI0.ISA scope, directly under Device(ISA) node. Signed-off-by: Igor Mammedov Acked-by: Gerd Hoffmann Message-Id: <20220608135340.3304695-21-imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- hw/i386/acpi-build.c | 30 +++++++++++------------------- hw/isa/lpc_ich9.c | 19 +++++++++++++++++++ 2 files changed, 30 insertions(+), 19 deletions(-) diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c index f903f30b7e..f7f1671407 100644 --- a/hw/i386/acpi-build.c +++ b/hw/i386/acpi-build.c @@ -864,20 +864,6 @@ static Aml *build_vmbus_device_aml(VMBusBridge *vmbus_bridge) return dev; } -static void build_isa_devices_aml(Aml *table) -{ - bool ambiguous; - Object *obj = object_resolve_path_type("", TYPE_ISA_BUS, &ambiguous); - Aml *scope; - - assert(obj && !ambiguous); - - scope = aml_scope("_SB.PCI0.ISA"); - isa_build_aml(ISA_BUS(obj), scope); - - aml_append(table, scope); -} - static void build_dbg_aml(Aml *table) { Aml *field; @@ -1263,15 +1249,22 @@ static void build_q35_isa_bridge(Aml *table) { Aml *dev; Aml *scope; + Object *obj; + bool ambiguous; + + /* + * temporarily fish out isa bridge, build_q35_isa_bridge() will be dropped + * once PCI is converted to AcpiDevAmlIf and would be ble to generate + * AML for bridge itself + */ + obj = object_resolve_path_type("", TYPE_ICH9_LPC_DEVICE, &ambiguous); + assert(obj && !ambiguous); scope = aml_scope("_SB.PCI0"); dev = aml_device("ISA"); aml_append(dev, aml_name_decl("_ADR", aml_int(0x001F0000))); - /* ICH9 PCI to ISA irq remapping */ - aml_append(dev, aml_operation_region("PIRQ", AML_PCI_CONFIG, - aml_int(0x60), 0x0C)); - + call_dev_aml_func(DEVICE(obj), dev); aml_append(scope, dev); aml_append(table, scope); } @@ -1531,7 +1524,6 @@ build_dsdt(GArray *table_data, BIOSLinker *linker, build_hpet_aml(dsdt); } build_q35_isa_bridge(dsdt); - build_isa_devices_aml(dsdt); if (pm->pcihp_bridge_en) { build_x86_acpi_pci_hotplug(dsdt, pm->pcihp_io_base); } diff --git a/hw/isa/lpc_ich9.c b/hw/isa/lpc_ich9.c index 5f143dca17..4553b5925b 100644 --- a/hw/isa/lpc_ich9.c +++ b/hw/isa/lpc_ich9.c @@ -50,6 +50,7 @@ #include "hw/core/cpu.h" #include "hw/nvram/fw_cfg.h" #include "qemu/cutils.h" +#include "hw/acpi/acpi_aml_interface.h" /*****************************************************************************/ /* ICH9 LPC PCI to ISA bridge */ @@ -803,12 +804,28 @@ static void ich9_send_gpe(AcpiDeviceIf *adev, AcpiEventStatusBits ev) acpi_send_gpe_event(&s->pm.acpi_regs, s->pm.irq, ev); } +static void build_ich9_isa_aml(AcpiDevAmlIf *adev, Aml *scope) +{ + BusChild *kid; + ICH9LPCState *s = ICH9_LPC_DEVICE(adev); + BusState *bus = BUS(s->isa_bus); + + /* ICH9 PCI to ISA irq remapping */ + aml_append(scope, aml_operation_region("PIRQ", AML_PCI_CONFIG, + aml_int(0x60), 0x0C)); + + QTAILQ_FOREACH(kid, &bus->children, sibling) { + call_dev_aml_func(DEVICE(kid->child), scope); + } +} + static void ich9_lpc_class_init(ObjectClass *klass, void *data) { DeviceClass *dc = DEVICE_CLASS(klass); PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); HotplugHandlerClass *hc = HOTPLUG_HANDLER_CLASS(klass); AcpiDeviceIfClass *adevc = ACPI_DEVICE_IF_CLASS(klass); + AcpiDevAmlIfClass *amldevc = ACPI_DEV_AML_IF_CLASS(klass); set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories); dc->reset = ich9_lpc_reset; @@ -833,6 +850,7 @@ static void ich9_lpc_class_init(ObjectClass *klass, void *data) adevc->ospm_status = ich9_pm_ospm_status; adevc->send_event = ich9_send_gpe; adevc->madt_cpu = pc_madt_cpu_entry; + amldevc->build_dev_aml = build_ich9_isa_aml; } static const TypeInfo ich9_lpc_info = { @@ -845,6 +863,7 @@ static const TypeInfo ich9_lpc_info = { { TYPE_HOTPLUG_HANDLER }, { TYPE_ACPI_DEVICE_IF }, { INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { TYPE_ACPI_DEV_AML_IF }, { } } }; From 8796f60fbfa15cf392c5892311ccec5f4ec805b5 Mon Sep 17 00:00:00 2001 From: Igor Mammedov Date: Thu, 9 Jun 2022 07:51:13 -0400 Subject: [PATCH 21/53] tests: acpi: update expected blobs Expected AML change: ISA devices under separate _SB.PCI0.ISA scope are moved directly under Device(ISA) node. Example from PC machine, and q35 have similar changes: { Name (_ADR, 0x00010000) // _ADR: Address OperationRegion (P40C, PCI_Config, 0x60, 0x04) - } - } - - Scope (_SB.PCI0.ISA) - { - Device (KBD) - { - Name (_HID, EisaId ("PNP0303") /* IBM Enhanced Keyboard (101/102-key, PS/2 Mouse) */) // _HID: Hardware ID - Name (_STA, 0x0F) // _STA: Status - Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + Device (KBD) { - IO (Decode16, - 0x0060, // Range Minimum - 0x0060, // Range Maximum - 0x01, // Alignment - 0x01, // Length - ) - IO (Decode16, - 0x0064, // Range Minimum - 0x0064, // Range Maximum - 0x01, // Alignment - 0x01, // Length - ) - IRQNoFlags () - {1} - }) - } - - Device (MOU) - { - Name (_HID, EisaId ("PNP0F13") /* PS/2 Mouse */) // _HID: Hardware ID - Name (_STA, 0x0F) // _STA: Status - Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings - { - IRQNoFlags () - {12} - }) - } + Name (_HID, EisaId ("PNP0303") /* IBM Enhanced Keyboard (101/102-key, PS/2 Mouse) */) // _HID: Hardware ID + Name (_STA, 0x0F) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x0060, // Range Minimum + 0x0060, // Range Maximum + 0x01, // Alignment + 0x01, // Length + ) + IO (Decode16, + 0x0064, // Range Minimum + 0x0064, // Range Maximum + 0x01, // Alignment + 0x01, // Length + ) + IRQNoFlags () + {1} + }) + } - Device (FDC0) - { - Name (_HID, EisaId ("PNP0700")) // _HID: Hardware ID - Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings - { - IO (Decode16, - 0x03F2, // Range Minimum - 0x03F2, // Range Maximum - 0x00, // Alignment - 0x04, // Length - ) - IO (Decode16, - 0x03F7, // Range Minimum - 0x03F7, // Range Maximum - 0x00, // Alignment - 0x01, // Length - ) - IRQNoFlags () - {6} - DMA (Compatibility, NotBusMaster, Transfer8, ) - {2} - }) - Device (FLPA) + Device (MOU) { - Name (_ADR, Zero) // _ADR: Address - Name (_FDI, Package (0x10) // _FDI: Floppy Drive Information + Name (_HID, EisaId ("PNP0F13") /* PS/2 Mouse */) // _HID: Hardware ID + Name (_STA, 0x0F) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings { - Zero, - 0x05, - 0x4F, - 0x30, - One, - 0xAF, - 0x02, - 0x25, - 0x02, - 0x12, - 0x1B, - 0xFF, - 0x6C, - 0xF6, - 0x0F, - 0x08 + IRQNoFlags () + {12} }) } - Name (_FDE, Buffer (0x14) // _FDE: Floppy Disk Enumerate + Device (FDC0) { - /* 0000 */ 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ - /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ - /* 0010 */ 0x02, 0x00, 0x00, 0x00 // .... - }) - } + Name (_HID, EisaId ("PNP0700")) // _HID: Hardware ID + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x03F2, // Range Minimum + 0x03F2, // Range Maximum + 0x00, // Alignment + 0x04, // Length + ) + IO (Decode16, + 0x03F7, // Range Minimum + 0x03F7, // Range Maximum + 0x00, // Alignment + 0x01, // Length + ) + IRQNoFlags () + {6} + DMA (Compatibility, NotBusMaster, Transfer8, ) + {2} + }) + Device (FLPA) + { + Name (_ADR, Zero) // _ADR: Address + Name (_FDI, Package (0x10) // _FDI: Floppy Drive Information + { + Zero, + 0x05, + 0x4F, + 0x30, + One, + 0xAF, + 0x02, + 0x25, + 0x02, + 0x12, + 0x1B, + 0xFF, + 0x6C, + 0xF6, + 0x0F, + 0x08 + }) + } - Device (LPT1) - { - Name (_HID, EisaId ("PNP0400") /* Standard LPT Parallel Port */) // _HID: Hardware ID - Name (_UID, One) // _UID: Unique ID - Name (_STA, 0x0F) // _STA: Status - Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + Name (_FDE, Buffer (0x14) // _FDE: Floppy Disk Enumerate + { + /* 0000 */ 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 0010 */ 0x02, 0x00, 0x00, 0x00 // .... + }) + } + + Device (LPT1) { - IO (Decode16, - 0x0378, // Range Minimum - 0x0378, // Range Maximum - 0x08, // Alignment - 0x08, // Length - ) - IRQNoFlags () - {7} - }) - } + Name (_HID, EisaId ("PNP0400") /* Standard LPT Parallel Port */) // _HID: Hardware ID + Name (_UID, One) // _UID: Unique ID + Name (_STA, 0x0F) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x0378, // Range Minimum + 0x0378, // Range Maximum + 0x08, // Alignment + 0x08, // Length + ) + IRQNoFlags () + {7} + }) + } - Device (COM1) - { - Name (_HID, EisaId ("PNP0501") /* 16550A-compatible COM Serial Port */) // _HID: Hardware ID - Name (_UID, One) // _UID: Unique ID - Name (_STA, 0x0F) // _STA: Status - Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + Device (COM1) { - IO (Decode16, - 0x03F8, // Range Minimum - 0x03F8, // Range Maximum - 0x00, // Alignment - 0x08, // Length - ) - IRQNoFlags () - {4} - }) - } + Name (_HID, EisaId ("PNP0501") /* 16550A-compatible COM Serial Port */) // _HID: Hardware ID + Name (_UID, One) // _UID: Unique ID + Name (_STA, 0x0F) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x03F8, // Range Minimum + 0x03F8, // Range Maximum + 0x00, // Alignment + 0x08, // Length + ) + IRQNoFlags () + {4} + }) + } - Device (RTC) - { - Name (_HID, EisaId ("PNP0B00") /* AT Real-Time Clock */) // _HID: Hardware ID - Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + Device (RTC) { - IO (Decode16, - 0x0070, // Range Minimum - 0x0070, // Range Maximum - 0x01, // Alignment - 0x08, // Length - ) - IRQNoFlags () - {8} - }) + Name (_HID, EisaId ("PNP0B00") /* AT Real-Time Clock */) // _HID: Hardware ID + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x0070, // Range Minimum + 0x0070, // Range Maximum + 0x01, // Alignment + 0x08, // Length + ) + IRQNoFlags () + {8} + }) + } } } Signed-off-by: Igor Mammedov Message-Id: <20220609115113.3478093-1-imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- tests/data/acpi/pc/DSDT | Bin 6002 -> 5987 bytes tests/data/acpi/pc/DSDT.acpierst | Bin 5969 -> 5954 bytes tests/data/acpi/pc/DSDT.acpihmat | Bin 7327 -> 7312 bytes tests/data/acpi/pc/DSDT.bridge | Bin 8668 -> 8653 bytes tests/data/acpi/pc/DSDT.cphp | Bin 6466 -> 6451 bytes tests/data/acpi/pc/DSDT.dimmpxm | Bin 7656 -> 7641 bytes tests/data/acpi/pc/DSDT.hpbridge | Bin 5969 -> 5954 bytes tests/data/acpi/pc/DSDT.hpbrroot | Bin 3084 -> 3069 bytes tests/data/acpi/pc/DSDT.ipmikcs | Bin 6074 -> 6059 bytes tests/data/acpi/pc/DSDT.memhp | Bin 7361 -> 7346 bytes tests/data/acpi/pc/DSDT.nohpet | Bin 5860 -> 5845 bytes tests/data/acpi/pc/DSDT.numamem | Bin 6008 -> 5993 bytes tests/data/acpi/pc/DSDT.roothp | Bin 6210 -> 6195 bytes tests/data/acpi/q35/DSDT | Bin 8289 -> 8274 bytes tests/data/acpi/q35/DSDT.acpierst | Bin 8306 -> 8291 bytes tests/data/acpi/q35/DSDT.acpihmat | Bin 9614 -> 9599 bytes tests/data/acpi/q35/DSDT.bridge | Bin 11003 -> 10988 bytes tests/data/acpi/q35/DSDT.cphp | Bin 8753 -> 8738 bytes tests/data/acpi/q35/DSDT.cxl | Bin 9615 -> 9600 bytes tests/data/acpi/q35/DSDT.dimmpxm | Bin 9943 -> 9928 bytes tests/data/acpi/q35/DSDT.ipmibt | Bin 8364 -> 8349 bytes tests/data/acpi/q35/DSDT.ipmismbus | Bin 8378 -> 8363 bytes tests/data/acpi/q35/DSDT.ivrs | Bin 8306 -> 8291 bytes tests/data/acpi/q35/DSDT.memhp | Bin 9648 -> 9633 bytes tests/data/acpi/q35/DSDT.mmio64 | Bin 9419 -> 9404 bytes tests/data/acpi/q35/DSDT.multi-bridge | Bin 8583 -> 8568 bytes tests/data/acpi/q35/DSDT.nohpet | Bin 8147 -> 8132 bytes tests/data/acpi/q35/DSDT.numamem | Bin 8295 -> 8280 bytes tests/data/acpi/q35/DSDT.tis.tpm12 | Bin 8900 -> 8885 bytes tests/data/acpi/q35/DSDT.tis.tpm2 | Bin 8921 -> 8906 bytes tests/data/acpi/q35/DSDT.viot | Bin 9398 -> 9383 bytes tests/data/acpi/q35/DSDT.xapic | Bin 35652 -> 35637 bytes tests/qtest/bios-tables-test-allowed-diff.h | 32 -------------------- 33 files changed, 32 deletions(-) diff --git a/tests/data/acpi/pc/DSDT b/tests/data/acpi/pc/DSDT index cc1223773e9c459a8d2f20666c051a74338d40b7..e80bef30317b5ef3bf0d2fb7aaabd6def109adb6 100644 GIT binary patch delta 44 zcmeyQ_gIh1CDVgT_=4|o6o diff --git a/tests/data/acpi/pc/DSDT.acpierst b/tests/data/acpi/pc/DSDT.acpierst index bb0593eeb8730d51a6f0fe51a00a00df9c83c419..d5a2ca51652dfc3637a817bac4a02d6ff6dc8ac2 100644 GIT binary patch delta 44 zcmcbpcSw)RCDNE47$d)%q+WcmQ+$B4r$Ka+r^IAkM#;_LjK4$y1_}%4 delta 60 zcmX@4cTtbaCD5O59$B_ diff --git a/tests/data/acpi/pc/DSDT.acpihmat b/tests/data/acpi/pc/DSDT.acpihmat index 2d0678eb83277088b156d386067429b0f29f9338..f86c743c4d64041c7fbd9999cc700e88416770b7 100644 GIT binary patch delta 44 zcmbPlIl+?4CDe8-u~CD(^b delta 60 zcmdmNbjXOyCD`pO$^ZZwMi9gR diff --git a/tests/data/acpi/pc/DSDT.hpbridge b/tests/data/acpi/pc/DSDT.hpbridge index bb0593eeb8730d51a6f0fe51a00a00df9c83c419..d5a2ca51652dfc3637a817bac4a02d6ff6dc8ac2 100644 GIT binary patch delta 44 zcmcbpcSw)RCDNE47$d)%q+WcmQ+$B4r$Ka+r^IAkM#;_LjK4$y1_}%4 delta 60 zcmX@4cTtbaCD5O59$B_ diff --git a/tests/data/acpi/pc/DSDT.hpbrroot b/tests/data/acpi/pc/DSDT.hpbrroot index 6ff6f198c7caf445d25c01117a6357b398358cbf..ec99b1622934a0fd8bc316291c33231e4c57dce0 100644 GIT binary patch delta 44 zcmeB?_$$uk66_N4mz#lsk!d5B7$d)%q+WcmQ+$B4r$Ka+r^IAkM#;_Lj9a+?2qz1y delta 60 zcmew>-Xp=~66_Mf!^6P9Xt0q>jFDGOFFx2QKET=2Ai7CvvOc4vpn#vaJ~K?vGuSbH Jvj^i=E�n4z2(I diff --git a/tests/data/acpi/pc/DSDT.ipmikcs b/tests/data/acpi/pc/DSDT.ipmikcs index 2e618e49d357ae1d0ac20d822f71d676ea90f2fc..f0d9e75841ea3d69fed9384e439bc4e94c7a4c4e 100644 GIT binary patch delta 44 zcmdm`zgnNmCD5sPVoWGo(9oPj`q_qyg@S55@oh diff --git a/tests/data/acpi/pc/DSDT.nohpet b/tests/data/acpi/pc/DSDT.nohpet index 623f06a900d12500d2197d101f76f6875e92ed64..cb7bf7d850f340e12a7237c987f570300fd9c92b 100644 GIT binary patch delta 41 xcmaE&dsUaqCD|w< diff --git a/tests/data/acpi/pc/DSDT.roothp b/tests/data/acpi/pc/DSDT.roothp index cee3b4d80b51ad30153953ace46127923ce8b271..46e03d39e00ea70e55d6a12333ca2b98c5e5bb53 100644 GIT binary patch delta 44 zcmX?Pu-SmiCDk-8M! diff --git a/tests/data/acpi/q35/DSDT.acpihmat b/tests/data/acpi/q35/DSDT.acpihmat index f24d4874bff8d327a165ed7c36de507aea114edd..af10345e8806c78a0074b3a8819b5cfca4d70c01 100644 GIT binary patch delta 44 zcmeD4{_n-*66_LEugbu{IC&%2O-6oaLB053r}zM8PlM*Co#F$WJq@Cp+yo|nV3gb}#q>}E0AVT) A?*IS* delta 80 zcmaD8`a6`%CD@~ diff --git a/tests/data/acpi/q35/DSDT.cphp b/tests/data/acpi/q35/DSDT.cphp index f1275606f68eeba54bfb11e63d818420385a62b9..ac8456a43d54209d77917163b282954d7429b331 100644 GIT binary patch delta 44 zcmdn!vdD$YCDF$oF>WK*O-6Gyz4&0K_yA{5gXktH&tS)Rj(A6xARYz=d4}kQ b0MDR6Cawf79szHDeP) diff --git a/tests/data/acpi/q35/DSDT.cxl b/tests/data/acpi/q35/DSDT.cxl index c1206defed0154e9024702bba88453b2790a306d..369ae90196113ec666a4acec7bb7a93be5b60e75 100644 GIT binary patch delta 44 zcmeD8Zt&)E33dr-P-S3Xytk3-CL_PIpk92iQ+$B4r$Ka+o517`jFOwBm`araDH9DJ delta 80 zcmZqh?)T<$33dtTS7l&eWZKAelhIsFFFx2QKET=2Ai7D)GuSbnBi_*^h=+keo*}v+ bz%wY2i7SDNN5Gq3pBbhQq-rxaQ>iilJo#F$WJq@Cp97QL8V3gb}#WYC{05{ML Ap#T5? delta 80 zcmbR1xWv04cW( ABme*a delta 80 zcmZ4OxXY2tCDk-8M! diff --git a/tests/data/acpi/q35/DSDT.memhp b/tests/data/acpi/q35/DSDT.memhp index 4e9cb3dc6896bb79ccac0fe342a404549f6610e8..663456fc0d3c71a51b541f5ab952e05c9dac01e6 100644 GIT binary patch delta 44 zcmdnsz0jM>CDCo#F$WJq@Cp+yo|nV3gb}#WYPB05)0; AjQ{`u delta 80 zcmZ4Jy}_HyCD<^x}h^;scyL4WgT*JcAwMIpQ5%f_NAh-$Gfh(l0GH<#M*si- diff --git a/tests/data/acpi/q35/DSDT.mmio64 b/tests/data/acpi/q35/DSDT.mmio64 index eb5a1c7171c02d153487bfcecfb7019b7c1bf406..91afd01d598c7c2c733387dfb5140d0fcad54adb 100644 GIT binary patch delta 44 zcmX@@xyO^sCD<^x}h^;scyL4WgT*JcAwMIpQ5%f_NAh-$Gi_7?0G&M*X#fBK diff --git a/tests/data/acpi/q35/DSDT.multi-bridge b/tests/data/acpi/q35/DSDT.multi-bridge index 45808eb03b78d07ebbe853f674abfed589d35e26..afde339a181628ae9153251eee026b437ab685bc 100644 GIT binary patch delta 44 zcmZp7{^7*s66_LEp~%3%n6;7XCL_PIpk92iQ+$B4r$Ka+o517`jFOwBm~!O-DNYRX delta 80 zcmez2)b7mX66_MvuE@Z^*te1ECZoBUUVN}qe1Nm3L3ERpXRu>DN4%p;5Dx=`JVSIt bfM-x36ITKkkAOG7J~K=qNY!R;rd)Xdd|?!< diff --git a/tests/data/acpi/q35/DSDT.nohpet b/tests/data/acpi/q35/DSDT.nohpet index 83d1aa00ac5686df479673fb0d7830f946e25dea..0fb09121cf8f6ad8810587c8b77df9552dd31f42 100644 GIT binary patch delta 65 zcmca?f5e{4CDCo#F$WJq@Cp+yo|nV3gb}#k5KR06d2c A!T8>CD<^x}h^;scyL4WgT*JcAwMIpQ5%f_NAh-$Gp$kp0HY)od;kCd diff --git a/tests/data/acpi/q35/DSDT.tis.tpm2 b/tests/data/acpi/q35/DSDT.tis.tpm2 index 00d732e46f5d9d056e557bd026fa30f9db3b8c30..4e16b126cc1c32f2346078fa69c5261c245d15e8 100644 GIT binary patch delta 44 zcmccVddii{CDCo#F$WJq@Cp+yo|nV3gb}#k5}m07~=@ AI{*Lx delta 80 zcmX@*defE5CD diff --git a/tests/data/acpi/q35/DSDT.viot b/tests/data/acpi/q35/DSDT.viot index 1c3b4da5cbe81ecab5e1ef50d383b561c5e0f55f..e20e4ee5e92e11ccf890a18fbdd78181c43f3b5c 100644 GIT binary patch delta 44 zcmdnyx!jY>CD<^x}h^;scyL4WgT*JcAwMIpQ5%f_NAh-$GtE%~0E!3|6aWAK diff --git a/tests/data/acpi/q35/DSDT.xapic b/tests/data/acpi/q35/DSDT.xapic index 17552ce363ae81985f69f9ae85837a1540b79ae0..3cab5956eee60363251a6fab0cc981bbbda64443 100644 GIT binary patch delta 46 zcmX>yjcMyNCN7s?mk`r#1_s8Sja)Yw`JDyz;)9*y1Drh#qMO_VCVya*+$_bU)d>Jm Crw#`I delta 82 zcmdlwjp@iVCN7s?mk^h31_s6r8@X;Wnycx>2Rp?FIC~mIH%WO0JH~UwJGun%Ffhn7 eL^lL@1_d&4C2;Wwc=PKs!xVy4ZRTdu>I4AAB^AK{ diff --git a/tests/qtest/bios-tables-test-allowed-diff.h b/tests/qtest/bios-tables-test-allowed-diff.h index 666e257bf9..dfb8523c8b 100644 --- a/tests/qtest/bios-tables-test-allowed-diff.h +++ b/tests/qtest/bios-tables-test-allowed-diff.h @@ -1,33 +1 @@ /* List of comma-separated changed AML files to ignore */ -"tests/data/acpi/pc/DSDT", -"tests/data/acpi/pc/DSDT.acpierst", -"tests/data/acpi/pc/DSDT.acpihmat", -"tests/data/acpi/pc/DSDT.bridge", -"tests/data/acpi/pc/DSDT.cphp", -"tests/data/acpi/pc/DSDT.dimmpxm", -"tests/data/acpi/pc/DSDT.hpbridge", -"tests/data/acpi/pc/DSDT.ipmikcs", -"tests/data/acpi/pc/DSDT.memhp", -"tests/data/acpi/pc/DSDT.nohpet", -"tests/data/acpi/pc/DSDT.numamem", -"tests/data/acpi/pc/DSDT.roothp", -"tests/data/acpi/pc/DSDT.hpbrroot", -"tests/data/acpi/q35/DSDT", -"tests/data/acpi/q35/DSDT.acpierst", -"tests/data/acpi/q35/DSDT.acpihmat", -"tests/data/acpi/q35/DSDT.bridge", -"tests/data/acpi/q35/DSDT.cphp", -"tests/data/acpi/q35/DSDT.dimmpxm", -"tests/data/acpi/q35/DSDT.ipmibt", -"tests/data/acpi/q35/DSDT.ivrs", -"tests/data/acpi/q35/DSDT.memhp", -"tests/data/acpi/q35/DSDT.mmio64", -"tests/data/acpi/q35/DSDT.multi-bridge", -"tests/data/acpi/q35/DSDT.nohpet", -"tests/data/acpi/q35/DSDT.numamem", -"tests/data/acpi/q35/DSDT.tis.tpm12", -"tests/data/acpi/q35/DSDT.tis.tpm2", -"tests/data/acpi/q35/DSDT.viot", -"tests/data/acpi/q35/DSDT.xapic", -"tests/data/acpi/q35/DSDT.ipmismbus", -"tests/data/acpi/q35/DSDT.cxl", From 39728badab1aadd3a269614da2d42b4f7f09cb0a Mon Sep 17 00:00:00 2001 From: Igor Mammedov Date: Wed, 8 Jun 2022 09:53:27 -0400 Subject: [PATCH 22/53] tests: acpi: add and white-list DSDT.applesmc expected blob Signed-off-by: Igor Mammedov Message-Id: <20220608135340.3304695-23-imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- tests/data/acpi/q35/DSDT.applesmc | 0 tests/qtest/bios-tables-test-allowed-diff.h | 1 + 2 files changed, 1 insertion(+) create mode 100644 tests/data/acpi/q35/DSDT.applesmc diff --git a/tests/data/acpi/q35/DSDT.applesmc b/tests/data/acpi/q35/DSDT.applesmc new file mode 100644 index 0000000000..e69de29bb2 diff --git a/tests/qtest/bios-tables-test-allowed-diff.h b/tests/qtest/bios-tables-test-allowed-diff.h index dfb8523c8b..e893029d87 100644 --- a/tests/qtest/bios-tables-test-allowed-diff.h +++ b/tests/qtest/bios-tables-test-allowed-diff.h @@ -1 +1,2 @@ /* List of comma-separated changed AML files to ignore */ +"tests/data/acpi/q35/DSDT.applesmc", From cde55744e9bcaefe1fbce6194a21bb3b7b9c2ae7 Mon Sep 17 00:00:00 2001 From: Igor Mammedov Date: Wed, 8 Jun 2022 09:53:28 -0400 Subject: [PATCH 23/53] tests: acpi: add applesmc testcase Signed-off-by: Igor Mammedov Acked-by: Gerd Hoffmann Message-Id: <20220608135340.3304695-24-imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- tests/qtest/bios-tables-test.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/tests/qtest/bios-tables-test.c b/tests/qtest/bios-tables-test.c index d896840270..7d238218ca 100644 --- a/tests/qtest/bios-tables-test.c +++ b/tests/qtest/bios-tables-test.c @@ -1625,6 +1625,17 @@ static void test_acpi_q35_slic(void) free_test_data(&data); } +static void test_acpi_q35_applesmc(void) +{ + test_data data = { + .machine = MACHINE_Q35, + .variant = ".applesmc", + }; + + test_acpi_one("-device isa-applesmc", &data); + free_test_data(&data); +} + static void test_oem_fields(test_data *data) { int i; @@ -1783,6 +1794,7 @@ int main(int argc, char *argv[]) qtest_add_func("acpi/q35/acpihmat", test_acpi_q35_tcg_acpi_hmat); qtest_add_func("acpi/piix4/acpierst", test_acpi_piix4_acpi_erst); qtest_add_func("acpi/q35/acpierst", test_acpi_q35_acpi_erst); + qtest_add_func("acpi/q35/applesmc", test_acpi_q35_applesmc); qtest_add_func("acpi/microvm", test_acpi_microvm_tcg); qtest_add_func("acpi/microvm/usb", test_acpi_microvm_usb_tcg); qtest_add_func("acpi/microvm/rtc", test_acpi_microvm_rtc_tcg); From 1d7ea915003a2064dc542ffee8d02104a2dee728 Mon Sep 17 00:00:00 2001 From: Igor Mammedov Date: Wed, 8 Jun 2022 09:53:29 -0400 Subject: [PATCH 24/53] acpi: applesmc: use AcpiDevAmlIfClass:build_dev_aml to provide device's AML .. and clean up not longer needed conditionals in DSTD build code. applesmc AML will be fetched and included when ISA bridge will build its own AML code (incl. attached devices). Expected AML change: the device under separate _SB.PCI0.ISA scope is moved directly under Device(ISA) node. Signed-off-by: Igor Mammedov Acked-by: Gerd Hoffmann Message-Id: <20220608135340.3304695-25-imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- hw/i386/acpi-build.c | 22 ---------------------- hw/misc/applesmc.c | 29 +++++++++++++++++++++++++++++ include/hw/isa/isa.h | 14 -------------- 3 files changed, 29 insertions(+), 36 deletions(-) diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c index f7f1671407..b96705c688 100644 --- a/hw/i386/acpi-build.c +++ b/hw/i386/acpi-build.c @@ -121,7 +121,6 @@ typedef struct AcpiMiscInfo { const unsigned char *dsdt_code; unsigned dsdt_size; uint16_t pvpanic_port; - uint16_t applesmc_io_base; } AcpiMiscInfo; typedef struct AcpiBuildPciBusHotplugState { @@ -307,7 +306,6 @@ static void acpi_get_misc_info(AcpiMiscInfo *info) info->tpm_version = tpm_get_version(tpm_find()); #endif info->pvpanic_port = pvpanic_port(); - info->applesmc_io_base = applesmc_port(); } /* @@ -1800,26 +1798,6 @@ build_dsdt(GArray *table_data, BIOSLinker *linker, aml_append(dsdt, scope); } - if (misc->applesmc_io_base) { - scope = aml_scope("\\_SB.PCI0.ISA"); - dev = aml_device("SMC"); - - aml_append(dev, aml_name_decl("_HID", aml_eisaid("APP0001"))); - /* device present, functioning, decoding, not shown in UI */ - aml_append(dev, aml_name_decl("_STA", aml_int(0xB))); - - crs = aml_resource_template(); - aml_append(crs, - aml_io(AML_DECODE16, misc->applesmc_io_base, misc->applesmc_io_base, - 0x01, APPLESMC_MAX_DATA_LENGTH) - ); - aml_append(crs, aml_irq_no_flags(6)); - aml_append(dev, aml_name_decl("_CRS", crs)); - - aml_append(scope, dev); - aml_append(dsdt, scope); - } - if (misc->pvpanic_port) { scope = aml_scope("\\_SB.PCI0.ISA"); diff --git a/hw/misc/applesmc.c b/hw/misc/applesmc.c index 81cd6b6423..5f9c742e50 100644 --- a/hw/misc/applesmc.c +++ b/hw/misc/applesmc.c @@ -37,10 +37,14 @@ #include "qemu/module.h" #include "qemu/timer.h" #include "qom/object.h" +#include "hw/acpi/acpi_aml_interface.h" /* #define DEBUG_SMC */ #define APPLESMC_DEFAULT_IOBASE 0x300 +#define TYPE_APPLE_SMC "isa-applesmc" +#define APPLESMC_MAX_DATA_LENGTH 32 +#define APPLESMC_PROP_IO_BASE "iobase" enum { APPLESMC_DATA_PORT = 0x00, @@ -347,14 +351,35 @@ static Property applesmc_isa_properties[] = { DEFINE_PROP_END_OF_LIST(), }; +static void build_applesmc_aml(AcpiDevAmlIf *adev, Aml *scope) +{ + Aml *crs; + AppleSMCState *s = APPLE_SMC(adev); + uint32_t iobase = s->iobase; + Aml *dev = aml_device("SMC"); + + aml_append(dev, aml_name_decl("_HID", aml_eisaid("APP0001"))); + /* device present, functioning, decoding, not shown in UI */ + aml_append(dev, aml_name_decl("_STA", aml_int(0xB))); + crs = aml_resource_template(); + aml_append(crs, + aml_io(AML_DECODE16, iobase, iobase, 0x01, APPLESMC_MAX_DATA_LENGTH) + ); + aml_append(crs, aml_irq_no_flags(6)); + aml_append(dev, aml_name_decl("_CRS", crs)); + aml_append(scope, dev); +} + static void qdev_applesmc_class_init(ObjectClass *klass, void *data) { DeviceClass *dc = DEVICE_CLASS(klass); + AcpiDevAmlIfClass *adevc = ACPI_DEV_AML_IF_CLASS(klass); dc->realize = applesmc_isa_realize; dc->reset = qdev_applesmc_isa_reset; device_class_set_props(dc, applesmc_isa_properties); set_bit(DEVICE_CATEGORY_MISC, dc->categories); + adevc->build_dev_aml = build_applesmc_aml; } static const TypeInfo applesmc_isa_info = { @@ -362,6 +387,10 @@ static const TypeInfo applesmc_isa_info = { .parent = TYPE_ISA_DEVICE, .instance_size = sizeof(AppleSMCState), .class_init = qdev_applesmc_class_init, + .interfaces = (InterfaceInfo[]) { + { TYPE_ACPI_DEV_AML_IF }, + { }, + }, }; static void applesmc_register_types(void) diff --git a/include/hw/isa/isa.h b/include/hw/isa/isa.h index 5c5a3d43a7..6f9380007d 100644 --- a/include/hw/isa/isa.h +++ b/include/hw/isa/isa.h @@ -16,20 +16,6 @@ OBJECT_DECLARE_TYPE(ISADevice, ISADeviceClass, ISA_DEVICE) #define TYPE_ISA_BUS "ISA" OBJECT_DECLARE_SIMPLE_TYPE(ISABus, ISA_BUS) -#define TYPE_APPLE_SMC "isa-applesmc" -#define APPLESMC_MAX_DATA_LENGTH 32 -#define APPLESMC_PROP_IO_BASE "iobase" - -static inline uint16_t applesmc_port(void) -{ - Object *obj = object_resolve_path_type("", TYPE_APPLE_SMC, NULL); - - if (obj) { - return object_property_get_uint(obj, APPLESMC_PROP_IO_BASE, NULL); - } - return 0; -} - #define TYPE_ISADMA "isa-dma" typedef struct IsaDmaClass IsaDmaClass; From ec66dbc75381ad6c3ac62c907b014d847ece4580 Mon Sep 17 00:00:00 2001 From: Igor Mammedov Date: Wed, 8 Jun 2022 09:53:30 -0400 Subject: [PATCH 25/53] tests: acpi: update expected blobs @@ -145,6 +145,23 @@ DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPC ", 0x00000001) { Name (_ADR, 0x001F0000) // _ADR: Address OperationRegion (PIRQ, PCI_Config, 0x60, 0x0C) + Device (SMC) + { + Name (_HID, EisaId ("APP0001")) // _HID: Hardware ID + Name (_STA, 0x0B) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x0300, // Range Minimum + 0x0300, // Range Maximum + 0x01, // Alignment + 0x20, // Length + ) + IRQNoFlags () + {6} + }) + } + Device (KBD) { Name (_HID, EisaId ("PNP0303") /* IBM Enhanced Keyboard (101/102-key, PS/2 Mouse) */) // _HID: Hardware ID @@ -3246,26 +3263,6 @@ DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPC ", 0x00000001) } } - Scope (\_SB.PCI0.ISA) - { - Device (SMC) - { - Name (_HID, EisaId ("APP0001")) // _HID: Hardware ID - Name (_STA, 0x0B) // _STA: Status - Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings - { - IO (Decode16, - 0x0300, // Range Minimum - 0x0300, // Range Maximum - 0x01, // Alignment - 0x20, // Length - ) - IRQNoFlags () - {6} - }) - } - } - Scope (\_SB) { Scope (PCI0) Signed-off-by: Igor Mammedov Message-Id: <20220608135340.3304695-26-imammedo@redhat.com> --- tests/data/acpi/q35/DSDT.applesmc | Bin 0 -> 8320 bytes tests/qtest/bios-tables-test-allowed-diff.h | 1 - 2 files changed, 1 deletion(-) diff --git a/tests/data/acpi/q35/DSDT.applesmc b/tests/data/acpi/q35/DSDT.applesmc index e69de29bb2d1d6434b8b29ae775ad8c2e48c5391..00092aacc6ce44dd8792b00a0fa183e5b06d33c6 100644 GIT binary patch literal 8320 zcmb7JOKcm*8J^`!tL0K!Qk3OaY{E&)_r?xN%s)PQXYx!=g zYz~?&&#oL;ra5rMS<)O-ye=~bn=OwO*X9Q6ft$MXI&;0ttD{bOxRYP9oPPUX7rs4v z`lT-}zf-yQ^MC&0&g)hRfb;lk;_ros4&eu(btW7+za3sTJ|sH7wmMq+?T}vEV}%AEI@ z(>8_5n%VSgJ*m=wHd58!ZTh`7vl%=1F3VE=TMorbFV{L=$?tlDQt`P#(5tYBTEd8$ zw%!jdCmh+I4MR2zv*YnT8!db`++x4mvf01?m)>Xl)}rWJ-dgy0p89g|9ZNBW-c*WD zQFmy-`+MF}E2s?kAfp3k(HXzh-AGuWW%u`<4B9TP(M`!X%z%ns#mb7jj+JW|EXk5a z>D)_5+uwWUQq_ymm4hV25jyV0acj9@ge+u+(J-#DYxsLE!C8;B*EbJYi%S~Iw9@Bj z0Q-CA*Zkh99JrKt9OC}O6?lK%O}?8n&2zgv^Lcl@eaJ}zjlrJ5xu3kBWac@Ca~|*Z zq~gj!Hom<)b;Kf!z&U1M1UvZ$Be?6kLC?tEvn>;Mjsh1WyII1)EA@AS+C@x~zuOk> zYnB4HTCQEhg=(kWHL?eSMuA)HY_>~&%X_8NH>zvyC02agcWW0D{YNPpkE0zzMDH2b z8Rh8zfSUJN@repJvrv>PqC*&C!=jh*y`a4?T8n4S!Snz4Pw?#f?ax-eX`lG3+m0yL z8@~!ij}C9J(TU-8D}f2}A%DzlJk?{ipHCXM=)mr-jFyKtthuO=POu!?io)AljO}lk ze#@=1qCLQ0Bif#Sf?yOluD zkUC}$!hCVIoMNzRl# zNHStdXi_i%FS`?h={^XF>BZQS8uO&aJgGAgs?1Xw^OVLs zr85z#%+nh4w8lKGGZCuHM>OUm8uJmIiBM&p;Y{f=XE;;7G*E$!BdVzysDK_CC_?mzV_~2I8%ME54kZH>P#LN^VW1){ zXTm@gC>bb1>562a2&GOKsK9b23{-)VfeI+ENd}5g>V$y`EN8+%6(|{~fN~}oC_`0?L_Wpa`W-7^uKf}LawZulLa7r5DzKah16818paRO7WS|J8P8g`bawZH^ zfs%m=C})y^B9uB|paRR8Fi-_b1}dPONd}5g>V$y`EN8+%6(|{~fN~}oC_Az;Y%GRDqI#3Mglifg+STVW0xbnJ`cVN(L&RoJj_XQ0jz% zB2o+#k!qj_RRcw+7^uR8fhtTgP=!ebsxV=o3KIsZFv&m_CK;&0gn=qd7^uP|167!0 zpb8TPsxV=o3X=>}VUmF=Oc*F4d3Rx;h;YaFV3L6%#BGovG3D68KoQBYg@GcHV@n2# zP>wAbC_=0xogBbI*~lL9e^&SDAJV%S`cvuO`sve2`Y)9hMrbj_@VgroIPON34lW%$ zlVNFQqeka-IyC6eG>c2E4Xg%?=0C7@cd!OCzi(xW&$Kq&?mPh9a(=_a-Yc6rMpEmtuh+%At-20=G4?(D>Upz_onSFcV~$KuKN zu3lBDS9$d+`lnW}7H3zl_V?PPU97ZWH89q0B_5)@tCV+nd3U0`dqjCRF7HieC8p_HH%LAVknC@a3R&Oh2_>{*Vn%8l<$!Tom^>p~wm`W$wW~Q5(mjyi?K0v0@iME;P zrsf%zfN7pdVfZSUN+;T8rkk2KMLiupRi@I3wwdXs=E1U_4&N_R=|tPibW_juF+CkV zYNpbOwwdXsp3@aQ9lms?(up=bopb8JdiLI8(5_-92D>hH5*q@}`io-oqG?@uIw>~} z{BA9fPpO5;32(}|{${E9<~z|FH-A}r>$SJvy!qDlYj3l@;reTr;-@udSqp2$^()+FA*4 zuhJ`Ft+~}{nGvH#JoOi@a6Rad=wz2drF*k5K<`FVXw^O@ZNQ@)49U0fY^a{gkM#Qc~Mi{ZJFW2nf3`67dZ8U|^_GC#e zc(M^UWwi47WGimV_E)3%;g&T{jU3(gX!|zxaf{vDLa**VKYDfw#-9w_ zzHKWRO$`h#f_HP9_8n^}vGGU=ud;2r<U!5&(Di`{5^XlwjZqK{xLC-#7m}fsN zQ~5D?(e)W)6IqGLR)XG`Y{W3n>|Ot(7wDPB{KpT|1JAX&Pfs^yK)ce*XDyRqwSm4v ziwoFO?PW;}+qr(DcnXuJ;nxPW@_81|c$!G`OgZZ*y2K}bJg3UfvEomFU1c;7hwlfm zW2H3sZin|&LpbeaF;n@b5Z_9@n6>_VJI4}OBEWA<2kaQ$x9{7AiFO0;B>cX`<@@$w zoWmXxWB=uQu>3lG7LUjDSxmnK({^V~Y-9aVTw#CEuH3`6?RVnJy%+C1fgRmAn`ooa zqCGGSoc5!bHYwc{21jgS^9|w(21mRasa<&|Y8$Eiomk40G6vu2yqNNvepd`J?J_?| zf Date: Wed, 8 Jun 2022 09:53:31 -0400 Subject: [PATCH 26/53] tests: acpi: white-lists expected DSDT.pvpanic-isa blob Signed-off-by: Igor Mammedov Message-Id: <20220608135340.3304695-27-imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- tests/data/acpi/q35/DSDT.pvpanic-isa | 0 tests/qtest/bios-tables-test-allowed-diff.h | 1 + 2 files changed, 1 insertion(+) create mode 100644 tests/data/acpi/q35/DSDT.pvpanic-isa diff --git a/tests/data/acpi/q35/DSDT.pvpanic-isa b/tests/data/acpi/q35/DSDT.pvpanic-isa new file mode 100644 index 0000000000..e69de29bb2 diff --git a/tests/qtest/bios-tables-test-allowed-diff.h b/tests/qtest/bios-tables-test-allowed-diff.h index dfb8523c8b..d5cd7aa4f5 100644 --- a/tests/qtest/bios-tables-test-allowed-diff.h +++ b/tests/qtest/bios-tables-test-allowed-diff.h @@ -1 +1,2 @@ /* List of comma-separated changed AML files to ignore */ +"tests/data/acpi/q35/DSDT.pvpanic-isa", From fd7bcffe5988d799f37e4ad92cfd1480ce7a9ce6 Mon Sep 17 00:00:00 2001 From: Igor Mammedov Date: Wed, 8 Jun 2022 09:53:32 -0400 Subject: [PATCH 27/53] tests: acpi: add pvpanic-isa: testcase Signed-off-by: Igor Mammedov Acked-by: Gerd Hoffmann Message-Id: <20220608135340.3304695-28-imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- tests/qtest/bios-tables-test.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/tests/qtest/bios-tables-test.c b/tests/qtest/bios-tables-test.c index 7d238218ca..56498bbcc8 100644 --- a/tests/qtest/bios-tables-test.c +++ b/tests/qtest/bios-tables-test.c @@ -1636,6 +1636,17 @@ static void test_acpi_q35_applesmc(void) free_test_data(&data); } +static void test_acpi_q35_pvpanic_isa(void) +{ + test_data data = { + .machine = MACHINE_Q35, + .variant = ".pvpanic-isa", + }; + + test_acpi_one("-device pvpanic", &data); + free_test_data(&data); +} + static void test_oem_fields(test_data *data) { int i; @@ -1795,6 +1806,7 @@ int main(int argc, char *argv[]) qtest_add_func("acpi/piix4/acpierst", test_acpi_piix4_acpi_erst); qtest_add_func("acpi/q35/acpierst", test_acpi_q35_acpi_erst); qtest_add_func("acpi/q35/applesmc", test_acpi_q35_applesmc); + qtest_add_func("acpi/q35/pvpanic-isa", test_acpi_q35_pvpanic_isa); qtest_add_func("acpi/microvm", test_acpi_microvm_tcg); qtest_add_func("acpi/microvm/usb", test_acpi_microvm_usb_tcg); qtest_add_func("acpi/microvm/rtc", test_acpi_microvm_rtc_tcg); From ff36e90e7c12c0bfdb43737614f8ef7c3bc35bd1 Mon Sep 17 00:00:00 2001 From: Igor Mammedov Date: Wed, 8 Jun 2022 09:53:33 -0400 Subject: [PATCH 28/53] acpi: pvpanic-isa: use AcpiDevAmlIfClass:build_dev_aml to provide device's AML .. and clean up not longer needed conditionals in DSTD build code pvpanic-isa AML will be fetched and included when ISA bridge will build its own AML code (including attached devices). Expected AML change: the device under separate _SB.PCI0.ISA scope is moved directly under Device(ISA) node. Signed-off-by: Igor Mammedov Acked-by: Gerd Hoffmann Message-Id: <20220608135340.3304695-29-imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- hw/i386/acpi-build.c | 37 ---------------------------------- hw/misc/pvpanic-isa.c | 42 +++++++++++++++++++++++++++++++++++++++ include/hw/misc/pvpanic.h | 9 --------- 3 files changed, 42 insertions(+), 46 deletions(-) diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c index b96705c688..bbe02b068e 100644 --- a/hw/i386/acpi-build.c +++ b/hw/i386/acpi-build.c @@ -31,7 +31,6 @@ #include "hw/cxl/cxl.h" #include "hw/core/cpu.h" #include "target/i386/cpu.h" -#include "hw/misc/pvpanic.h" #include "hw/timer/hpet.h" #include "hw/acpi/acpi-defs.h" #include "hw/acpi/acpi.h" @@ -120,7 +119,6 @@ typedef struct AcpiMiscInfo { #endif const unsigned char *dsdt_code; unsigned dsdt_size; - uint16_t pvpanic_port; } AcpiMiscInfo; typedef struct AcpiBuildPciBusHotplugState { @@ -305,7 +303,6 @@ static void acpi_get_misc_info(AcpiMiscInfo *info) #ifdef CONFIG_TPM info->tpm_version = tpm_get_version(tpm_find()); #endif - info->pvpanic_port = pvpanic_port(); } /* @@ -1798,40 +1795,6 @@ build_dsdt(GArray *table_data, BIOSLinker *linker, aml_append(dsdt, scope); } - if (misc->pvpanic_port) { - scope = aml_scope("\\_SB.PCI0.ISA"); - - dev = aml_device("PEVT"); - aml_append(dev, aml_name_decl("_HID", aml_string("QEMU0001"))); - - crs = aml_resource_template(); - aml_append(crs, - aml_io(AML_DECODE16, misc->pvpanic_port, misc->pvpanic_port, 1, 1) - ); - aml_append(dev, aml_name_decl("_CRS", crs)); - - aml_append(dev, aml_operation_region("PEOR", AML_SYSTEM_IO, - aml_int(misc->pvpanic_port), 1)); - field = aml_field("PEOR", AML_BYTE_ACC, AML_NOLOCK, AML_PRESERVE); - aml_append(field, aml_named_field("PEPT", 8)); - aml_append(dev, field); - - /* device present, functioning, decoding, shown in UI */ - aml_append(dev, aml_name_decl("_STA", aml_int(0xF))); - - method = aml_method("RDPT", 0, AML_NOTSERIALIZED); - aml_append(method, aml_store(aml_name("PEPT"), aml_local(0))); - aml_append(method, aml_return(aml_local(0))); - aml_append(dev, method); - - method = aml_method("WRPT", 1, AML_NOTSERIALIZED); - aml_append(method, aml_store(aml_arg(0), aml_name("PEPT"))); - aml_append(dev, method); - - aml_append(scope, dev); - aml_append(dsdt, scope); - } - sb_scope = aml_scope("\\_SB"); { Object *pci_host; diff --git a/hw/misc/pvpanic-isa.c b/hw/misc/pvpanic-isa.c index b84d4d458d..ccec50f61b 100644 --- a/hw/misc/pvpanic-isa.c +++ b/hw/misc/pvpanic-isa.c @@ -22,6 +22,7 @@ #include "qom/object.h" #include "hw/isa/isa.h" #include "standard-headers/linux/pvpanic.h" +#include "hw/acpi/acpi_aml_interface.h" OBJECT_DECLARE_SIMPLE_TYPE(PVPanicISAState, PVPANIC_ISA_DEVICE) @@ -63,6 +64,41 @@ static void pvpanic_isa_realizefn(DeviceState *dev, Error **errp) isa_register_ioport(d, &ps->mr, s->ioport); } +static void build_pvpanic_isa_aml(AcpiDevAmlIf *adev, Aml *scope) +{ + Aml *crs, *field, *method; + PVPanicISAState *s = PVPANIC_ISA_DEVICE(adev); + Aml *dev = aml_device("PEVT"); + + aml_append(dev, aml_name_decl("_HID", aml_string("QEMU0001"))); + + crs = aml_resource_template(); + aml_append(crs, + aml_io(AML_DECODE16, s->ioport, s->ioport, 1, 1) + ); + aml_append(dev, aml_name_decl("_CRS", crs)); + + aml_append(dev, aml_operation_region("PEOR", AML_SYSTEM_IO, + aml_int(s->ioport), 1)); + field = aml_field("PEOR", AML_BYTE_ACC, AML_NOLOCK, AML_PRESERVE); + aml_append(field, aml_named_field("PEPT", 8)); + aml_append(dev, field); + + /* device present, functioning, decoding, shown in UI */ + aml_append(dev, aml_name_decl("_STA", aml_int(0xF))); + + method = aml_method("RDPT", 0, AML_NOTSERIALIZED); + aml_append(method, aml_store(aml_name("PEPT"), aml_local(0))); + aml_append(method, aml_return(aml_local(0))); + aml_append(dev, method); + + method = aml_method("WRPT", 1, AML_NOTSERIALIZED); + aml_append(method, aml_store(aml_arg(0), aml_name("PEPT"))); + aml_append(dev, method); + + aml_append(scope, dev); +} + static Property pvpanic_isa_properties[] = { DEFINE_PROP_UINT16(PVPANIC_IOPORT_PROP, PVPanicISAState, ioport, 0x505), DEFINE_PROP_UINT8("events", PVPanicISAState, pvpanic.events, @@ -73,10 +109,12 @@ static Property pvpanic_isa_properties[] = { static void pvpanic_isa_class_init(ObjectClass *klass, void *data) { DeviceClass *dc = DEVICE_CLASS(klass); + AcpiDevAmlIfClass *adevc = ACPI_DEV_AML_IF_CLASS(klass); dc->realize = pvpanic_isa_realizefn; device_class_set_props(dc, pvpanic_isa_properties); set_bit(DEVICE_CATEGORY_MISC, dc->categories); + adevc->build_dev_aml = build_pvpanic_isa_aml; } static const TypeInfo pvpanic_isa_info = { @@ -85,6 +123,10 @@ static const TypeInfo pvpanic_isa_info = { .instance_size = sizeof(PVPanicISAState), .instance_init = pvpanic_isa_initfn, .class_init = pvpanic_isa_class_init, + .interfaces = (InterfaceInfo[]) { + { TYPE_ACPI_DEV_AML_IF }, + { }, + }, }; static void pvpanic_register_types(void) diff --git a/include/hw/misc/pvpanic.h b/include/hw/misc/pvpanic.h index 7f16cc9b16..e520566ab0 100644 --- a/include/hw/misc/pvpanic.h +++ b/include/hw/misc/pvpanic.h @@ -33,13 +33,4 @@ struct PVPanicState { void pvpanic_setup_io(PVPanicState *s, DeviceState *dev, unsigned size); -static inline uint16_t pvpanic_port(void) -{ - Object *o = object_resolve_path_type("", TYPE_PVPANIC_ISA_DEVICE, NULL); - if (!o) { - return 0; - } - return object_property_get_uint(o, PVPANIC_IOPORT_PROP, NULL); -} - #endif From d09ac1167ef05519fcf94ea98734614d8aade7a4 Mon Sep 17 00:00:00 2001 From: Igor Mammedov Date: Wed, 8 Jun 2022 09:53:34 -0400 Subject: [PATCH 29/53] tests: acpi: update expected DSDT.pvpanic-isa blob @@ -145,6 +145,37 @@ DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPC ", 0x00000001) { Name (_ADR, 0x001F0000) // _ADR: Address OperationRegion (PIRQ, PCI_Config, 0x60, 0x0C) + Device (PEVT) + { + Name (_HID, "QEMU0001") // _HID: Hardware ID + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x0505, // Range Minimum + 0x0505, // Range Maximum + 0x01, // Alignment + 0x01, // Length + ) + }) + OperationRegion (PEOR, SystemIO, 0x0505, One) + Field (PEOR, ByteAcc, NoLock, Preserve) + { + PEPT, 8 + } + + Name (_STA, 0x0F) // _STA: Status + Method (RDPT, 0, NotSerialized) + { + Local0 = PEPT /* \_SB_.PCI0.ISA_.PEVT.PEPT */ + Return (Local0) + } + + Method (WRPT, 1, NotSerialized) + { + PEPT = Arg0 + } + } + Device (KBD) { Name (_HID, EisaId ("PNP0303") /* IBM Enhanced Keyboard (101/102-key, PS/2 Mouse) */) // _HID: Hardware ID @@ -3246,40 +3277,6 @@ DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPC ", 0x00000001) } } - Scope (\_SB.PCI0.ISA) - { - Device (PEVT) - { - Name (_HID, "QEMU0001") // _HID: Hardware ID - Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings - { - IO (Decode16, - 0x0505, // Range Minimum - 0x0505, // Range Maximum - 0x01, // Alignment - 0x01, // Length - ) - }) - OperationRegion (PEOR, SystemIO, 0x0505, One) - Field (PEOR, ByteAcc, NoLock, Preserve) - { - PEPT, 8 - } - - Name (_STA, 0x0F) // _STA: Status - Method (RDPT, 0, NotSerialized) - { - Local0 = PEPT /* \_SB_.PCI0.ISA_.PEVT.PEPT */ - Return (Local0) - } - - Method (WRPT, 1, NotSerialized) - { - PEPT = Arg0 - } - } - } - Scope (\_SB) { Scope (PCI0) Signed-off-by: Igor Mammedov Message-Id: <20220608135340.3304695-30-imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- tests/data/acpi/q35/DSDT.pvpanic-isa | Bin 0 -> 8375 bytes tests/qtest/bios-tables-test-allowed-diff.h | 1 - 2 files changed, 1 deletion(-) diff --git a/tests/data/acpi/q35/DSDT.pvpanic-isa b/tests/data/acpi/q35/DSDT.pvpanic-isa index e69de29bb2d1d6434b8b29ae775ad8c2e48c5391..cc545b5d2505246d33f83d2482273968aa1be032 100644 GIT binary patch literal 8375 zcmb7JOKcm*8J^`!tK~{sQk3LZY{E&?~(R|lb;iIo;;J&VO^} z)XzV^_)huW&;I#~+pk+G0M6mBiNEJ#xAeAd5ed_Z*mY;~~sS)V@^Wez=w zBPzLTiz2FO_2BjH{)=9_?D96w1+AdumR8X&w;krrSf@T-Va%q^q2Hf|!{J}WEpu)# zr)dh6zF80aj#Ozt8>#B<)q_rx*^J%)Hp^1on-0Z`FZ(U87__}!vG9B^?37tdB~eU8 z+wVn|6AkQ7`w{C$+2Qbj4dy@XZ?oTR+w9-}OCPWUYeBRvXU%^!OKrLTElV+m*3?&? zrshzGclXzp8)3P}I~ff)gT@4n_GZG0EE}Ve3H+Bud*?R&=2oe6D0$AZYDOAA!?-~t zf1_<=5n(Ry`@j!67)7+(S}4r7y`aNlDvJ)Hf_9f@D-TiaxL1$Igof5Oi(6Ej* zS2NyCzMC}7vwOVebM8j-kdp=)V>E^HAo(E4%(D*XJlXEJhpowuW(BW0W-&9&vkblD zv~mwSelKvtj*-1*TP6ma0v7|aRm8A&BB-L`V_cPL@WU3 z#WT(WREESv{T!R%OkhV5F(ov?I1^CLL`Y1uhGUbQDO-?a#FWsaU;@gS2#G1PV6_S? zuP4Qs5}FcB*?5Gi&a|d8&6yIK7EIZAgsRSrrZdBt5}MI9&fI%jpA2vwbyrqj}NTDnezs?MyYGpp&$>N*jsI`Mv0#?#hx z+PY4Js?Ir0=bWZD>pBstIu|sZ3!2UaT_-|Sr=#g~G@XvF6QQaz zr|HaTI&->CgsRTGrZcbU%u8LB#AprTsNgn=qhGEjul70EymN}VuJf#pmX zr~)Me6;Pg&3>2Z%2?G^a&V+#~P%=;fAz;Y%GRDqI#3Mglifg+ST zVW0xbnJ`cVN(L&RoJj_XQ0jz%3M^;BKouw%sDN@N87M-j69y``0?L_Wpa`W-7^uKf}LawZulLa7r5DzKah16818paRO7WS|J8P8g`bawZH^ zfs%m=C})y^B9uB|paRR8Fi-_b1}dPONd}5g>V$zJQVbN4YM=;J14XD9sKSJSDoip^ zg-HggFkzqy69%d<$v_n*8K}a9fhtTGsKO)zRhVR;3KIsZFkzqylMGa0l7T8r7$_n+ zx-d{g7%|?NWS|H!3^F99>{}QpBH6bvP(-qC$v_dxz9j=ihz+O{Jy<9k*nR%b>H+;j zdN)IV%H5kkc_vB!rP6*1?V%V!d$SD3-K@~XrHf}W?C5OzbYG=QjV^Vwu-MqdZopvn zeQR$QTQ{=@R<`hLW7BQV0?;ny=B?}}88*xJmu|4zRA!}dZN%^IS__Qs(1y_R3gxY@U4Q>=h+@g=epzeQNefVS4sTcfU#6 z#ReTV5l7ms#3Q74mGmx8?~bK+k4W#1(tBg#Eo^9gXZ4%>Ag{Ue>{Ea z5z_lgdY`BF$I|;pr1wYZtK;d@kC48qq_6Vy)v@%|Bhpt#>1*TZGmntIrlha&^tG|{ zwIkBkM(OM0>1Q4xeO*ak=jrQX>FY^|C^SFM0f- zbv>$Xd>LCgy*hkrOjIYzrdBtxF7tYI_yC!xPLxfpZepEb3z*iK6o#*oiRwhz)aoYI zO+l{?pDGj8iL$BHO{{|@y*hlqOjIYzrdBsGub1`e@KG~SohX}H-NZay(W}Fk&O~*h zOs~#4`EWmbe<5sEaDaou8as(|1ZU$VapqCCE@_!94Krp`h*^LB64!$U ziAK(q-JpRZj}kRQ97m-KIk!`NH8HUIyX+$u2O?Js^$d3J%d_3bFFlh|g^~c;ejhJJ zvY17K6aDcABq6pIu{ph^->Xg2Tt;BdKL9dM$qMN6- zuKVGOG^ert@x$`KyfzPLc4GxJ%bi@-G8uLo=sUD9kE7U5mc+2#tJexAv3P2M-}6i7 z*l5MmLZUh4Y^3NBU-+XnReGKkehlm?qmDRyKZp}6r66!yyrmk#X)cMC$`6J33G9We z_2*l2EP*Wo{DySFiQxnLfo+&5H}Fov?;AXRU?0YFI74FWzx?QyKc~;);gCLy>6c*I zp{|KztUrn;><`+LdpPa=Ry?`)((R{k5Im|)lu>Wd85lZF`%z4Xlx_;0BhJ40xpEnu zBVLVEuDlb)!DUuBIDaP=GsTR-PdYE8f_l&vT}+454=X_@O?kgg)^*RmXB)?GO! Date: Wed, 8 Jun 2022 09:53:35 -0400 Subject: [PATCH 30/53] tests: acpi: white-list DSDT.tis.tpm2/DSDT.tis.tpm12 expected blobs Signed-off-by: Igor Mammedov Acked-by: Ani Sinha Message-Id: <20220608135340.3304695-31-imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- tests/qtest/bios-tables-test-allowed-diff.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/tests/qtest/bios-tables-test-allowed-diff.h b/tests/qtest/bios-tables-test-allowed-diff.h index dfb8523c8b..7b3bf9a207 100644 --- a/tests/qtest/bios-tables-test-allowed-diff.h +++ b/tests/qtest/bios-tables-test-allowed-diff.h @@ -1 +1,3 @@ /* List of comma-separated changed AML files to ignore */ +"tests/data/acpi/q35/DSDT.tis.tpm2", +"tests/data/acpi/q35/DSDT.tis.tpm12", From 5198d7939cc1b5076e0d673f93e6074f0235f2ff Mon Sep 17 00:00:00 2001 From: Igor Mammedov Date: Wed, 8 Jun 2022 09:53:36 -0400 Subject: [PATCH 31/53] acpi: pc/q35: tpm-tis: fix TPM device scope tpm-tis 2.0, is not a PCI device but ISA one, move it under ISA scope to fix incorrect placement. Fixes: 24cf5413aa0 (acpi: Make TPM 2.0 with TIS available as MSFT0101) Signed-off-by: Igor Mammedov Reviewed-by: Ani Sinha Acked-by: Gerd Hoffmann Message-Id: <20220608135340.3304695-32-imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- hw/i386/acpi-build.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c index bbe02b068e..6b496480d2 100644 --- a/hw/i386/acpi-build.c +++ b/hw/i386/acpi-build.c @@ -1813,15 +1813,14 @@ build_dsdt(GArray *table_data, BIOSLinker *linker, #ifdef CONFIG_TPM if (TPM_IS_TIS_ISA(tpm)) { + dev = aml_device("ISA.TPM"); if (misc->tpm_version == TPM_VERSION_2_0) { - dev = aml_device("TPM"); aml_append(dev, aml_name_decl("_HID", aml_string("MSFT0101"))); aml_append(dev, aml_name_decl("_STR", aml_string("TPM 2.0 Device"))); } else { - dev = aml_device("ISA.TPM"); aml_append(dev, aml_name_decl("_HID", aml_eisaid("PNP0C31"))); } From d3ecb22c939ebbf92aa9d28b912a3b8a947a54f1 Mon Sep 17 00:00:00 2001 From: Igor Mammedov Date: Wed, 8 Jun 2022 09:53:37 -0400 Subject: [PATCH 32/53] acpi: pc/q35: remove not needed 'if' condition on pci bus Signed-off-by: Igor Mammedov Reviewed-by: Ani Sinha Acked-by: Gerd Hoffmann Message-Id: <20220608135340.3304695-33-imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- hw/i386/acpi-build.c | 10 ++-------- 1 file changed, 2 insertions(+), 8 deletions(-) diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c index 6b496480d2..1204b6da05 100644 --- a/hw/i386/acpi-build.c +++ b/hw/i386/acpi-build.c @@ -1797,16 +1797,10 @@ build_dsdt(GArray *table_data, BIOSLinker *linker, sb_scope = aml_scope("\\_SB"); { - Object *pci_host; - PCIBus *bus = NULL; - - pci_host = acpi_get_i386_pci_host(); + Object *pci_host = acpi_get_i386_pci_host(); if (pci_host) { - bus = PCI_HOST_BRIDGE(pci_host)->bus; - } - - if (bus) { + PCIBus *bus = PCI_HOST_BRIDGE(pci_host)->bus; Aml *scope = aml_scope("PCI0"); /* Scan all PCI buses. Generate tables to support hotplug. */ build_append_pci_bus_devices(scope, bus, pm->pcihp_bridge_en); From 168e3aa7acdf128fb8176616dfe099d6ef3c2182 Mon Sep 17 00:00:00 2001 From: Igor Mammedov Date: Wed, 8 Jun 2022 09:53:38 -0400 Subject: [PATCH 33/53] acpi: tpm-tis: use AcpiDevAmlIfClass:build_dev_aml to provide device's AML .. and clean up not longer needed conditionals in DSTD build code tpm-tis AML will be fetched and included when ISA bridge will build its own AML code (including attached devices). Expected AML change: the device under separate _SB.PCI0.ISA scope is moved directly under Device(ISA) node. Signed-off-by: Igor Mammedov Reviewed-by: Ani Sinha Acked-by: Gerd Hoffmann Message-Id: <20220608135340.3304695-34-imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- hw/i386/acpi-build.c | 34 ---------------------------------- hw/tpm/tpm_tis_isa.c | 32 ++++++++++++++++++++++++++++++++ 2 files changed, 32 insertions(+), 34 deletions(-) diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c index 1204b6da05..0b65fc99cd 100644 --- a/hw/i386/acpi-build.c +++ b/hw/i386/acpi-build.c @@ -1804,40 +1804,6 @@ build_dsdt(GArray *table_data, BIOSLinker *linker, Aml *scope = aml_scope("PCI0"); /* Scan all PCI buses. Generate tables to support hotplug. */ build_append_pci_bus_devices(scope, bus, pm->pcihp_bridge_en); - -#ifdef CONFIG_TPM - if (TPM_IS_TIS_ISA(tpm)) { - dev = aml_device("ISA.TPM"); - if (misc->tpm_version == TPM_VERSION_2_0) { - aml_append(dev, aml_name_decl("_HID", - aml_string("MSFT0101"))); - aml_append(dev, - aml_name_decl("_STR", - aml_string("TPM 2.0 Device"))); - } else { - aml_append(dev, aml_name_decl("_HID", - aml_eisaid("PNP0C31"))); - } - aml_append(dev, aml_name_decl("_UID", aml_int(1))); - - aml_append(dev, aml_name_decl("_STA", aml_int(0xF))); - crs = aml_resource_template(); - aml_append(crs, aml_memory32_fixed(TPM_TIS_ADDR_BASE, - TPM_TIS_ADDR_SIZE, AML_READ_WRITE)); - /* - FIXME: TPM_TIS_IRQ=5 conflicts with PNP0C0F irqs, - Rewrite to take IRQ from TPM device model and - fix default IRQ value there to use some unused IRQ - */ - /* aml_append(crs, aml_irq_no_flags(TPM_TIS_IRQ)); */ - aml_append(dev, aml_name_decl("_CRS", crs)); - - tpm_build_ppi_acpi(tpm, dev); - - aml_append(scope, dev); - } -#endif - aml_append(sb_scope, scope); } } diff --git a/hw/tpm/tpm_tis_isa.c b/hw/tpm/tpm_tis_isa.c index 3477afd735..91e3792248 100644 --- a/hw/tpm/tpm_tis_isa.c +++ b/hw/tpm/tpm_tis_isa.c @@ -30,6 +30,7 @@ #include "tpm_prop.h" #include "tpm_tis.h" #include "qom/object.h" +#include "hw/acpi/acpi_aml_interface.h" struct TPMStateISA { /*< private >*/ @@ -138,10 +139,39 @@ static void tpm_tis_isa_realizefn(DeviceState *dev, Error **errp) } } +static void build_tpm_tis_isa_aml(AcpiDevAmlIf *adev, Aml *scope) +{ + Aml *dev, *crs; + TPMStateISA *isadev = TPM_TIS_ISA(adev); + TPMIf *ti = TPM_IF(isadev); + + dev = aml_device("TPM"); + if (tpm_tis_isa_get_tpm_version(ti) == TPM_VERSION_2_0) { + aml_append(dev, aml_name_decl("_HID", aml_string("MSFT0101"))); + aml_append(dev, aml_name_decl("_STR", aml_string("TPM 2.0 Device"))); + } else { + aml_append(dev, aml_name_decl("_HID", aml_eisaid("PNP0C31"))); + } + aml_append(dev, aml_name_decl("_UID", aml_int(1))); + aml_append(dev, aml_name_decl("_STA", aml_int(0xF))); + crs = aml_resource_template(); + aml_append(crs, aml_memory32_fixed(TPM_TIS_ADDR_BASE, TPM_TIS_ADDR_SIZE, + AML_READ_WRITE)); + /* + * FIXME: TPM_TIS_IRQ=5 conflicts with PNP0C0F irqs, + * fix default TPM_TIS_IRQ value there to use some unused IRQ + */ + /* aml_append(crs, aml_irq_no_flags(isadev->state.irq_num)); */ + aml_append(dev, aml_name_decl("_CRS", crs)); + tpm_build_ppi_acpi(ti, dev); + aml_append(scope, dev); +} + static void tpm_tis_isa_class_init(ObjectClass *klass, void *data) { DeviceClass *dc = DEVICE_CLASS(klass); TPMIfClass *tc = TPM_IF_CLASS(klass); + AcpiDevAmlIfClass *adevc = ACPI_DEV_AML_IF_CLASS(klass); device_class_set_props(dc, tpm_tis_isa_properties); dc->vmsd = &vmstate_tpm_tis_isa; @@ -151,6 +181,7 @@ static void tpm_tis_isa_class_init(ObjectClass *klass, void *data) tc->request_completed = tpm_tis_isa_request_completed; tc->get_version = tpm_tis_isa_get_tpm_version; set_bit(DEVICE_CATEGORY_MISC, dc->categories); + adevc->build_dev_aml = build_tpm_tis_isa_aml; } static const TypeInfo tpm_tis_isa_info = { @@ -161,6 +192,7 @@ static const TypeInfo tpm_tis_isa_info = { .class_init = tpm_tis_isa_class_init, .interfaces = (InterfaceInfo[]) { { TYPE_TPM_IF }, + { TYPE_ACPI_DEV_AML_IF }, { } } }; From f3115cdd9cb8cb6ffba5b9d3e37f096724c77099 Mon Sep 17 00:00:00 2001 From: Igor Mammedov Date: Wed, 8 Jun 2022 09:53:39 -0400 Subject: [PATCH 34/53] tests: acpi: update expected DSDT.tis.tpm2/DSDT.tis.tpm12 blobs expected move of tmp-tis device description directly under Device(ISA) node. for tpm-tis 2.0: @@ -145,6 +145,189 @@ DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPC ", 0x00000001) { Name (_ADR, 0x001F0000) // _ADR: Address OperationRegion (PIRQ, PCI_Config, 0x60, 0x0C) + Device (TPM) + { + Name (_HID, "MSFT0101" /* TPM 2.0 Security Device */) // _HID: Hardware ID + Name (_STR, "TPM 2.0 Device") // _STR: Description String + Name (_UID, One) // _UID: Unique ID + Name (_STA, 0x0F) // _STA: Status ... + } @@ -3281,189 +3464,6 @@ DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPC ", 0x00000001) Method (PCNT, 0, NotSerialized) { } - - Device (TPM) - { - Name (_HID, "MSFT0101" /* TPM 2.0 Security Device */) // _HID: Hardware ID - Name (_STR, "TPM 2.0 Device") // _STR: Description String - Name (_UID, One) // _UID: Unique ID - Name (_STA, 0x0F) // _STA: Status ... - } for tpm-tis 1.2: @@ -145,6 +145,188 @@ DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPC ", 0x00000001) { Name (_ADR, 0x001F0000) // _ADR: Address OperationRegion (PIRQ, PCI_Config, 0x60, 0x0C) + Device (TPM) + { + Name (_HID, EisaId ("PNP0C31")) // _HID: Hardware ID + Name (_UID, One) // _UID: Unique ID + Name (_STA, 0x0F) // _STA: Status ... + } @@ -3281,188 +3463,6 @@ DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPC ", 0x00000001) Method (PCNT, 0, NotSerialized) { } - - Device (ISA.TPM) - { - Name (_HID, EisaId ("PNP0C31")) // _HID: Hardware ID - Name (_UID, One) // _UID: Unique ID - Name (_STA, 0x0F) // _STA: Status ... - } Signed-off-by: Igor Mammedov Acked-by: Ani Sinha Message-Id: <20220608135340.3304695-35-imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- tests/data/acpi/q35/DSDT.tis.tpm12 | Bin 8885 -> 8880 bytes tests/data/acpi/q35/DSDT.tis.tpm2 | Bin 8906 -> 8906 bytes tests/qtest/bios-tables-test-allowed-diff.h | 2 -- 3 files changed, 2 deletions(-) diff --git a/tests/data/acpi/q35/DSDT.tis.tpm12 b/tests/data/acpi/q35/DSDT.tis.tpm12 index 0b5c97fdb5da8b7b55d6b5f2af498a447fda7bf8..a97d884c50485f848054c6ac95ecfa055ff59e5b 100644 GIT binary patch delta 89 zcmdn$y1|vpCDCo#F$WJq@Cp+yp#>9pgFT9bJNW7#QRk vq8kD{g94ej61aFa$Fi`>ak*;6fK&_kYEI5ka^Z|_a#hs>Y1z!rg5>c diff --git a/tests/data/acpi/q35/DSDT.tis.tpm2 b/tests/data/acpi/q35/DSDT.tis.tpm2 index 4e16b126cc1c32f2346078fa69c5261c245d15e8..1f5392919b5ea69696b49ff13aab5c37d0615919 100644 GIT binary patch delta 85 zcmX@*ddii{CDCo#F$WJq@Cp+yp#>9pgFT9bJNW7#QRk nq8kD{g94ej61aFam$R_Sad~OSfK&@OX-{rba@owyl*0r7A8!`n diff --git a/tests/qtest/bios-tables-test-allowed-diff.h b/tests/qtest/bios-tables-test-allowed-diff.h index 7b3bf9a207..dfb8523c8b 100644 --- a/tests/qtest/bios-tables-test-allowed-diff.h +++ b/tests/qtest/bios-tables-test-allowed-diff.h @@ -1,3 +1 @@ /* List of comma-separated changed AML files to ignore */ -"tests/data/acpi/q35/DSDT.tis.tpm2", -"tests/data/acpi/q35/DSDT.tis.tpm12", From 92344e76b867883a023b2b51123a1ca58c5bb714 Mon Sep 17 00:00:00 2001 From: Igor Mammedov Date: Wed, 8 Jun 2022 09:53:40 -0400 Subject: [PATCH 35/53] x86: acpi-build: do not include hw/isa/isa.h directly the last remaining dependency on ISA in acpi-build.c is iapc_boot_arch_8042() which pulls in in isa.h in its own header hw/input/i8042.h. Clean up not longer needed direct inclusion of isa.h in acpi-build.c Signed-off-by: Igor Mammedov Acked-by: Gerd Hoffmann Message-Id: <20220608135340.3304695-36-imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- hw/i386/acpi-build.c | 1 - 1 file changed, 1 deletion(-) diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c index 0b65fc99cd..f41e14a469 100644 --- a/hw/i386/acpi-build.c +++ b/hw/i386/acpi-build.c @@ -37,7 +37,6 @@ #include "hw/acpi/cpu.h" #include "hw/nvram/fw_cfg.h" #include "hw/acpi/bios-linker-loader.h" -#include "hw/isa/isa.h" #include "hw/acpi/acpi_aml_interface.h" #include "hw/input/i8042.h" #include "hw/acpi/memory_hotplug.h" From 03b39fcf64bc958e3223e1d696f9de06de904fc6 Mon Sep 17 00:00:00 2001 From: Jonathan Cameron Date: Wed, 8 Jun 2022 15:54:33 +0100 Subject: [PATCH 36/53] hw/cxl: Make the CXL fixed memory window setup a machine parameter. Paolo Bonzini requested this change to simplify the ongoing effort to allow machine setup entirely via RPC. Includes shortening the command line form cxl-fixed-memory-window to cxl-fmw as the command lines are extremely long even with this change. The json change is needed to ensure that there is a CXLFixedMemoryWindowOptionsList even though the actual element in the json is never used. Similar to existing SgxEpcProperties. Update qemu-options.hx to reflect that this is now a -machine parameter. The bulk of -M / -machine parameters are documented under machine, so use that in preference to M. Update cxl-test and bios-tables-test to reflect new parameters. Signed-off-by: Jonathan Cameron Reviewed-by: Ben Widawsky Reviewed-by: Davidlohr Bueso Message-Id: <20220608145440.26106-2-Jonathan.Cameron@huawei.com> Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- docs/system/devices/cxl.rst | 4 +- hw/core/machine.c | 22 --------- hw/cxl/cxl-host-stubs.c | 6 +-- hw/cxl/cxl-host.c | 72 ++++++++++++++++++++++++++-- hw/i386/pc.c | 3 ++ hw/pci-bridge/pci_expander_bridge.c | 2 +- include/hw/boards.h | 1 + include/hw/cxl/cxl.h | 7 +-- include/hw/cxl/cxl_host.h | 21 +++++++++ qapi/machine.json | 13 +++++ qemu-options.hx | 73 ++++++++++++++--------------- softmmu/vl.c | 44 ----------------- tests/qtest/bios-tables-test.c | 4 +- tests/qtest/cxl-test.c | 4 +- 14 files changed, 150 insertions(+), 126 deletions(-) create mode 100644 include/hw/cxl/cxl_host.h diff --git a/docs/system/devices/cxl.rst b/docs/system/devices/cxl.rst index 9293cbf01a..bcbfe8c490 100644 --- a/docs/system/devices/cxl.rst +++ b/docs/system/devices/cxl.rst @@ -251,7 +251,7 @@ A very simple setup with just one directly attached CXL Type 3 device:: -device pxb-cxl,bus_nr=12,bus=pcie.0,id=cxl.1 \ -device cxl-rp,port=0,bus=cxl.1,id=root_port13,chassis=0,slot=2 \ -device cxl-type3,bus=root_port13,memdev=cxl-mem1,lsa=cxl-lsa1,id=cxl-pmem0 \ - -cxl-fixed-memory-window targets.0=cxl.1,size=4G + -M cxl-fmw.0.targets.0=cxl.1,cxl-fmw.0.size=4G A setup suitable for 4 way interleave. Only one fixed window provided, to enable 2 way interleave across 2 CXL host bridges. Each host bridge has 2 CXL Root Ports, with @@ -277,7 +277,7 @@ the CXL Type3 device directly attached (no switches).:: -device cxl-type3,bus=root_port15,memdev=cxl-mem3,lsa=cxl-lsa3,id=cxl-pmem2 \ -device cxl-rp,port=1,bus=cxl.2,id=root_port16,chassis=0,slot=6 \ -device cxl-type3,bus=root_port16,memdev=cxl-mem4,lsa=cxl-lsa4,id=cxl-pmem3 \ - -cxl-fixed-memory-window targets.0=cxl.1,targets.1=cxl.2,size=4G,interleave-granularity=8k + -M cxl-fmw.0.targets.0=cxl.1,cxl-fmw.0.targets.1=cxl.2,cxl-fmw.0.size=4G,cxl-fmw.0.interleave-granularity=8k Kernel Configuration Options ---------------------------- diff --git a/hw/core/machine.c b/hw/core/machine.c index c53548d0b1..2e589d99e9 100644 --- a/hw/core/machine.c +++ b/hw/core/machine.c @@ -629,20 +629,6 @@ static void machine_set_nvdimm_persistence(Object *obj, const char *value, nvdimms_state->persistence_string = g_strdup(value); } -static bool machine_get_cxl(Object *obj, Error **errp) -{ - MachineState *ms = MACHINE(obj); - - return ms->cxl_devices_state->is_enabled; -} - -static void machine_set_cxl(Object *obj, bool value, Error **errp) -{ - MachineState *ms = MACHINE(obj); - - ms->cxl_devices_state->is_enabled = value; -} - void machine_class_allow_dynamic_sysbus_dev(MachineClass *mc, const char *type) { QAPI_LIST_PREPEND(mc->allowed_dynamic_sysbus_devices, g_strdup(type)); @@ -929,8 +915,6 @@ static void machine_class_init(ObjectClass *oc, void *data) mc->default_ram_size = 128 * MiB; mc->rom_file_has_mr = true; - /* Few machines support CXL, so default to off */ - mc->cxl_supported = false; /* numa node memory size aligned on 8MB by default. * On Linux, each node's border has to be 8MB aligned */ @@ -1092,13 +1076,7 @@ static void machine_initfn(Object *obj) } if (mc->cxl_supported) { - Object *obj = OBJECT(ms); - ms->cxl_devices_state = g_new0(CXLState, 1); - object_property_add_bool(obj, "cxl", machine_get_cxl, machine_set_cxl); - object_property_set_description(obj, "cxl", - "Set on/off to enable/disable " - "CXL instantiation"); } if (mc->cpu_index_to_instance_props && mc->get_default_cpu_node_id) { diff --git a/hw/cxl/cxl-host-stubs.c b/hw/cxl/cxl-host-stubs.c index 24465a52ab..de3e8894d5 100644 --- a/hw/cxl/cxl-host-stubs.c +++ b/hw/cxl/cxl-host-stubs.c @@ -6,11 +6,9 @@ #include "qemu/osdep.h" #include "qapi/error.h" #include "hw/cxl/cxl.h" - -void cxl_fixed_memory_window_config(MachineState *ms, - CXLFixedMemoryWindowOptions *object, - Error **errp) {}; +#include "hw/cxl/cxl_host.h" void cxl_fixed_memory_window_link_targets(Error **errp) {}; +void cxl_machine_init(Object *obj, CXLState *state) {}; const MemoryRegionOps cfmws_ops; diff --git a/hw/cxl/cxl-host.c b/hw/cxl/cxl-host.c index 469b3c4ced..3a79c32b42 100644 --- a/hw/cxl/cxl-host.c +++ b/hw/cxl/cxl-host.c @@ -15,14 +15,15 @@ #include "qapi/qapi-visit-machine.h" #include "hw/cxl/cxl.h" +#include "hw/cxl/cxl_host.h" #include "hw/pci/pci_bus.h" #include "hw/pci/pci_bridge.h" #include "hw/pci/pci_host.h" #include "hw/pci/pcie_port.h" -void cxl_fixed_memory_window_config(MachineState *ms, - CXLFixedMemoryWindowOptions *object, - Error **errp) +static void cxl_fixed_memory_window_config(CXLState *cxl_state, + CXLFixedMemoryWindowOptions *object, + Error **errp) { CXLFixedWindow *fw = g_malloc0(sizeof(*fw)); strList *target; @@ -62,8 +63,7 @@ void cxl_fixed_memory_window_config(MachineState *ms, fw->enc_int_gran = 0; } - ms->cxl_devices_state->fixed_windows = - g_list_append(ms->cxl_devices_state->fixed_windows, fw); + cxl_state->fixed_windows = g_list_append(cxl_state->fixed_windows, fw); return; } @@ -220,3 +220,65 @@ const MemoryRegionOps cfmws_ops = { .unaligned = true, }, }; + +static void machine_get_cxl(Object *obj, Visitor *v, const char *name, + void *opaque, Error **errp) +{ + CXLState *cxl_state = opaque; + bool value = cxl_state->is_enabled; + + visit_type_bool(v, name, &value, errp); +} + +static void machine_set_cxl(Object *obj, Visitor *v, const char *name, + void *opaque, Error **errp) +{ + CXLState *cxl_state = opaque; + bool value; + + if (!visit_type_bool(v, name, &value, errp)) { + return; + } + cxl_state->is_enabled = value; +} + +static void machine_get_cfmw(Object *obj, Visitor *v, const char *name, + void *opaque, Error **errp) +{ + CXLFixedMemoryWindowOptionsList **list = opaque; + + visit_type_CXLFixedMemoryWindowOptionsList(v, name, list, errp); +} + +static void machine_set_cfmw(Object *obj, Visitor *v, const char *name, + void *opaque, Error **errp) +{ + CXLState *state = opaque; + CXLFixedMemoryWindowOptionsList *cfmw_list = NULL; + CXLFixedMemoryWindowOptionsList *it; + + visit_type_CXLFixedMemoryWindowOptionsList(v, name, &cfmw_list, errp); + if (!cfmw_list) { + return; + } + + for (it = cfmw_list; it; it = it->next) { + cxl_fixed_memory_window_config(state, it->value, errp); + } + state->cfmw_list = cfmw_list; +} + +void cxl_machine_init(Object *obj, CXLState *state) +{ + object_property_add(obj, "cxl", "bool", machine_get_cxl, + machine_set_cxl, NULL, state); + object_property_set_description(obj, "cxl", + "Set on/off to enable/disable " + "CXL instantiation"); + + object_property_add(obj, "cxl-fmw", "CXLFixedMemoryWindow", + machine_get_cfmw, machine_set_cfmw, + NULL, state); + object_property_set_description(obj, "cxl-fmw", + "CXL Fixed Memory Windows (array)"); +} diff --git a/hw/i386/pc.c b/hw/i386/pc.c index 7c39c91335..98e63347f2 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -76,6 +76,7 @@ #include "hw/mem/pc-dimm.h" #include "hw/mem/nvdimm.h" #include "hw/cxl/cxl.h" +#include "hw/cxl/cxl_host.h" #include "qapi/error.h" #include "qapi/qapi-visit-common.h" #include "qapi/qapi-visit-machine.h" @@ -1682,6 +1683,7 @@ static void pc_machine_set_max_fw_size(Object *obj, Visitor *v, static void pc_machine_initfn(Object *obj) { PCMachineState *pcms = PC_MACHINE(obj); + MachineState *ms = MACHINE(obj); #ifdef CONFIG_VMPORT pcms->vmport = ON_OFF_AUTO_AUTO; @@ -1706,6 +1708,7 @@ static void pc_machine_initfn(Object *obj) pcms->pcspk = isa_new(TYPE_PC_SPEAKER); object_property_add_alias(OBJECT(pcms), "pcspk-audiodev", OBJECT(pcms->pcspk), "audiodev"); + cxl_machine_init(obj, ms->cxl_devices_state); } static void pc_machine_reset(MachineState *machine) diff --git a/hw/pci-bridge/pci_expander_bridge.c b/hw/pci-bridge/pci_expander_bridge.c index 69244decdb..02032360f5 100644 --- a/hw/pci-bridge/pci_expander_bridge.c +++ b/hw/pci-bridge/pci_expander_bridge.c @@ -468,7 +468,7 @@ static void pxb_cxl_dev_realize(PCIDevice *dev, Error **errp) error_setg(errp, "pxb-cxl devices cannot reside on a PCI bus"); return; } - if (!ms->cxl_devices_state->is_enabled) { + if (!ms->cxl_devices_state || !ms->cxl_devices_state->is_enabled) { error_setg(errp, "Machine does not have cxl=on"); return; } diff --git a/include/hw/boards.h b/include/hw/boards.h index fa57bac4fb..dd9fc56df2 100644 --- a/include/hw/boards.h +++ b/include/hw/boards.h @@ -362,6 +362,7 @@ struct MachineState { struct NVDIMMState *nvdimms_state; struct CXLState *cxl_devices_state; struct NumaState *numa_state; + CXLFixedMemoryWindowOptionsList *cfmws_list; }; #define DEFINE_MACHINE(namestr, machine_initfn) \ diff --git a/include/hw/cxl/cxl.h b/include/hw/cxl/cxl.h index 21d28ca110..84078a484d 100644 --- a/include/hw/cxl/cxl.h +++ b/include/hw/cxl/cxl.h @@ -12,6 +12,7 @@ #include "qapi/qapi-types-machine.h" +#include "qapi/qapi-visit-machine.h" #include "hw/pci/pci_bridge.h" #include "hw/pci/pci_host.h" #include "cxl_pci.h" @@ -40,6 +41,7 @@ typedef struct CXLState { MemoryRegion host_mr; unsigned int next_mr_idx; GList *fixed_windows; + CXLFixedMemoryWindowOptionsList *cfmw_list; } CXLState; struct CXLHost { @@ -51,11 +53,6 @@ struct CXLHost { #define TYPE_PXB_CXL_HOST "pxb-cxl-host" OBJECT_DECLARE_SIMPLE_TYPE(CXLHost, PXB_CXL_HOST) -void cxl_fixed_memory_window_config(MachineState *ms, - CXLFixedMemoryWindowOptions *object, - Error **errp); void cxl_fixed_memory_window_link_targets(Error **errp); -extern const MemoryRegionOps cfmws_ops; - #endif diff --git a/include/hw/cxl/cxl_host.h b/include/hw/cxl/cxl_host.h new file mode 100644 index 0000000000..87a6933de2 --- /dev/null +++ b/include/hw/cxl/cxl_host.h @@ -0,0 +1,21 @@ +/* + * QEMU CXL Host Setup + * + * Copyright (c) 2022 Huawei + * + * This work is licensed under the terms of the GNU GPL, version 2. See the + * COPYING file in the top-level directory. + */ + +#include "qemu/osdep.h" +#include "hw/cxl/cxl.h" +#include "hw/boards.h" + +#ifndef CXL_HOST_H +#define CXL_HOST_H + +void cxl_machine_init(Object *obj, CXLState *state); + +extern const MemoryRegionOps cfmws_ops; + +#endif diff --git a/qapi/machine.json b/qapi/machine.json index f750a16396..6afd1936b0 100644 --- a/qapi/machine.json +++ b/qapi/machine.json @@ -523,6 +523,19 @@ '*interleave-granularity': 'size', 'targets': ['str'] }} +## +# @CXLFMWProperties: +# +# List of CXL Fixed Memory Windows. +# +# @cxl-fmw: List of CXLFixedMemoryWindowOptions +# +# Since 7.1 +## +{ 'struct' : 'CXLFMWProperties', + 'data': { 'cxl-fmw': ['CXLFixedMemoryWindowOptions'] } +} + ## # @X86CPURegister32: # diff --git a/qemu-options.hx b/qemu-options.hx index 60cf188da4..377d22fbd8 100644 --- a/qemu-options.hx +++ b/qemu-options.hx @@ -36,7 +36,8 @@ DEF("machine", HAS_ARG, QEMU_OPTION_machine, \ " nvdimm=on|off controls NVDIMM support (default=off)\n" " memory-encryption=@var{} memory encryption object to use (default=none)\n" " hmat=on|off controls ACPI HMAT support (default=off)\n" - " memory-backend='backend-id' specifies explicitly provided backend for main RAM (default=none)\n", + " memory-backend='backend-id' specifies explicitly provided backend for main RAM (default=none)\n" + " cxl-fmw.0.targets.0=firsttarget,cxl-fmw.0.targets.1=secondtarget,cxl-fmw.0.size=size[,cxl-fmw.0.interleave-granularity=granularity]\n", QEMU_ARCH_ALL) SRST ``-machine [type=]name[,prop=value[,...]]`` @@ -124,6 +125,38 @@ SRST -object memory-backend-ram,id=pc.ram,size=512M,x-use-canonical-path-for-ramblock-id=off -machine memory-backend=pc.ram -m 512M + + ``cxl-fmw.0.targets.0=firsttarget,cxl-fmw.0.targets.1=secondtarget,cxl-fmw.0.size=size[,cxl-fmw.0.interleave-granularity=granularity]`` + Define a CXL Fixed Memory Window (CFMW). + + Described in the CXL 2.0 ECN: CEDT CFMWS & QTG _DSM. + + They are regions of Host Physical Addresses (HPA) on a system which + may be interleaved across one or more CXL host bridges. The system + software will assign particular devices into these windows and + configure the downstream Host-managed Device Memory (HDM) decoders + in root ports, switch ports and devices appropriately to meet the + interleave requirements before enabling the memory devices. + + ``targets.X=target`` provides the mapping to CXL host bridges + which may be identified by the id provied in the -device entry. + Multiple entries are needed to specify all the targets when + the fixed memory window represents interleaved memory. X is the + target index from 0. + + ``size=size`` sets the size of the CFMW. This must be a multiple of + 256MiB. The region will be aligned to 256MiB but the location is + platform and configuration dependent. + + ``interleave-granularity=granularity`` sets the granularity of + interleave. Default 256KiB. Only 256KiB, 512KiB, 1024KiB, 2048KiB + 4096KiB, 8192KiB and 16384KiB granularities supported. + + Example: + + :: + + -machine cxl-fmw.0.targets.0=cxl.0,cxl-fmw.0.targets.1=cxl.1,cxl-fmw.0.size=128G,cxl-fmw.0.interleave-granularity=512k ERST DEF("M", HAS_ARG, QEMU_OPTION_M, @@ -467,44 +500,6 @@ SRST -numa hmat-cache,node-id=1,size=10K,level=1,associativity=direct,policy=write-back,line=8 ERST -DEF("cxl-fixed-memory-window", HAS_ARG, QEMU_OPTION_cxl_fixed_memory_window, - "-cxl-fixed-memory-window targets.0=firsttarget,targets.1=secondtarget,size=size[,interleave-granularity=granularity]\n", - QEMU_ARCH_ALL) -SRST -``-cxl-fixed-memory-window targets.0=firsttarget,targets.1=secondtarget,size=size[,interleave-granularity=granularity]`` - Define a CXL Fixed Memory Window (CFMW). - - Described in the CXL 2.0 ECN: CEDT CFMWS & QTG _DSM. - - They are regions of Host Physical Addresses (HPA) on a system which - may be interleaved across one or more CXL host bridges. The system - software will assign particular devices into these windows and - configure the downstream Host-managed Device Memory (HDM) decoders - in root ports, switch ports and devices appropriately to meet the - interleave requirements before enabling the memory devices. - - ``targets.X=firsttarget`` provides the mapping to CXL host bridges - which may be identified by the id provied in the -device entry. - Multiple entries are needed to specify all the targets when - the fixed memory window represents interleaved memory. X is the - target index from 0. - - ``size=size`` sets the size of the CFMW. This must be a multiple of - 256MiB. The region will be aligned to 256MiB but the location is - platform and configuration dependent. - - ``interleave-granularity=granularity`` sets the granularity of - interleave. Default 256KiB. Only 256KiB, 512KiB, 1024KiB, 2048KiB - 4096KiB, 8192KiB and 16384KiB granularities supported. - - Example: - - :: - - -cxl-fixed-memory-window targets.0=cxl.0,targets.1=cxl.1,size=128G,interleave-granularity=512k - -ERST - DEF("add-fd", HAS_ARG, QEMU_OPTION_add_fd, "-add-fd fd=fd,set=set[,opaque=opaque]\n" " Add 'fd' to fd 'set'\n", QEMU_ARCH_ALL) diff --git a/softmmu/vl.c b/softmmu/vl.c index 4c1e94b00e..ff0ad9ab54 100644 --- a/softmmu/vl.c +++ b/softmmu/vl.c @@ -147,12 +147,6 @@ typedef struct BlockdevOptionsQueueEntry { typedef QSIMPLEQ_HEAD(, BlockdevOptionsQueueEntry) BlockdevOptionsQueue; -typedef struct CXLFMWOptionQueueEntry { - CXLFixedMemoryWindowOptions *opts; - Location loc; - QSIMPLEQ_ENTRY(CXLFMWOptionQueueEntry) entry; -} CXLFMWOptionQueueEntry; - typedef struct ObjectOption { ObjectOptions *opts; QTAILQ_ENTRY(ObjectOption) next; @@ -179,8 +173,6 @@ static int snapshot; static bool preconfig_requested; static QemuPluginList plugin_list = QTAILQ_HEAD_INITIALIZER(plugin_list); static BlockdevOptionsQueue bdo_queue = QSIMPLEQ_HEAD_INITIALIZER(bdo_queue); -static QSIMPLEQ_HEAD(, CXLFMWOptionQueueEntry) CXLFMW_opts = - QSIMPLEQ_HEAD_INITIALIZER(CXLFMW_opts); static bool nographic = false; static int mem_prealloc; /* force preallocation of physical target memory */ static const char *vga_model = NULL; @@ -1072,24 +1064,6 @@ static void parse_display(const char *p) } } -static void parse_cxl_fixed_memory_window(const char *optarg) -{ - CXLFMWOptionQueueEntry *cfmws_entry; - Visitor *v; - - v = qobject_input_visitor_new_str(optarg, "cxl-fixed-memory-window", - &error_fatal); - cfmws_entry = g_new(CXLFMWOptionQueueEntry, 1); - visit_type_CXLFixedMemoryWindowOptions(v, NULL, &cfmws_entry->opts, - &error_fatal); - if (!cfmws_entry->opts) { - exit(1); - } - visit_free(v); - loc_save(&cfmws_entry->loc); - QSIMPLEQ_INSERT_TAIL(&CXLFMW_opts, cfmws_entry, entry); -} - static inline bool nonempty_str(const char *str) { return str && *str; @@ -1948,20 +1922,6 @@ static void qemu_create_late_backends(void) qemu_semihosting_console_init(); } -static void cxl_set_opts(void) -{ - while (!QSIMPLEQ_EMPTY(&CXLFMW_opts)) { - CXLFMWOptionQueueEntry *cfmws_entry = QSIMPLEQ_FIRST(&CXLFMW_opts); - - loc_restore(&cfmws_entry->loc); - QSIMPLEQ_REMOVE_HEAD(&CXLFMW_opts, entry); - cxl_fixed_memory_window_config(current_machine, cfmws_entry->opts, - &error_fatal); - qapi_free_CXLFixedMemoryWindowOptions(cfmws_entry->opts); - g_free(cfmws_entry); - } -} - static void qemu_resolve_machine_memdev(void) { if (ram_memdev_id) { @@ -2789,9 +2749,6 @@ void qemu_init(int argc, char **argv, char **envp) exit(1); } break; - case QEMU_OPTION_cxl_fixed_memory_window: - parse_cxl_fixed_memory_window(optarg); - break; case QEMU_OPTION_display: parse_display(optarg); break; @@ -3598,7 +3555,6 @@ void qemu_init(int argc, char **argv, char **envp) qemu_resolve_machine_memdev(); parse_numa_opts(current_machine); - cxl_set_opts(); if (vmstate_dump_file) { /* dump and exit */ diff --git a/tests/qtest/bios-tables-test.c b/tests/qtest/bios-tables-test.c index 56498bbcc8..359916c228 100644 --- a/tests/qtest/bios-tables-test.c +++ b/tests/qtest/bios-tables-test.c @@ -1582,8 +1582,8 @@ static void test_acpi_q35_cxl(void) " -device cxl-type3,bus=rp3,memdev=cxl-mem3,lsa=lsa3" " -device cxl-rp,port=1,bus=cxl.2,id=rp4,chassis=0,slot=6" " -device cxl-type3,bus=rp4,memdev=cxl-mem4,lsa=lsa4" - " -cxl-fixed-memory-window targets.0=cxl.1,size=4G,interleave-granularity=8k" - " -cxl-fixed-memory-window targets.0=cxl.1,targets.1=cxl.2,size=4G,interleave-granularity=8k", + " -M cxl-fmw.0.targets.0=cxl.1,cxl-fmw.0.size=4G,cxl-fmw.0.interleave-granularity=8k," + "cxl-fmw.1.targets.0=cxl.1,cxl-fmw.1.targets.1=cxl.2,cxl-fmw.1.size=4G,cxl-fmw.1.interleave-granularity=8k", tmp_path, tmp_path, tmp_path, tmp_path, tmp_path, tmp_path, tmp_path, tmp_path); test_acpi_one(params, &data); diff --git a/tests/qtest/cxl-test.c b/tests/qtest/cxl-test.c index 079011af6a..2133e973f4 100644 --- a/tests/qtest/cxl-test.c +++ b/tests/qtest/cxl-test.c @@ -10,12 +10,12 @@ #define QEMU_PXB_CMD "-machine q35,cxl=on " \ "-device pxb-cxl,id=cxl.0,bus=pcie.0,bus_nr=52 " \ - "-cxl-fixed-memory-window targets.0=cxl.0,size=4G " + "-M cxl-fmw.0.targets.0=cxl.0,cxl-fmw.0.size=4G " #define QEMU_2PXB_CMD "-machine q35,cxl=on " \ "-device pxb-cxl,id=cxl.0,bus=pcie.0,bus_nr=52 " \ "-device pxb-cxl,id=cxl.1,bus=pcie.0,bus_nr=53 " \ - "-cxl-fixed-memory-window targets.0=cxl.0,targets.1=cxl.1,size=4G " + "-M cxl-fmw.0.targets.0=cxl.0,cxl-fmw.0.targets.1=cxl.1,cxl-fmw.0.size=4G " #define QEMU_RP "-device cxl-rp,id=rp0,bus=cxl.0,chassis=0,slot=0 " From 513598050ad12641b2dde6cf27471faca65be48f Mon Sep 17 00:00:00 2001 From: Jonathan Cameron Date: Wed, 8 Jun 2022 15:54:34 +0100 Subject: [PATCH 37/53] hw/acpi/cxl: Pass in the CXLState directly rather than MachineState Refactoring step on path to moving all CXL state out of MachineState. Signed-off-by: Jonathan Cameron Reviewed-by: Ben Widawsky Message-Id: <20220608145440.26106-3-Jonathan.Cameron@huawei.com> Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- hw/acpi/cxl.c | 9 ++++----- hw/i386/acpi-build.c | 4 ++-- include/hw/acpi/cxl.h | 5 +++-- 3 files changed, 9 insertions(+), 9 deletions(-) diff --git a/hw/acpi/cxl.c b/hw/acpi/cxl.c index 31d5235136..2bf8c07993 100644 --- a/hw/acpi/cxl.c +++ b/hw/acpi/cxl.c @@ -65,9 +65,8 @@ static void cedt_build_chbs(GArray *table_data, PXBDev *cxl) * Interleave ways encoding in CXL 2.0 ECN: 3, 6, 12 and 16-way memory * interleaving. */ -static void cedt_build_cfmws(GArray *table_data, MachineState *ms) +static void cedt_build_cfmws(GArray *table_data, CXLState *cxls) { - CXLState *cxls = ms->cxl_devices_state; GList *it; for (it = cxls->fixed_windows; it; it = it->next) { @@ -129,9 +128,9 @@ static int cxl_foreach_pxb_hb(Object *obj, void *opaque) return 0; } -void cxl_build_cedt(MachineState *ms, GArray *table_offsets, GArray *table_data, +void cxl_build_cedt(GArray *table_offsets, GArray *table_data, BIOSLinker *linker, const char *oem_id, - const char *oem_table_id) + const char *oem_table_id, CXLState *cxl_state) { Aml *cedt; AcpiTable table = { .sig = "CEDT", .rev = 1, .oem_id = oem_id, @@ -144,7 +143,7 @@ void cxl_build_cedt(MachineState *ms, GArray *table_offsets, GArray *table_data, /* reserve space for CEDT header */ object_child_foreach_recursive(object_get_root(), cxl_foreach_pxb_hb, cedt); - cedt_build_cfmws(cedt->buf, ms); + cedt_build_cfmws(cedt->buf, cxl_state); /* copy AML table into ACPI tables blob and patch header there */ g_array_append_vals(table_data, cedt->buf->data, cedt->buf->len); diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c index f41e14a469..663c34b9d1 100644 --- a/hw/i386/acpi-build.c +++ b/hw/i386/acpi-build.c @@ -2615,8 +2615,8 @@ void acpi_build(AcpiBuildTables *tables, MachineState *machine) x86ms->oem_id, x86ms->oem_table_id); } if (machine->cxl_devices_state->is_enabled) { - cxl_build_cedt(machine, table_offsets, tables_blob, tables->linker, - x86ms->oem_id, x86ms->oem_table_id); + cxl_build_cedt(table_offsets, tables_blob, tables->linker, + x86ms->oem_id, x86ms->oem_table_id, machine->cxl_devices_state); } acpi_add_table(table_offsets, tables_blob); diff --git a/include/hw/acpi/cxl.h b/include/hw/acpi/cxl.h index 0c496538c0..acf4418886 100644 --- a/include/hw/acpi/cxl.h +++ b/include/hw/acpi/cxl.h @@ -19,10 +19,11 @@ #define HW_ACPI_CXL_H #include "hw/acpi/bios-linker-loader.h" +#include "hw/cxl/cxl.h" -void cxl_build_cedt(MachineState *ms, GArray *table_offsets, GArray *table_data, +void cxl_build_cedt(GArray *table_offsets, GArray *table_data, BIOSLinker *linker, const char *oem_id, - const char *oem_table_id); + const char *oem_table_id, CXLState *cxl_state); void build_cxl_osc_method(Aml *dev); #endif From dab390ff2454134486c934c8f2677f3ed7c8463c Mon Sep 17 00:00:00 2001 From: Jonathan Cameron Date: Wed, 8 Jun 2022 15:54:35 +0100 Subject: [PATCH 38/53] hw/cxl: Push linking of CXL targets into i386/pc rather than in machine.c Whilst here take the oportunity to shorten the function name. Signed-off-by: Jonathan Cameron Reviewed-by: Ben Widawsky Message-Id: <20220608145440.26106-4-Jonathan.Cameron@huawei.com> Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- hw/cxl/cxl-host-stubs.c | 2 +- hw/cxl/cxl-host.c | 8 +++----- hw/i386/pc.c | 5 +++++ include/hw/cxl/cxl.h | 2 -- include/hw/cxl/cxl_host.h | 1 + softmmu/vl.c | 2 -- 6 files changed, 10 insertions(+), 10 deletions(-) diff --git a/hw/cxl/cxl-host-stubs.c b/hw/cxl/cxl-host-stubs.c index de3e8894d5..e0d5ec8ad5 100644 --- a/hw/cxl/cxl-host-stubs.c +++ b/hw/cxl/cxl-host-stubs.c @@ -8,7 +8,7 @@ #include "hw/cxl/cxl.h" #include "hw/cxl/cxl_host.h" -void cxl_fixed_memory_window_link_targets(Error **errp) {}; +void cxl_fmws_link_targets(CXLState *stat, Error **errp) {}; void cxl_machine_init(Object *obj, CXLState *state) {}; const MemoryRegionOps cfmws_ops; diff --git a/hw/cxl/cxl-host.c b/hw/cxl/cxl-host.c index 3a79c32b42..8e7738a65b 100644 --- a/hw/cxl/cxl-host.c +++ b/hw/cxl/cxl-host.c @@ -68,14 +68,12 @@ static void cxl_fixed_memory_window_config(CXLState *cxl_state, return; } -void cxl_fixed_memory_window_link_targets(Error **errp) +void cxl_fmws_link_targets(CXLState *cxl_state, Error **errp) { - MachineState *ms = MACHINE(qdev_get_machine()); - - if (ms->cxl_devices_state && ms->cxl_devices_state->fixed_windows) { + if (cxl_state && cxl_state->fixed_windows) { GList *it; - for (it = ms->cxl_devices_state->fixed_windows; it; it = it->next) { + for (it = cxl_state->fixed_windows; it; it = it->next) { CXLFixedWindow *fw = it->data; int i; diff --git a/hw/i386/pc.c b/hw/i386/pc.c index 98e63347f2..6cecd74d58 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -732,6 +732,11 @@ void pc_machine_done(Notifier *notifier, void *data) PCMachineState *pcms = container_of(notifier, PCMachineState, machine_done); X86MachineState *x86ms = X86_MACHINE(pcms); + MachineState *ms = MACHINE(pcms); + + if (ms->cxl_devices_state) { + cxl_fmws_link_targets(ms->cxl_devices_state, &error_fatal); + } /* set the number of CPUs */ x86_rtc_set_cpus_count(x86ms->rtc, x86ms->boot_cpus); diff --git a/include/hw/cxl/cxl.h b/include/hw/cxl/cxl.h index 84078a484d..134b295b40 100644 --- a/include/hw/cxl/cxl.h +++ b/include/hw/cxl/cxl.h @@ -53,6 +53,4 @@ struct CXLHost { #define TYPE_PXB_CXL_HOST "pxb-cxl-host" OBJECT_DECLARE_SIMPLE_TYPE(CXLHost, PXB_CXL_HOST) -void cxl_fixed_memory_window_link_targets(Error **errp); - #endif diff --git a/include/hw/cxl/cxl_host.h b/include/hw/cxl/cxl_host.h index 87a6933de2..4d642a81fa 100644 --- a/include/hw/cxl/cxl_host.h +++ b/include/hw/cxl/cxl_host.h @@ -15,6 +15,7 @@ #define CXL_HOST_H void cxl_machine_init(Object *obj, CXLState *state); +void cxl_fmws_link_targets(CXLState *stat, Error **errp); extern const MemoryRegionOps cfmws_ops; diff --git a/softmmu/vl.c b/softmmu/vl.c index ff0ad9ab54..54e920ada1 100644 --- a/softmmu/vl.c +++ b/softmmu/vl.c @@ -93,7 +93,6 @@ #include "qemu/config-file.h" #include "qemu/qemu-options.h" #include "qemu/main-loop.h" -#include "hw/cxl/cxl.h" #ifdef CONFIG_VIRTFS #include "fsdev/qemu-fsdev.h" #endif @@ -2568,7 +2567,6 @@ void qmp_x_exit_preconfig(Error **errp) qemu_init_board(); qemu_create_cli_devices(); - cxl_fixed_memory_window_link_targets(errp); qemu_machine_creation_done(); if (loadvm) { From 96f7da1711348758f9919ffdfe1e984012ef7acd Mon Sep 17 00:00:00 2001 From: Jonathan Cameron Date: Wed, 8 Jun 2022 15:54:36 +0100 Subject: [PATCH 39/53] tests/acpi: Allow modification of q35 CXL CEDT table. Needed to allow memory address changes as a result of next patch. Signed-off-by: Jonathan Cameron Reviewed-by: Ben Widawsky Message-Id: <20220608145440.26106-5-Jonathan.Cameron@huawei.com> Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- tests/qtest/bios-tables-test-allowed-diff.h | 1 + 1 file changed, 1 insertion(+) diff --git a/tests/qtest/bios-tables-test-allowed-diff.h b/tests/qtest/bios-tables-test-allowed-diff.h index dfb8523c8b..effa58b75b 100644 --- a/tests/qtest/bios-tables-test-allowed-diff.h +++ b/tests/qtest/bios-tables-test-allowed-diff.h @@ -1 +1,2 @@ /* List of comma-separated changed AML files to ignore */ +"tests/data/acpi/q35/CEDT.cxl", From 7bd1900b365b5e7ae498cf9c915867fcaa5296fc Mon Sep 17 00:00:00 2001 From: Jonathan Cameron Date: Wed, 8 Jun 2022 15:54:37 +0100 Subject: [PATCH 40/53] pci/pci_expander_bridge: For CXL HB delay the HB register memory region setup. As the CXLState will no long be accessible via MachineState at time of PXB_CXL realization, come back later from the machine specific code to fill in the missing memory region setup. Only at this stage is it possible to check if cxl=on, so that check is moved to this later point. Note that for multiple host bridges, the allocation order of the register spaces is changed. This will be reflected in ACPI CEDT. Stubs are added to handle case of CONFIG_PXB=n for machines that call these functions. The bus walking logic is common to all machines so add a utility function + stub to cxl-host*. Signed-off-by: Jonathan Cameron Reviewed-by: Ben Widawsky Message-Id: <20220608145440.26106-6-Jonathan.Cameron@huawei.com> Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- hw/cxl/cxl-host-stubs.c | 1 + hw/cxl/cxl-host.c | 20 +++++++++++++ hw/i386/pc.c | 3 ++ hw/pci-bridge/meson.build | 5 +++- hw/pci-bridge/pci_expander_bridge.c | 32 +++++++++++++-------- hw/pci-bridge/pci_expander_bridge_stubs.c | 14 +++++++++ include/hw/cxl/cxl_host.h | 1 + include/hw/pci-bridge/pci_expander_bridge.h | 12 ++++++++ 8 files changed, 75 insertions(+), 13 deletions(-) create mode 100644 hw/pci-bridge/pci_expander_bridge_stubs.c create mode 100644 include/hw/pci-bridge/pci_expander_bridge.h diff --git a/hw/cxl/cxl-host-stubs.c b/hw/cxl/cxl-host-stubs.c index e0d5ec8ad5..cae4afcdde 100644 --- a/hw/cxl/cxl-host-stubs.c +++ b/hw/cxl/cxl-host-stubs.c @@ -10,5 +10,6 @@ void cxl_fmws_link_targets(CXLState *stat, Error **errp) {}; void cxl_machine_init(Object *obj, CXLState *state) {}; +void cxl_hook_up_pxb_registers(PCIBus *bus, CXLState *state, Error **errp) {}; const MemoryRegionOps cfmws_ops; diff --git a/hw/cxl/cxl-host.c b/hw/cxl/cxl-host.c index 8e7738a65b..efa14908d8 100644 --- a/hw/cxl/cxl-host.c +++ b/hw/cxl/cxl-host.c @@ -20,6 +20,7 @@ #include "hw/pci/pci_bridge.h" #include "hw/pci/pci_host.h" #include "hw/pci/pcie_port.h" +#include "hw/pci-bridge/pci_expander_bridge.h" static void cxl_fixed_memory_window_config(CXLState *cxl_state, CXLFixedMemoryWindowOptions *object, @@ -280,3 +281,22 @@ void cxl_machine_init(Object *obj, CXLState *state) object_property_set_description(obj, "cxl-fmw", "CXL Fixed Memory Windows (array)"); } + +void cxl_hook_up_pxb_registers(PCIBus *bus, CXLState *state, Error **errp) +{ + /* Walk the pci busses looking for pxb busses to hook up */ + if (bus) { + QLIST_FOREACH(bus, &bus->child, sibling) { + if (!pci_bus_is_root(bus)) { + continue; + } + if (pci_bus_is_cxl(bus)) { + if (!state->is_enabled) { + error_setg(errp, "CXL host bridges present, but cxl=off"); + return; + } + pxb_cxl_hook_up_registers(state, bus, errp); + } + } + } +} diff --git a/hw/i386/pc.c b/hw/i386/pc.c index 6cecd74d58..9f48d02739 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -37,6 +37,7 @@ #include "hw/ide.h" #include "hw/pci/pci.h" #include "hw/pci/pci_bus.h" +#include "hw/pci-bridge/pci_expander_bridge.h" #include "hw/nvram/fw_cfg.h" #include "hw/timer/hpet.h" #include "hw/firmware/smbios.h" @@ -735,6 +736,8 @@ void pc_machine_done(Notifier *notifier, void *data) MachineState *ms = MACHINE(pcms); if (ms->cxl_devices_state) { + cxl_hook_up_pxb_registers(pcms->bus, ms->cxl_devices_state, + &error_fatal); cxl_fmws_link_targets(ms->cxl_devices_state, &error_fatal); } diff --git a/hw/pci-bridge/meson.build b/hw/pci-bridge/meson.build index b6d26a03d5..fdbe2e07c5 100644 --- a/hw/pci-bridge/meson.build +++ b/hw/pci-bridge/meson.build @@ -3,7 +3,8 @@ pci_ss.add(files('pci_bridge_dev.c')) pci_ss.add(when: 'CONFIG_I82801B11', if_true: files('i82801b11.c')) pci_ss.add(when: 'CONFIG_IOH3420', if_true: files('ioh3420.c')) pci_ss.add(when: 'CONFIG_PCIE_PORT', if_true: files('pcie_root_port.c', 'gen_pcie_root_port.c', 'pcie_pci_bridge.c')) -pci_ss.add(when: 'CONFIG_PXB', if_true: files('pci_expander_bridge.c')) +pci_ss.add(when: 'CONFIG_PXB', if_true: files('pci_expander_bridge.c'), + if_false: files('pci_expander_bridge_stubs.c')) pci_ss.add(when: 'CONFIG_XIO3130', if_true: files('xio3130_upstream.c', 'xio3130_downstream.c')) pci_ss.add(when: 'CONFIG_CXL', if_true: files('cxl_root_port.c')) @@ -13,3 +14,5 @@ pci_ss.add(when: 'CONFIG_DEC_PCI', if_true: files('dec.c')) pci_ss.add(when: 'CONFIG_SIMBA', if_true: files('simba.c')) softmmu_ss.add_all(when: 'CONFIG_PCI', if_true: pci_ss) + +softmmu_ss.add(when: 'CONFIG_ALL', if_true: files('pci_expander_bridge_stubs.c')) diff --git a/hw/pci-bridge/pci_expander_bridge.c b/hw/pci-bridge/pci_expander_bridge.c index 02032360f5..c9e817aa58 100644 --- a/hw/pci-bridge/pci_expander_bridge.c +++ b/hw/pci-bridge/pci_expander_bridge.c @@ -17,6 +17,7 @@ #include "hw/pci/pci_host.h" #include "hw/qdev-properties.h" #include "hw/pci/pci_bridge.h" +#include "hw/pci-bridge/pci_expander_bridge.h" #include "hw/cxl/cxl.h" #include "qemu/range.h" #include "qemu/error-report.h" @@ -186,25 +187,38 @@ static const TypeInfo pxb_host_info = { static void pxb_cxl_realize(DeviceState *dev, Error **errp) { - MachineState *ms = MACHINE(qdev_get_machine()); SysBusDevice *sbd = SYS_BUS_DEVICE(dev); CXLHost *cxl = PXB_CXL_HOST(dev); CXLComponentState *cxl_cstate = &cxl->cxl_cstate; struct MemoryRegion *mr = &cxl_cstate->crb.component_registers; - hwaddr offset; cxl_component_register_block_init(OBJECT(dev), cxl_cstate, TYPE_PXB_CXL_HOST); sysbus_init_mmio(sbd, mr); +} - offset = memory_region_size(mr) * ms->cxl_devices_state->next_mr_idx; - if (offset > memory_region_size(&ms->cxl_devices_state->host_mr)) { +/* + * Host bridge realization has no means of knowning state associated + * with a particular machine. As such, it is nececssary to delay + * final setup of the host bridge register space until later in the + * machine bring up. + */ +void pxb_cxl_hook_up_registers(CXLState *cxl_state, PCIBus *bus, Error **errp) +{ + PXBDev *pxb = PXB_CXL_DEV(pci_bridge_get_device(bus)); + CXLHost *cxl = pxb->cxl.cxl_host_bridge; + CXLComponentState *cxl_cstate = &cxl->cxl_cstate; + struct MemoryRegion *mr = &cxl_cstate->crb.component_registers; + hwaddr offset; + + offset = memory_region_size(mr) * cxl_state->next_mr_idx; + if (offset > memory_region_size(&cxl_state->host_mr)) { error_setg(errp, "Insufficient space for pxb cxl host register space"); return; } - memory_region_add_subregion(&ms->cxl_devices_state->host_mr, offset, mr); - ms->cxl_devices_state->next_mr_idx++; + memory_region_add_subregion(&cxl_state->host_mr, offset, mr); + cxl_state->next_mr_idx++; } static void pxb_cxl_host_class_init(ObjectClass *class, void *data) @@ -461,17 +475,11 @@ static const TypeInfo pxb_pcie_dev_info = { static void pxb_cxl_dev_realize(PCIDevice *dev, Error **errp) { - MachineState *ms = MACHINE(qdev_get_machine()); - /* A CXL PXB's parent bus is still PCIe */ if (!pci_bus_is_express(pci_get_bus(dev))) { error_setg(errp, "pxb-cxl devices cannot reside on a PCI bus"); return; } - if (!ms->cxl_devices_state || !ms->cxl_devices_state->is_enabled) { - error_setg(errp, "Machine does not have cxl=on"); - return; - } pxb_dev_realize_common(dev, CXL, errp); pxb_dev_reset(DEVICE(dev)); diff --git a/hw/pci-bridge/pci_expander_bridge_stubs.c b/hw/pci-bridge/pci_expander_bridge_stubs.c new file mode 100644 index 0000000000..b35180311f --- /dev/null +++ b/hw/pci-bridge/pci_expander_bridge_stubs.c @@ -0,0 +1,14 @@ +/* + * SPDX-License-Identifier: GPL-2.0-or-later + * + * Stubs for calls made from machines to handle the case where CONFIG_PXB + * is not enabled. + */ +#include "qemu/osdep.h" +#include "qapi/error.h" +#include "hw/pci/pci.h" +#include "hw/pci/pci_bus.h" +#include "hw/pci-bridge/pci_expander_bridge.h" +#include "hw/cxl/cxl.h" + +void pxb_cxl_hook_up_registers(CXLState *state, PCIBus *bus, Error **errp) {}; diff --git a/include/hw/cxl/cxl_host.h b/include/hw/cxl/cxl_host.h index 4d642a81fa..a1b662ce40 100644 --- a/include/hw/cxl/cxl_host.h +++ b/include/hw/cxl/cxl_host.h @@ -16,6 +16,7 @@ void cxl_machine_init(Object *obj, CXLState *state); void cxl_fmws_link_targets(CXLState *stat, Error **errp); +void cxl_hook_up_pxb_registers(PCIBus *bus, CXLState *state, Error **errp); extern const MemoryRegionOps cfmws_ops; diff --git a/include/hw/pci-bridge/pci_expander_bridge.h b/include/hw/pci-bridge/pci_expander_bridge.h new file mode 100644 index 0000000000..0b3856d615 --- /dev/null +++ b/include/hw/pci-bridge/pci_expander_bridge.h @@ -0,0 +1,12 @@ +/* + * SPDX-License-Identifier: GPL-2.0-or-later + */ + +#ifndef PCI_EXPANDER_BRIDGE_H +#define PCI_EXPANDER_BRIDGE_H + +#include "hw/cxl/cxl.h" + +void pxb_cxl_hook_up_registers(CXLState *state, PCIBus *bus, Error **errp); + +#endif /* PCI_EXPANDER_BRIDGE_H */ From 3546b0529a5799d1a13397fa3586711b3da52190 Mon Sep 17 00:00:00 2001 From: Jonathan Cameron Date: Wed, 8 Jun 2022 15:54:38 +0100 Subject: [PATCH 41/53] tests/acpi: Update q35/CEDT.cxl for new memory addresses. The CEDT table includes addreses of host bridge registers. There are allocated in a different order due to the previous patch, so update to the table is needed. Signed-off-by: Jonathan Cameron Reviewed-by: Ben Widawsky Message-Id: <20220608145440.26106-7-Jonathan.Cameron@huawei.com> Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- tests/data/acpi/q35/CEDT.cxl | Bin 184 -> 184 bytes tests/qtest/bios-tables-test-allowed-diff.h | 1 - 2 files changed, 1 deletion(-) diff --git a/tests/data/acpi/q35/CEDT.cxl b/tests/data/acpi/q35/CEDT.cxl index b8fa06b00e65712e91e0a5ea0d9277e0146d1c00..ff8203af070241bd23dd0eb8a51460692bb7d229 100644 GIT binary patch delta 18 acmdnNxPx(m*~Boui7rAD&G;s!ga80Nd Date: Wed, 8 Jun 2022 15:54:39 +0100 Subject: [PATCH 42/53] hw/cxl: Move the CXLState from MachineState to machine type specific state. This removes the last of the CXL code from the MachineState where it is visible to all Machines to only those that support CXL (currently i386/pc) As i386/pc always support CXL now, stop allocating the state independently. Note the pxb register hookup code runs even if cxl=off in order to detect pxb_cxl host bridges and fail to start if any are present as they won't have the control registers available. Signed-off-by: Jonathan Cameron Reviewed-by: Ben Widawsky Message-Id: <20220608145440.26106-8-Jonathan.Cameron@huawei.com> Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- hw/core/machine.c | 6 ------ hw/i386/acpi-build.c | 6 +++--- hw/i386/pc.c | 33 ++++++++++++++++----------------- include/hw/boards.h | 1 - include/hw/i386/pc.h | 2 ++ 5 files changed, 21 insertions(+), 27 deletions(-) diff --git a/hw/core/machine.c b/hw/core/machine.c index 2e589d99e9..a673302cce 100644 --- a/hw/core/machine.c +++ b/hw/core/machine.c @@ -33,7 +33,6 @@ #include "sysemu/qtest.h" #include "hw/pci/pci.h" #include "hw/mem/nvdimm.h" -#include "hw/cxl/cxl.h" #include "migration/global_state.h" #include "migration/vmstate.h" #include "exec/confidential-guest-support.h" @@ -1075,10 +1074,6 @@ static void machine_initfn(Object *obj) "Valid values are cpu, mem-ctrl"); } - if (mc->cxl_supported) { - ms->cxl_devices_state = g_new0(CXLState, 1); - } - if (mc->cpu_index_to_instance_props && mc->get_default_cpu_node_id) { ms->numa_state = g_new0(NumaState, 1); object_property_add_bool(obj, "hmat", @@ -1116,7 +1111,6 @@ static void machine_finalize(Object *obj) g_free(ms->device_memory); g_free(ms->nvdimms_state); g_free(ms->numa_state); - g_free(ms->cxl_devices_state); } bool machine_usb(MachineState *machine) diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c index 663c34b9d1..73d0bf5937 100644 --- a/hw/i386/acpi-build.c +++ b/hw/i386/acpi-build.c @@ -1631,7 +1631,7 @@ build_dsdt(GArray *table_data, BIOSLinker *linker, /* Handle the ranges for the PXB expanders */ if (pci_bus_is_cxl(bus)) { - MemoryRegion *mr = &machine->cxl_devices_state->host_mr; + MemoryRegion *mr = &pcms->cxl_devices_state.host_mr; uint64_t base = mr->addr; cxl_present = true; @@ -2614,9 +2614,9 @@ void acpi_build(AcpiBuildTables *tables, MachineState *machine) machine->nvdimms_state, machine->ram_slots, x86ms->oem_id, x86ms->oem_table_id); } - if (machine->cxl_devices_state->is_enabled) { + if (pcms->cxl_devices_state.is_enabled) { cxl_build_cedt(table_offsets, tables_blob, tables->linker, - x86ms->oem_id, x86ms->oem_table_id, machine->cxl_devices_state); + x86ms->oem_id, x86ms->oem_table_id, &pcms->cxl_devices_state); } acpi_add_table(table_offsets, tables_blob); diff --git a/hw/i386/pc.c b/hw/i386/pc.c index 9f48d02739..a0c0d69698 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -733,12 +733,12 @@ void pc_machine_done(Notifier *notifier, void *data) PCMachineState *pcms = container_of(notifier, PCMachineState, machine_done); X86MachineState *x86ms = X86_MACHINE(pcms); - MachineState *ms = MACHINE(pcms); - if (ms->cxl_devices_state) { - cxl_hook_up_pxb_registers(pcms->bus, ms->cxl_devices_state, - &error_fatal); - cxl_fmws_link_targets(ms->cxl_devices_state, &error_fatal); + cxl_hook_up_pxb_registers(pcms->bus, &pcms->cxl_devices_state, + &error_fatal); + + if (pcms->cxl_devices_state.is_enabled) { + cxl_fmws_link_targets(&pcms->cxl_devices_state, &error_fatal); } /* set the number of CPUs */ @@ -908,8 +908,8 @@ void pc_memory_init(PCMachineState *pcms, &machine->device_memory->mr); } - if (machine->cxl_devices_state->is_enabled) { - MemoryRegion *mr = &machine->cxl_devices_state->host_mr; + if (pcms->cxl_devices_state.is_enabled) { + MemoryRegion *mr = &pcms->cxl_devices_state.host_mr; hwaddr cxl_size = MiB; if (pcmc->has_reserved_memory && machine->device_memory->base) { @@ -927,12 +927,12 @@ void pc_memory_init(PCMachineState *pcms, memory_region_init(mr, OBJECT(machine), "cxl_host_reg", cxl_size); memory_region_add_subregion(system_memory, cxl_base, mr); cxl_resv_end = cxl_base + cxl_size; - if (machine->cxl_devices_state->fixed_windows) { + if (pcms->cxl_devices_state.fixed_windows) { hwaddr cxl_fmw_base; GList *it; cxl_fmw_base = ROUND_UP(cxl_base + cxl_size, 256 * MiB); - for (it = machine->cxl_devices_state->fixed_windows; it; it = it->next) { + for (it = pcms->cxl_devices_state.fixed_windows; it; it = it->next) { CXLFixedWindow *fw = it->data; fw->base = cxl_fmw_base; @@ -974,7 +974,7 @@ void pc_memory_init(PCMachineState *pcms, res_mem_end += memory_region_size(&machine->device_memory->mr); } - if (machine->cxl_devices_state->is_enabled) { + if (pcms->cxl_devices_state.is_enabled) { res_mem_end = cxl_resv_end; } *val = cpu_to_le64(ROUND_UP(res_mem_end, 1 * GiB)); @@ -1010,12 +1010,12 @@ uint64_t pc_pci_hole64_start(void) X86MachineState *x86ms = X86_MACHINE(pcms); uint64_t hole64_start = 0; - if (ms->cxl_devices_state->host_mr.addr) { - hole64_start = ms->cxl_devices_state->host_mr.addr + - memory_region_size(&ms->cxl_devices_state->host_mr); - if (ms->cxl_devices_state->fixed_windows) { + if (pcms->cxl_devices_state.host_mr.addr) { + hole64_start = pcms->cxl_devices_state.host_mr.addr + + memory_region_size(&pcms->cxl_devices_state.host_mr); + if (pcms->cxl_devices_state.fixed_windows) { GList *it; - for (it = ms->cxl_devices_state->fixed_windows; it; it = it->next) { + for (it = pcms->cxl_devices_state.fixed_windows; it; it = it->next) { CXLFixedWindow *fw = it->data; hole64_start = fw->mr.addr + memory_region_size(&fw->mr); } @@ -1691,7 +1691,6 @@ static void pc_machine_set_max_fw_size(Object *obj, Visitor *v, static void pc_machine_initfn(Object *obj) { PCMachineState *pcms = PC_MACHINE(obj); - MachineState *ms = MACHINE(obj); #ifdef CONFIG_VMPORT pcms->vmport = ON_OFF_AUTO_AUTO; @@ -1716,7 +1715,7 @@ static void pc_machine_initfn(Object *obj) pcms->pcspk = isa_new(TYPE_PC_SPEAKER); object_property_add_alias(OBJECT(pcms), "pcspk-audiodev", OBJECT(pcms->pcspk), "audiodev"); - cxl_machine_init(obj, ms->cxl_devices_state); + cxl_machine_init(obj, &pcms->cxl_devices_state); } static void pc_machine_reset(MachineState *machine) diff --git a/include/hw/boards.h b/include/hw/boards.h index dd9fc56df2..031f5f884d 100644 --- a/include/hw/boards.h +++ b/include/hw/boards.h @@ -360,7 +360,6 @@ struct MachineState { CPUArchIdList *possible_cpus; CpuTopology smp; struct NVDIMMState *nvdimms_state; - struct CXLState *cxl_devices_state; struct NumaState *numa_state; CXLFixedMemoryWindowOptionsList *cfmws_list; }; diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h index dee38cfac4..003a86b721 100644 --- a/include/hw/i386/pc.h +++ b/include/hw/i386/pc.h @@ -14,6 +14,7 @@ #include "qom/object.h" #include "hw/i386/sgx-epc.h" #include "hw/firmware/smbios.h" +#include "hw/cxl/cxl.h" #define HPET_INTCAP "hpet-intcap" @@ -55,6 +56,7 @@ typedef struct PCMachineState { hwaddr memhp_io_base; SGXEPCState sgx_epc; + CXLState cxl_devices_state; } PCMachineState; #define PC_MACHINE_ACPI_DEVICE_PROP "acpi-device" From 518f5f6ad6edfb17a35cc13368c4c5205fe75839 Mon Sep 17 00:00:00 2001 From: Jonathan Cameron Date: Wed, 8 Jun 2022 15:54:40 +0100 Subject: [PATCH 43/53] hw/machine: Drop cxl_supported flag as no longer useful As all the CXL elements have moved to boards that support CXL, there is no need to maintain a top level flag. Signed-off-by: Jonathan Cameron Reviewed-by: Ben Widawsky Message-Id: <20220608145440.26106-9-Jonathan.Cameron@huawei.com> Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- hw/i386/pc.c | 1 - include/hw/boards.h | 1 - 2 files changed, 2 deletions(-) diff --git a/hw/i386/pc.c b/hw/i386/pc.c index a0c0d69698..1b6067ff22 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -1804,7 +1804,6 @@ static void pc_machine_class_init(ObjectClass *oc, void *data) mc->default_cpu_type = TARGET_DEFAULT_CPU_TYPE; mc->nvdimm_supported = true; mc->smp_props.dies_supported = true; - mc->cxl_supported = true; mc->default_ram_id = "pc.ram"; object_class_property_add(oc, PC_MACHINE_MAX_RAM_BELOW_4G, "size", diff --git a/include/hw/boards.h b/include/hw/boards.h index 031f5f884d..d94edcef28 100644 --- a/include/hw/boards.h +++ b/include/hw/boards.h @@ -269,7 +269,6 @@ struct MachineClass { bool ignore_boot_device_suffixes; bool smbus_no_migration_support; bool nvdimm_supported; - bool cxl_supported; bool numa_mem_supported; bool auto_enable_numa; SMPCompatProps smp_props; From 36f18c6989a3d1ff1d7a0e50b0868ef3958299b4 Mon Sep 17 00:00:00 2001 From: Claudio Fontana Date: Tue, 31 May 2022 13:47:07 +0200 Subject: [PATCH 44/53] pci: fix overflow in snprintf string formatting MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit the code in pcibus_get_fw_dev_path contained the potential for a stack buffer overflow of 1 byte, potentially writing to the stack an extra NUL byte. This overflow could happen if the PCI slot is >= 0x10000000, and the PCI function is >= 0x10000000, due to the size parameter of snprintf being incorrectly calculated in the call: if (PCI_FUNC(d->devfn)) snprintf(path + off, sizeof(path) + off, ",%x", PCI_FUNC(d->devfn)); since the off obtained from a previous call to snprintf is added instead of subtracted from the total available size of the buffer. Without the accurate size guard from snprintf, we end up writing in the worst case: name (32) + "@" (1) + SLOT (8) + "," (1) + FUNC (8) + term NUL (1) = 51 bytes In order to provide something more robust, replace all of the code in pcibus_get_fw_dev_path with a single call to g_strdup_printf, so there is no need to rely on manual calculations. Found by compiling QEMU with FORTIFY_SOURCE=3 as the error: *** buffer overflow detected ***: terminated Thread 1 "qemu-system-x86" received signal SIGABRT, Aborted. [Switching to Thread 0x7ffff642c380 (LWP 121307)] 0x00007ffff71ff55c in __pthread_kill_implementation () from /lib64/libc.so.6 (gdb) bt #0 0x00007ffff71ff55c in __pthread_kill_implementation () at /lib64/libc.so.6 #1 0x00007ffff71ac6f6 in raise () at /lib64/libc.so.6 #2 0x00007ffff7195814 in abort () at /lib64/libc.so.6 #3 0x00007ffff71f279e in __libc_message () at /lib64/libc.so.6 #4 0x00007ffff729767a in __fortify_fail () at /lib64/libc.so.6 #5 0x00007ffff7295c36 in () at /lib64/libc.so.6 #6 0x00007ffff72957f5 in __snprintf_chk () at /lib64/libc.so.6 #7 0x0000555555b1c1fd in pcibus_get_fw_dev_path () #8 0x0000555555f2bde4 in qdev_get_fw_dev_path_helper.constprop () #9 0x0000555555f2bd86 in qdev_get_fw_dev_path_helper.constprop () #10 0x00005555559a6e5d in get_boot_device_path () #11 0x00005555559a712c in get_boot_devices_list () #12 0x0000555555b1a3d0 in fw_cfg_machine_reset () #13 0x0000555555bf4c2d in pc_machine_reset () #14 0x0000555555c66988 in qemu_system_reset () #15 0x0000555555a6dff6 in qdev_machine_creation_done () #16 0x0000555555c79186 in qmp_x_exit_preconfig.part () #17 0x0000555555c7b459 in qemu_init () #18 0x0000555555960a29 in main () Found-by: Dario Faggioli Found-by: Martin Liška Cc: qemu-stable@nongnu.org Signed-off-by: Claudio Fontana Message-Id: <20220531114707.18830-1-cfontana@suse.de> Reviewed-by: Ani Sinha --- hw/pci/pci.c | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/hw/pci/pci.c b/hw/pci/pci.c index a9b37f8000..6e7015329c 100644 --- a/hw/pci/pci.c +++ b/hw/pci/pci.c @@ -2640,15 +2640,15 @@ static char *pci_dev_fw_name(DeviceState *dev, char *buf, int len) static char *pcibus_get_fw_dev_path(DeviceState *dev) { PCIDevice *d = (PCIDevice *)dev; - char path[50], name[33]; - int off; + char name[33]; + int has_func = !!PCI_FUNC(d->devfn); - off = snprintf(path, sizeof(path), "%s@%x", - pci_dev_fw_name(dev, name, sizeof name), - PCI_SLOT(d->devfn)); - if (PCI_FUNC(d->devfn)) - snprintf(path + off, sizeof(path) + off, ",%x", PCI_FUNC(d->devfn)); - return g_strdup(path); + return g_strdup_printf("%s@%x%s%.*x", + pci_dev_fw_name(dev, name, sizeof(name)), + PCI_SLOT(d->devfn), + has_func ? "," : "", + has_func, + PCI_FUNC(d->devfn)); } static char *pcibus_get_dev_path(DeviceState *dev) From f824f5294711ffc17c642dff3d898043d420d336 Mon Sep 17 00:00:00 2001 From: Jonathan Cameron Date: Wed, 8 Jun 2022 14:08:04 +0100 Subject: [PATCH 45/53] hw/cxl: Fix missing write mask for HDM decoder target list registers Without being able to write these registers, no interleaving is possible. More refined checks of HDM register state on commit to follow. Signed-off-by: Jonathan Cameron Reviewed-by: Ben Widawsky Message-Id: <20220608130804.25795-1-Jonathan.Cameron@huawei.com> Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- hw/cxl/cxl-component-utils.c | 13 +++++++++++-- 1 file changed, 11 insertions(+), 2 deletions(-) diff --git a/hw/cxl/cxl-component-utils.c b/hw/cxl/cxl-component-utils.c index 7985c9bfca..3edd303a33 100644 --- a/hw/cxl/cxl-component-utils.c +++ b/hw/cxl/cxl-component-utils.c @@ -154,7 +154,8 @@ static void ras_init_common(uint32_t *reg_state, uint32_t *write_msk) reg_state[R_CXL_RAS_ERR_CAP_CTRL] = 0x00; } -static void hdm_init_common(uint32_t *reg_state, uint32_t *write_msk) +static void hdm_init_common(uint32_t *reg_state, uint32_t *write_msk, + enum reg_type type) { int decoder_count = 1; int i; @@ -174,6 +175,14 @@ static void hdm_init_common(uint32_t *reg_state, uint32_t *write_msk) write_msk[R_CXL_HDM_DECODER0_SIZE_LO + i * 0x20] = 0xf0000000; write_msk[R_CXL_HDM_DECODER0_SIZE_HI + i * 0x20] = 0xffffffff; write_msk[R_CXL_HDM_DECODER0_CTRL + i * 0x20] = 0x13ff; + if (type == CXL2_DEVICE || + type == CXL2_TYPE3_DEVICE || + type == CXL2_LOGICAL_DEVICE) { + write_msk[R_CXL_HDM_DECODER0_TARGET_LIST_LO + i * 0x20] = 0xf0000000; + } else { + write_msk[R_CXL_HDM_DECODER0_TARGET_LIST_LO + i * 0x20] = 0xffffffff; + } + write_msk[R_CXL_HDM_DECODER0_TARGET_LIST_HI + i * 0x20] = 0xffffffff; } } @@ -239,7 +248,7 @@ void cxl_component_register_init_common(uint32_t *reg_state, uint32_t *write_msk } init_cap_reg(HDM, 5, 1); - hdm_init_common(reg_state, write_msk); + hdm_init_common(reg_state, write_msk, type); if (caps < 5) { return; From 6164a1110448d4e2e13963b69093950acdd2348c Mon Sep 17 00:00:00 2001 From: Mark Cave-Ayland Date: Wed, 25 May 2022 18:32:27 +0100 Subject: [PATCH 46/53] hw/acpi/viot: rename build_pci_range_node() to enumerate_pci_host_bridges() MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This is in preparation for separating out the VIOT ACPI table build from the PCI host bridge numeration. Signed-off-by: Mark Cave-Ayland Reviewed-by: Ani Sinha Reviewed-by: Philippe Mathieu-Daudé Message-Id: <20220525173232.31429-2-mark.cave-ayland@ilande.co.uk> Reviewed-by: Jean-Philippe Brucker Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- hw/acpi/viot.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/hw/acpi/viot.c b/hw/acpi/viot.c index c1af75206e..a41daded71 100644 --- a/hw/acpi/viot.c +++ b/hw/acpi/viot.c @@ -17,7 +17,7 @@ struct viot_pci_ranges { }; /* Build PCI range for a given PCI host bridge */ -static int build_pci_range_node(Object *obj, void *opaque) +static int enumerate_pci_host_bridges(Object *obj, void *opaque) { struct viot_pci_ranges *pci_ranges = opaque; GArray *blob = pci_ranges->blob; @@ -78,7 +78,7 @@ void build_viot(MachineState *ms, GArray *table_data, BIOSLinker *linker, }; /* Build the list of PCI ranges that this viommu manages */ - object_child_foreach_recursive(OBJECT(ms), build_pci_range_node, + object_child_foreach_recursive(OBJECT(ms), enumerate_pci_host_bridges, &pci_ranges); /* ACPI table header */ From 1b805ab560d3c020377680742ae2a49c7eb417d0 Mon Sep 17 00:00:00 2001 From: Mark Cave-Ayland Date: Wed, 25 May 2022 18:32:28 +0100 Subject: [PATCH 47/53] hw/acpi/viot: move the individual PCI host bridge entry generation to a new function MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Instead of generating each table entry inline, move the individual PCI host bridge table entry generation to a separate build_pci_host_range() function. Signed-off-by: Mark Cave-Ayland Reviewed-by: Ani Sinha Reviewed-by: Philippe Mathieu-Daudé Message-Id: <20220525173232.31429-3-mark.cave-ayland@ilande.co.uk> Reviewed-by: Jean-Philippe Brucker Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- hw/acpi/viot.c | 48 +++++++++++++++++++++++++++--------------------- 1 file changed, 27 insertions(+), 21 deletions(-) diff --git a/hw/acpi/viot.c b/hw/acpi/viot.c index a41daded71..5dafcbf5ef 100644 --- a/hw/acpi/viot.c +++ b/hw/acpi/viot.c @@ -16,6 +16,31 @@ struct viot_pci_ranges { uint16_t output_node; }; +static void build_pci_host_range(GArray *table_data, int min_bus, int max_bus, + uint16_t output_node) +{ + /* Type */ + build_append_int_noprefix(table_data, 1 /* PCI range */, 1); + /* Reserved */ + build_append_int_noprefix(table_data, 0, 1); + /* Length */ + build_append_int_noprefix(table_data, 24, 2); + /* Endpoint start */ + build_append_int_noprefix(table_data, PCI_BUILD_BDF(min_bus, 0), 4); + /* PCI Segment start */ + build_append_int_noprefix(table_data, 0, 2); + /* PCI Segment end */ + build_append_int_noprefix(table_data, 0, 2); + /* PCI BDF start */ + build_append_int_noprefix(table_data, PCI_BUILD_BDF(min_bus, 0), 2); + /* PCI BDF end */ + build_append_int_noprefix(table_data, PCI_BUILD_BDF(max_bus, 0xff), 2); + /* Output node */ + build_append_int_noprefix(table_data, output_node, 2); + /* Reserved */ + build_append_int_noprefix(table_data, 0, 6); +} + /* Build PCI range for a given PCI host bridge */ static int enumerate_pci_host_bridges(Object *obj, void *opaque) { @@ -30,27 +55,8 @@ static int enumerate_pci_host_bridges(Object *obj, void *opaque) pci_bus_range(bus, &min_bus, &max_bus); - /* Type */ - build_append_int_noprefix(blob, 1 /* PCI range */, 1); - /* Reserved */ - build_append_int_noprefix(blob, 0, 1); - /* Length */ - build_append_int_noprefix(blob, 24, 2); - /* Endpoint start */ - build_append_int_noprefix(blob, PCI_BUILD_BDF(min_bus, 0), 4); - /* PCI Segment start */ - build_append_int_noprefix(blob, 0, 2); - /* PCI Segment end */ - build_append_int_noprefix(blob, 0, 2); - /* PCI BDF start */ - build_append_int_noprefix(blob, PCI_BUILD_BDF(min_bus, 0), 2); - /* PCI BDF end */ - build_append_int_noprefix(blob, PCI_BUILD_BDF(max_bus, 0xff), 2); - /* Output node */ - build_append_int_noprefix(blob, pci_ranges->output_node, 2); - /* Reserved */ - build_append_int_noprefix(blob, 0, 6); - + build_pci_host_range(blob, min_bus, max_bus, + pci_ranges->output_node); pci_ranges->count++; } } From e5f73c8397dddef8fc4b2fca76ffc153070a5db1 Mon Sep 17 00:00:00 2001 From: Mark Cave-Ayland Date: Wed, 25 May 2022 18:32:29 +0100 Subject: [PATCH 48/53] hw/acpi/viot: build array of PCI host bridges before generating VIOT ACPI table MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Perform the generation of the VIOT ACPI table in 2 separate passes: the first pass enumerates all of the PCI host bridges and adds the min_bus and max_bus information to an array. Once this is done the VIOT table header is generated using the size of the array to calculate the node count, which means it is no longer necessary to use a sub-array to hold the PCI host bridge range information along with viommu_off. Finally the PCI host bridge array is iterated again to add the required entries to the final VIOT ACPI table. Signed-off-by: Mark Cave-Ayland Reviewed-by: Ani Sinha Reviewed-by: Philippe Mathieu-Daudé Message-Id: <20220525173232.31429-4-mark.cave-ayland@ilande.co.uk> Reviewed-by: Jean-Philippe Brucker Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- hw/acpi/viot.c | 42 ++++++++++++++++++++++++------------------ 1 file changed, 24 insertions(+), 18 deletions(-) diff --git a/hw/acpi/viot.c b/hw/acpi/viot.c index 5dafcbf5ef..c32bbdd180 100644 --- a/hw/acpi/viot.c +++ b/hw/acpi/viot.c @@ -10,10 +10,9 @@ #include "hw/pci/pci.h" #include "hw/pci/pci_host.h" -struct viot_pci_ranges { - GArray *blob; - size_t count; - uint16_t output_node; +struct viot_pci_host_range { + int min_bus; + int max_bus; }; static void build_pci_host_range(GArray *table_data, int min_bus, int max_bus, @@ -44,8 +43,7 @@ static void build_pci_host_range(GArray *table_data, int min_bus, int max_bus, /* Build PCI range for a given PCI host bridge */ static int enumerate_pci_host_bridges(Object *obj, void *opaque) { - struct viot_pci_ranges *pci_ranges = opaque; - GArray *blob = pci_ranges->blob; + GArray *pci_host_ranges = opaque; if (object_dynamic_cast(obj, TYPE_PCI_HOST_BRIDGE)) { PCIBus *bus = PCI_HOST_BRIDGE(obj)->bus; @@ -55,9 +53,11 @@ static int enumerate_pci_host_bridges(Object *obj, void *opaque) pci_bus_range(bus, &min_bus, &max_bus); - build_pci_host_range(blob, min_bus, max_bus, - pci_ranges->output_node); - pci_ranges->count++; + const struct viot_pci_host_range pci_host_range = { + .min_bus = min_bus, + .max_bus = max_bus, + }; + g_array_append_val(pci_host_ranges, pci_host_range); } } @@ -78,19 +78,19 @@ void build_viot(MachineState *ms, GArray *table_data, BIOSLinker *linker, int viommu_off = 48; AcpiTable table = { .sig = "VIOT", .rev = 0, .oem_id = oem_id, .oem_table_id = oem_table_id }; - struct viot_pci_ranges pci_ranges = { - .output_node = viommu_off, - .blob = g_array_new(false, true /* clear */, 1), - }; + GArray *pci_host_ranges = g_array_new(false, true, + sizeof(struct viot_pci_host_range)); + struct viot_pci_host_range *pci_host_range; + int i; /* Build the list of PCI ranges that this viommu manages */ object_child_foreach_recursive(OBJECT(ms), enumerate_pci_host_bridges, - &pci_ranges); + pci_host_ranges); /* ACPI table header */ acpi_table_begin(&table, table_data); /* Node count */ - build_append_int_noprefix(table_data, pci_ranges.count + 1, 2); + build_append_int_noprefix(table_data, pci_host_ranges->len + 1, 2); /* Node offset */ build_append_int_noprefix(table_data, viommu_off, 2); /* Reserved */ @@ -111,9 +111,15 @@ void build_viot(MachineState *ms, GArray *table_data, BIOSLinker *linker, build_append_int_noprefix(table_data, 0, 8); /* PCI ranges found above */ - g_array_append_vals(table_data, pci_ranges.blob->data, - pci_ranges.blob->len); - g_array_free(pci_ranges.blob, true); + for (i = 0; i < pci_host_ranges->len; i++) { + pci_host_range = &g_array_index(pci_host_ranges, + struct viot_pci_host_range, i); + + build_pci_host_range(table_data, pci_host_range->min_bus, + pci_host_range->max_bus, viommu_off); + } + + g_array_free(pci_host_ranges, true); acpi_table_end(linker, &table); } From 4c8f2ffff1bffcf4649c5373a50f2475c598eb0e Mon Sep 17 00:00:00 2001 From: Mark Cave-Ayland Date: Wed, 25 May 2022 18:32:30 +0100 Subject: [PATCH 49/53] tests/acpi: virt: allow VIOT acpi table changes MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Mark Cave-Ayland Acked-by: Ani Sinha Reviewed-by: Philippe Mathieu-Daudé Message-Id: <20220525173232.31429-5-mark.cave-ayland@ilande.co.uk> Reviewed-by: Jean-Philippe Brucker Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- tests/qtest/bios-tables-test-allowed-diff.h | 1 + 1 file changed, 1 insertion(+) diff --git a/tests/qtest/bios-tables-test-allowed-diff.h b/tests/qtest/bios-tables-test-allowed-diff.h index dfb8523c8b..8367ffe1d4 100644 --- a/tests/qtest/bios-tables-test-allowed-diff.h +++ b/tests/qtest/bios-tables-test-allowed-diff.h @@ -1 +1,2 @@ /* List of comma-separated changed AML files to ignore */ +"tests/data/acpi/virt/VIOT", From 68f14a87291343bcec2bfcec7fdc0c8a3c01f66c Mon Sep 17 00:00:00 2001 From: Mark Cave-Ayland Date: Wed, 25 May 2022 18:32:31 +0100 Subject: [PATCH 50/53] hw/acpi/viot: sort VIOT ACPI table entries by PCI host bridge min_bus MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This ensures that the VIOT ACPI table output is always stable for a given PCI topology by ensuring that entries are ordered according to min_bus. Signed-off-by: Mark Cave-Ayland Reviewed-by: Ani Sinha Reviewed-by: Philippe Mathieu-Daudé Message-Id: <20220525173232.31429-6-mark.cave-ayland@ilande.co.uk> Reviewed-by: Jean-Philippe Brucker Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- hw/acpi/viot.c | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/hw/acpi/viot.c b/hw/acpi/viot.c index c32bbdd180..4e0bf69067 100644 --- a/hw/acpi/viot.c +++ b/hw/acpi/viot.c @@ -64,6 +64,20 @@ static int enumerate_pci_host_bridges(Object *obj, void *opaque) return 0; } +static gint pci_host_range_compare(gconstpointer a, gconstpointer b) +{ + struct viot_pci_host_range *range_a = (struct viot_pci_host_range *)a; + struct viot_pci_host_range *range_b = (struct viot_pci_host_range *)b; + + if (range_a->min_bus < range_b->min_bus) { + return -1; + } else if (range_a->min_bus > range_b->min_bus) { + return 1; + } else { + return 0; + } +} + /* * Generate a VIOT table with one PCI-based virtio-iommu that manages PCI * endpoints. @@ -87,6 +101,9 @@ void build_viot(MachineState *ms, GArray *table_data, BIOSLinker *linker, object_child_foreach_recursive(OBJECT(ms), enumerate_pci_host_bridges, pci_host_ranges); + /* Sort the pci host ranges by min_bus */ + g_array_sort(pci_host_ranges, pci_host_range_compare); + /* ACPI table header */ acpi_table_begin(&table, table_data); /* Node count */ From 5060004c303ce564e6ddb87d8255b7741870f9d6 Mon Sep 17 00:00:00 2001 From: Mark Cave-Ayland Date: Wed, 25 May 2022 18:32:32 +0100 Subject: [PATCH 51/53] tests/acpi: virt: update golden masters for VIOT MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Differences between disassembled ASL files for VIOT: +++ /tmp/asl-V69GM1.dsl 2022-05-18 10:22:27.239796759 +0100 @@ -36,11 +36,11 @@ [041h 0065 1] Reserved : 00 [042h 0066 2] Length : 0018 -[044h 0068 4] Endpoint start : 00003000 +[044h 0068 4] Endpoint start : 00001000 [048h 0072 2] PCI Segment start : 0000 [04Ah 0074 2] PCI Segment end : 0000 -[04Ch 0076 2] PCI BDF start : 3000 -[04Eh 0078 2] PCI BDF end : 30FF +[04Ch 0076 2] PCI BDF start : 1000 +[04Eh 0078 2] PCI BDF end : 10FF [050h 0080 2] Output node : 0030 [052h 0082 6] Reserved : 000000000000 @@ -48,11 +48,11 @@ [059h 0089 1] Reserved : 00 [05Ah 0090 2] Length : 0018 -[05Ch 0092 4] Endpoint start : 00001000 +[05Ch 0092 4] Endpoint start : 00003000 [060h 0096 2] PCI Segment start : 0000 [062h 0098 2] PCI Segment end : 0000 -[064h 0100 2] PCI BDF start : 1000 -[066h 0102 2] PCI BDF end : 10FF +[064h 0100 2] PCI BDF start : 3000 +[066h 0102 2] PCI BDF end : 30FF [068h 0104 2] Output node : 0030 [06Ah 0106 6] Reserved : 000000000000 @@ -62,6 +62,6 @@ 0010: 42 58 50 43 20 20 20 20 01 00 00 00 42 58 50 43 // BXPC ....BXPC 0020: 01 00 00 00 03 00 30 00 00 00 00 00 00 00 00 00 // ......0......... 0030: 03 00 10 00 00 00 10 00 00 00 00 00 00 00 00 00 // ................ - 0040: 01 00 18 00 00 30 00 00 00 00 00 00 00 30 FF 30 // .....0.......0.0 - 0050: 30 00 00 00 00 00 00 00 01 00 18 00 00 10 00 00 // 0............... - 0060: 00 00 00 00 00 10 FF 10 30 00 00 00 00 00 00 00 // ........0....... + 0040: 01 00 18 00 00 10 00 00 00 00 00 00 00 10 FF 10 // ................ + 0050: 30 00 00 00 00 00 00 00 01 00 18 00 00 30 00 00 // 0............0.. + 0060: 00 00 00 00 00 30 FF 30 30 00 00 00 00 00 00 00 // .....0.00....... Signed-off-by: Mark Cave-Ayland Reviewed-by: Philippe Mathieu-Daudé Message-Id: <20220525173232.31429-7-mark.cave-ayland@ilande.co.uk> Reviewed-by: Jean-Philippe Brucker Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- tests/data/acpi/q35/VIOT.viot | Bin 112 -> 112 bytes tests/qtest/bios-tables-test-allowed-diff.h | 1 - 2 files changed, 1 deletion(-) diff --git a/tests/data/acpi/q35/VIOT.viot b/tests/data/acpi/q35/VIOT.viot index 9b179266ccbf84f1c250ee646812d17e27987764..275c78fbe8e93190321d957c91c3f17551f865d4 100644 GIT binary patch delta 10 RcmXRYnBY1wR(PU=1OOI`1E2r^ delta 10 RcmXRYnBY1wR(PU=1OOI`1E2r^ diff --git a/tests/qtest/bios-tables-test-allowed-diff.h b/tests/qtest/bios-tables-test-allowed-diff.h index 8367ffe1d4..dfb8523c8b 100644 --- a/tests/qtest/bios-tables-test-allowed-diff.h +++ b/tests/qtest/bios-tables-test-allowed-diff.h @@ -1,2 +1 @@ /* List of comma-separated changed AML files to ignore */ -"tests/data/acpi/virt/VIOT", From fb38d0c97dd665f7e0c1cb8176090500ce2275e1 Mon Sep 17 00:00:00 2001 From: Changpeng Liu Date: Wed, 25 May 2022 20:55:39 +0800 Subject: [PATCH 52/53] hw/virtio/vhost-user: don't use uninitialized variable Variable `vdev` in `struct vhost_dev` will not be ready until start the device, so let's not use it for the error output here. Fixes: 5653493 ("hw/virtio/vhost-user: don't suppress F_CONFIG when supported") Signed-off-by: Changpeng Liu Message-Id: <20220525125540.50979-1-changpeng.liu@intel.com> Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin Fixes: 5653493 ("hw/virtio/vhost-user: don't suppress F_CONFIG when supported") Signed-off-by: Changpeng Liu Fixes: 5653493 ("hw/virtio/vhost-user: don't suppress F_CONFIG when supported") Signed-off-by: Changpeng Liu --- hw/virtio/vhost-user.c | 8 +++----- 1 file changed, 3 insertions(+), 5 deletions(-) diff --git a/hw/virtio/vhost-user.c b/hw/virtio/vhost-user.c index b040c1ad2b..0594178224 100644 --- a/hw/virtio/vhost-user.c +++ b/hw/virtio/vhost-user.c @@ -2031,18 +2031,16 @@ static int vhost_user_backend_init(struct vhost_dev *dev, void *opaque, if (supports_f_config) { if (!virtio_has_feature(protocol_features, VHOST_USER_PROTOCOL_F_CONFIG)) { - error_setg(errp, "vhost-user device %s expecting " + error_setg(errp, "vhost-user device expecting " "VHOST_USER_PROTOCOL_F_CONFIG but the vhost-user backend does " - "not support it.", dev->vdev->name); + "not support it."); return -EPROTO; } } else { if (virtio_has_feature(protocol_features, VHOST_USER_PROTOCOL_F_CONFIG)) { warn_reportf_err(*errp, "vhost-user backend supports " - "VHOST_USER_PROTOCOL_F_CONFIG for " - "device %s but QEMU does not.", - dev->vdev->name); + "VHOST_USER_PROTOCOL_F_CONFIG but QEMU does not."); protocol_features &= ~(1ULL << VHOST_USER_PROTOCOL_F_CONFIG); } } From 06cb5c82ebf5fd0f7b3c3de24d650e1259ca6ce4 Mon Sep 17 00:00:00 2001 From: Changpeng Liu Date: Wed, 25 May 2022 20:55:40 +0800 Subject: [PATCH 53/53] hw/vhost-user-scsi|blk: set `supports_config` flag correctly Currently vhost-user-scsi driver doesn't allow to change the configuration space of virtio_scsi, while vhost-user-blk support that, so here we set the flag in vhost-user-blk driver and unset it in vhost-user-scsi. Signed-off-by: Changpeng Liu Message-Id: <20220525125540.50979-2-changpeng.liu@intel.com> Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin Signed-off-by: Changpeng Liu Signed-off-by: Changpeng Liu --- hw/block/vhost-user-blk.c | 1 + hw/scsi/vhost-user-scsi.c | 1 - 2 files changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/block/vhost-user-blk.c b/hw/block/vhost-user-blk.c index 5dca4eab09..9117222456 100644 --- a/hw/block/vhost-user-blk.c +++ b/hw/block/vhost-user-blk.c @@ -337,6 +337,7 @@ static int vhost_user_blk_connect(DeviceState *dev, Error **errp) vhost_dev_set_config_notifier(&s->dev, &blk_ops); + s->vhost_user.supports_config = true; ret = vhost_dev_init(&s->dev, &s->vhost_user, VHOST_BACKEND_TYPE_USER, 0, errp); if (ret < 0) { diff --git a/hw/scsi/vhost-user-scsi.c b/hw/scsi/vhost-user-scsi.c index 9be21d07ee..1b2f7eed98 100644 --- a/hw/scsi/vhost-user-scsi.c +++ b/hw/scsi/vhost-user-scsi.c @@ -121,7 +121,6 @@ static void vhost_user_scsi_realize(DeviceState *dev, Error **errp) vsc->dev.backend_features = 0; vqs = vsc->dev.vqs; - s->vhost_user.supports_config = true; ret = vhost_dev_init(&vsc->dev, &s->vhost_user, VHOST_BACKEND_TYPE_USER, 0, errp); if (ret < 0) {