system/qemu
system/qemu
1
0
Fork 0
mirror of https://gitlab.com/qemu-project/qemu synced 2024-07-08 20:17:27 +00:00
Code Issues Projects Releases Wiki Activity

target/tricore: Implement FTOU insn

Browse Source 
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Message-ID: <20230828112651.522058-5-kbastian@mail.uni-paderborn.de>
This commit is contained in:
Bastian Koppelmann 2023-08-28 13:26:44 +02:00
parent ce64babdf6
commit 2bdbe35632
5 changed files with 49 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

32
target/tricore/fpu_helper.c
View File

@ -429,6 +429,38 @@ uint32_t helper_ftoiz(CPUTriCoreState *env, uint32_t arg)
return result;
}
uint32_t helper_ftou(CPUTriCoreState *env, uint32_t arg)
{
float32 f_arg = make_float32(arg);
uint32_t result;
int32_t flags = 0;
result = float32_to_uint32(f_arg, &env->fp_status);
flags = f_get_excp_flags(env);
if (flags & float_flag_invalid) {
flags &= ~float_flag_inexact;
if (float32_is_any_nan(f_arg)) {
result = 0;
}
/*
* we need to check arg < 0.0 before rounding as TriCore needs to raise
* float_flag_invalid as well. For instance, when we have a negative
* exponent and sign, softfloat would only raise float_flat_inexact.
*/
} else if (float32_lt_quiet(f_arg, 0, &env->fp_status)) {
flags = float_flag_invalid;
result = 0;
}
if (flags) {
f_update_psw_flags(env, flags);
} else {
env->FPU_FS = 0;
}
return result;
}
uint32_t helper_ftouz(CPUTriCoreState *env, uint32_t arg)
{
float32 f_arg = make_float32(arg);

1
target/tricore/helper.h
View File

@ -114,6 +114,7 @@ DEF_HELPER_2(ftoi, i32, env, i32)
DEF_HELPER_2(itof, i32, env, i32)
DEF_HELPER_2(utof, i32, env, i32)
DEF_HELPER_2(ftoiz, i32, env, i32)
DEF_HELPER_2(ftou, i32, env, i32)
DEF_HELPER_2(ftouz, i32, env, i32)
DEF_HELPER_2(updfl, void, env, i32)
/* dvinit */

3
target/tricore/translate.c
View File

@ -6269,6 +6269,9 @@ static void decode_rr_divide(DisasContext *ctx)
case OPC2_32_RR_ITOF:
gen_helper_itof(cpu_gpr_d[r3], cpu_env, cpu_gpr_d[r1]);
break;
case OPC2_32_RR_FTOU:
gen_helper_ftou(cpu_gpr_d[r3], cpu_env, cpu_gpr_d[r1]);
break;
case OPC2_32_RR_FTOUZ:
gen_helper_ftouz(cpu_gpr_d[r3], cpu_env, cpu_gpr_d[r1]);
break;

1
tests/tcg/tricore/Makefile.softmmu-target
View File

@ -15,6 +15,7 @@ TESTS += test_dvstep.asm.tst
TESTS += test_fadd.asm.tst
TESTS += test_fmul.asm.tst
TESTS += test_ftoi.asm.tst
TESTS += test_ftou.asm.tst
TESTS += test_imask.asm.tst
TESTS += test_insert.asm.tst
TESTS += test_ld_bu.asm.tst

12
tests/tcg/tricore/asm/test_ftou.S Normal file
View File

@ -0,0 +1,12 @@
#include "macros.h"
.text
.global _start
_start:
TEST_D_D(ftou, 1, 0x00000000, 0x1733f6c2)
TEST_D_D(ftou, 2, 0x00000000, 0x2c9d9cdc)
TEST_D_D(ftou, 3, 0xffffffff, 0x56eb7395)
TEST_D_D(ftou, 4, 0x79900800, 0x4ef32010)
TEST_D_D(ftou, 5, 0x0353f510, 0x4c54fd44)
TEST_PASSFAIL