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target-i386: Update X86CPU to QOM realizefn
Adapt the signature of x86_cpu_realize(), hook up to DeviceClass::realize and set realized = true in cpu_x86_init(). The QOM realizefn cannot depend on errp being non-NULL as in cpu_x86_init(), so use a local Error to preserve error handling behavior on APIC initialization errors. Reviewed-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Eduardo Habkost <ehabkost@redhat.com> [AF: Invoke parent's realizefn] Signed-off-by: Andreas Färber <afaerber@suse.de>
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3 changed files with 18 additions and 8 deletions
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@ -39,6 +39,7 @@
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/**
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* X86CPUClass:
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* @parent_realize: The parent class' realize handler.
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* @parent_reset: The parent class' reset handler.
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*
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* An x86 CPU model or family.
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@ -48,6 +49,7 @@ typedef struct X86CPUClass {
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CPUClass parent_class;
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/*< public >*/
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DeviceRealize parent_realize;
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void (*parent_reset)(CPUState *cpu);
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} X86CPUClass;
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@ -72,8 +74,5 @@ static inline X86CPU *x86_env_get_cpu(CPUX86State *env)
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#define ENV_GET_CPU(e) CPU(x86_env_get_cpu(e))
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/* TODO Drop once ObjectClass::realize is available */
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void x86_cpu_realize(Object *obj, Error **errp);
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#endif
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@ -2060,10 +2060,14 @@ static void x86_cpu_apic_init(X86CPU *cpu, Error **errp)
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}
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#endif
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void x86_cpu_realize(Object *obj, Error **errp)
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static void x86_cpu_realizefn(DeviceState *dev, Error **errp)
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{
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X86CPU *cpu = X86_CPU(obj);
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X86CPU *cpu = X86_CPU(dev);
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X86CPUClass *xcc = X86_CPU_GET_CLASS(dev);
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CPUX86State *env = &cpu->env;
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#ifndef CONFIG_USER_ONLY
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Error *local_err = NULL;
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#endif
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if (env->cpuid_7_0_ebx_features && env->cpuid_level < 7) {
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env->cpuid_level = 7;
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@ -2105,8 +2109,9 @@ void x86_cpu_realize(Object *obj, Error **errp)
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qemu_register_reset(x86_cpu_machine_reset_cb, cpu);
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if (cpu->env.cpuid_features & CPUID_APIC || smp_cpus > 1) {
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x86_cpu_apic_init(cpu, errp);
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if (error_is_set(errp)) {
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x86_cpu_apic_init(cpu, &local_err);
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if (local_err != NULL) {
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error_propagate(errp, local_err);
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return;
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}
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}
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@ -2115,6 +2120,8 @@ void x86_cpu_realize(Object *obj, Error **errp)
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mce_init(cpu);
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qemu_init_vcpu(&cpu->env);
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cpu_reset(CPU(cpu));
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xcc->parent_realize(dev, errp);
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}
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/* Enables contiguous-apic-ID mode, for compatibility */
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@ -2200,6 +2207,10 @@ static void x86_cpu_common_class_init(ObjectClass *oc, void *data)
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{
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X86CPUClass *xcc = X86_CPU_CLASS(oc);
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CPUClass *cc = CPU_CLASS(oc);
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DeviceClass *dc = DEVICE_CLASS(oc);
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xcc->parent_realize = dc->realize;
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dc->realize = x86_cpu_realizefn;
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xcc->parent_reset = cc->reset;
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cc->reset = x86_cpu_reset;
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@ -1282,7 +1282,7 @@ X86CPU *cpu_x86_init(const char *cpu_model)
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return NULL;
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}
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x86_cpu_realize(OBJECT(cpu), &error);
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object_property_set_bool(OBJECT(cpu), true, "realized", &error);
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if (error) {
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error_free(error);
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object_unref(OBJECT(cpu));
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