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softmmu: Extract watchpoint API from physmem.c
The watchpoint API is specific to TCG system emulation. Move it to a new compile unit. The inlined stubs are used for user-mode and non-TCG accelerators. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20221209141254.68662-1-philmd@linaro.org>
This commit is contained in:
Philippe Mathieu-Daudé
parent
feea81d8de
commit
2609ec2868
5 changed files with 224 additions and 193 deletions
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@ -123,6 +123,7 @@ M: Richard Henderson <richard.henderson@linaro.org>
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R: Paolo Bonzini <pbonzini@redhat.com>
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S: Maintained
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F: softmmu/cpus.c
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F: softmmu/watchpoint.c
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F: cpus-common.c
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F: page-vary.c
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F: page-vary-common.c
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@ -946,7 +946,7 @@ static inline bool cpu_breakpoint_test(CPUState *cpu, vaddr pc, int mask)
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return false;
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}
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#ifdef CONFIG_USER_ONLY
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#if !defined(CONFIG_TCG) || defined(CONFIG_USER_ONLY)
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static inline int cpu_watchpoint_insert(CPUState *cpu, vaddr addr, vaddr len,
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int flags, CPUWatchpoint **watchpoint)
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{
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@ -8,7 +8,8 @@ specific_ss.add(when: 'CONFIG_SOFTMMU', if_true: [files(
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)])
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specific_ss.add(when: ['CONFIG_SOFTMMU', 'CONFIG_TCG'], if_true: [files(
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'icount.c'
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'icount.c',
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'watchpoint.c',
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)])
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softmmu_ss.add(files(
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@ -781,197 +781,6 @@ AddressSpace *cpu_get_address_space(CPUState *cpu, int asidx)
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return cpu->cpu_ases[asidx].as;
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}
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/* Add a watchpoint. */
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int cpu_watchpoint_insert(CPUState *cpu, vaddr addr, vaddr len,
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int flags, CPUWatchpoint **watchpoint)
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{
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CPUWatchpoint *wp;
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vaddr in_page;
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/* forbid ranges which are empty or run off the end of the address space */
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if (len == 0 || (addr + len - 1) < addr) {
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error_report("tried to set invalid watchpoint at %"
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VADDR_PRIx ", len=%" VADDR_PRIu, addr, len);
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return -EINVAL;
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}
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wp = g_malloc(sizeof(*wp));
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wp->vaddr = addr;
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wp->len = len;
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wp->flags = flags;
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/* keep all GDB-injected watchpoints in front */
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if (flags & BP_GDB) {
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QTAILQ_INSERT_HEAD(&cpu->watchpoints, wp, entry);
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} else {
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QTAILQ_INSERT_TAIL(&cpu->watchpoints, wp, entry);
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}
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in_page = -(addr | TARGET_PAGE_MASK);
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if (len <= in_page) {
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tlb_flush_page(cpu, addr);
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} else {
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tlb_flush(cpu);
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}
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if (watchpoint)
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*watchpoint = wp;
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return 0;
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}
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/* Remove a specific watchpoint. */
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int cpu_watchpoint_remove(CPUState *cpu, vaddr addr, vaddr len,
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int flags)
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{
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CPUWatchpoint *wp;
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QTAILQ_FOREACH(wp, &cpu->watchpoints, entry) {
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if (addr == wp->vaddr && len == wp->len
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&& flags == (wp->flags & ~BP_WATCHPOINT_HIT)) {
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cpu_watchpoint_remove_by_ref(cpu, wp);
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return 0;
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}
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}
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return -ENOENT;
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}
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/* Remove a specific watchpoint by reference. */
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void cpu_watchpoint_remove_by_ref(CPUState *cpu, CPUWatchpoint *watchpoint)
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{
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QTAILQ_REMOVE(&cpu->watchpoints, watchpoint, entry);
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tlb_flush_page(cpu, watchpoint->vaddr);
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g_free(watchpoint);
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}
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/* Remove all matching watchpoints. */
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void cpu_watchpoint_remove_all(CPUState *cpu, int mask)
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{
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CPUWatchpoint *wp, *next;
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QTAILQ_FOREACH_SAFE(wp, &cpu->watchpoints, entry, next) {
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if (wp->flags & mask) {
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cpu_watchpoint_remove_by_ref(cpu, wp);
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}
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}
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}
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#ifdef CONFIG_TCG
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/* Return true if this watchpoint address matches the specified
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* access (ie the address range covered by the watchpoint overlaps
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* partially or completely with the address range covered by the
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* access).
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*/
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static inline bool watchpoint_address_matches(CPUWatchpoint *wp,
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vaddr addr, vaddr len)
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{
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/* We know the lengths are non-zero, but a little caution is
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* required to avoid errors in the case where the range ends
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* exactly at the top of the address space and so addr + len
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* wraps round to zero.
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*/
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vaddr wpend = wp->vaddr + wp->len - 1;
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vaddr addrend = addr + len - 1;
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return !(addr > wpend || wp->vaddr > addrend);
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}
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/* Return flags for watchpoints that match addr + prot. */
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int cpu_watchpoint_address_matches(CPUState *cpu, vaddr addr, vaddr len)
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{
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CPUWatchpoint *wp;
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int ret = 0;
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QTAILQ_FOREACH(wp, &cpu->watchpoints, entry) {
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if (watchpoint_address_matches(wp, addr, len)) {
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ret |= wp->flags;
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}
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}
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return ret;
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}
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/* Generate a debug exception if a watchpoint has been hit. */
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void cpu_check_watchpoint(CPUState *cpu, vaddr addr, vaddr len,
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MemTxAttrs attrs, int flags, uintptr_t ra)
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{
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CPUClass *cc = CPU_GET_CLASS(cpu);
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CPUWatchpoint *wp;
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assert(tcg_enabled());
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if (cpu->watchpoint_hit) {
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/*
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* We re-entered the check after replacing the TB.
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* Now raise the debug interrupt so that it will
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* trigger after the current instruction.
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*/
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qemu_mutex_lock_iothread();
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cpu_interrupt(cpu, CPU_INTERRUPT_DEBUG);
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qemu_mutex_unlock_iothread();
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return;
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}
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if (cc->tcg_ops->adjust_watchpoint_address) {
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/* this is currently used only by ARM BE32 */
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addr = cc->tcg_ops->adjust_watchpoint_address(cpu, addr, len);
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}
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QTAILQ_FOREACH(wp, &cpu->watchpoints, entry) {
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if (watchpoint_address_matches(wp, addr, len)
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&& (wp->flags & flags)) {
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if (replay_running_debug()) {
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/*
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* replay_breakpoint reads icount.
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* Force recompile to succeed, because icount may
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* be read only at the end of the block.
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*/
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if (!cpu->can_do_io) {
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/* Force execution of one insn next time. */
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cpu->cflags_next_tb = 1 | CF_LAST_IO | CF_NOIRQ | curr_cflags(cpu);
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cpu_loop_exit_restore(cpu, ra);
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}
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/*
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* Don't process the watchpoints when we are
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* in a reverse debugging operation.
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*/
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replay_breakpoint();
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return;
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}
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if (flags == BP_MEM_READ) {
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wp->flags |= BP_WATCHPOINT_HIT_READ;
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} else {
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wp->flags |= BP_WATCHPOINT_HIT_WRITE;
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}
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wp->hitaddr = MAX(addr, wp->vaddr);
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wp->hitattrs = attrs;
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if (wp->flags & BP_CPU && cc->tcg_ops->debug_check_watchpoint &&
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!cc->tcg_ops->debug_check_watchpoint(cpu, wp)) {
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wp->flags &= ~BP_WATCHPOINT_HIT;
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continue;
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}
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cpu->watchpoint_hit = wp;
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mmap_lock();
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/* This call also restores vCPU state */
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tb_check_watchpoint(cpu, ra);
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if (wp->flags & BP_STOP_BEFORE_ACCESS) {
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cpu->exception_index = EXCP_DEBUG;
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mmap_unlock();
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cpu_loop_exit(cpu);
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} else {
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/* Force execution of one insn next time. */
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cpu->cflags_next_tb = 1 | CF_LAST_IO | CF_NOIRQ | curr_cflags(cpu);
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mmap_unlock();
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cpu_loop_exit_noexc(cpu);
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}
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} else {
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wp->flags &= ~BP_WATCHPOINT_HIT;
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}
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}
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}
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#endif /* CONFIG_TCG */
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/* Called from RCU critical section */
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static RAMBlock *qemu_get_ram_block(ram_addr_t addr)
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{
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220
softmmu/watchpoint.c
Normal file
220
softmmu/watchpoint.c
Normal file
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@ -0,0 +1,220 @@
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/*
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* CPU watchpoints
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*
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* Copyright (c) 2003 Fabrice Bellard
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2.1 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, see <http://www.gnu.org/licenses/>.
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*/
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#include "qemu/osdep.h"
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#include "qemu/main-loop.h"
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#include "exec/exec-all.h"
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#include "exec/translate-all.h"
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#include "sysemu/tcg.h"
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#include "sysemu/replay.h"
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#include "hw/core/tcg-cpu-ops.h"
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#include "hw/core/cpu.h"
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/* Add a watchpoint. */
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int cpu_watchpoint_insert(CPUState *cpu, vaddr addr, vaddr len,
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int flags, CPUWatchpoint **watchpoint)
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{
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CPUWatchpoint *wp;
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vaddr in_page;
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/* forbid ranges which are empty or run off the end of the address space */
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if (len == 0 || (addr + len - 1) < addr) {
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error_report("tried to set invalid watchpoint at %"
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VADDR_PRIx ", len=%" VADDR_PRIu, addr, len);
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return -EINVAL;
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}
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wp = g_malloc(sizeof(*wp));
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wp->vaddr = addr;
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wp->len = len;
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wp->flags = flags;
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/* keep all GDB-injected watchpoints in front */
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if (flags & BP_GDB) {
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QTAILQ_INSERT_HEAD(&cpu->watchpoints, wp, entry);
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} else {
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QTAILQ_INSERT_TAIL(&cpu->watchpoints, wp, entry);
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}
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in_page = -(addr | TARGET_PAGE_MASK);
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if (len <= in_page) {
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tlb_flush_page(cpu, addr);
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} else {
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tlb_flush(cpu);
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}
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if (watchpoint) {
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*watchpoint = wp;
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}
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return 0;
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}
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/* Remove a specific watchpoint. */
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int cpu_watchpoint_remove(CPUState *cpu, vaddr addr, vaddr len,
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int flags)
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{
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CPUWatchpoint *wp;
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QTAILQ_FOREACH(wp, &cpu->watchpoints, entry) {
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if (addr == wp->vaddr && len == wp->len
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&& flags == (wp->flags & ~BP_WATCHPOINT_HIT)) {
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cpu_watchpoint_remove_by_ref(cpu, wp);
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return 0;
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}
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}
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return -ENOENT;
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}
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/* Remove a specific watchpoint by reference. */
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void cpu_watchpoint_remove_by_ref(CPUState *cpu, CPUWatchpoint *watchpoint)
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{
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QTAILQ_REMOVE(&cpu->watchpoints, watchpoint, entry);
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tlb_flush_page(cpu, watchpoint->vaddr);
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g_free(watchpoint);
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}
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/* Remove all matching watchpoints. */
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void cpu_watchpoint_remove_all(CPUState *cpu, int mask)
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{
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CPUWatchpoint *wp, *next;
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QTAILQ_FOREACH_SAFE(wp, &cpu->watchpoints, entry, next) {
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if (wp->flags & mask) {
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cpu_watchpoint_remove_by_ref(cpu, wp);
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}
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}
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}
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/*
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* Return true if this watchpoint address matches the specified
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* access (ie the address range covered by the watchpoint overlaps
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* partially or completely with the address range covered by the
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* access).
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*/
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static inline bool watchpoint_address_matches(CPUWatchpoint *wp,
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vaddr addr, vaddr len)
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{
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/*
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* We know the lengths are non-zero, but a little caution is
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* required to avoid errors in the case where the range ends
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* exactly at the top of the address space and so addr + len
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* wraps round to zero.
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*/
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vaddr wpend = wp->vaddr + wp->len - 1;
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vaddr addrend = addr + len - 1;
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return !(addr > wpend || wp->vaddr > addrend);
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}
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/* Return flags for watchpoints that match addr + prot. */
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int cpu_watchpoint_address_matches(CPUState *cpu, vaddr addr, vaddr len)
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{
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CPUWatchpoint *wp;
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int ret = 0;
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QTAILQ_FOREACH(wp, &cpu->watchpoints, entry) {
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if (watchpoint_address_matches(wp, addr, len)) {
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ret |= wp->flags;
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}
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}
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return ret;
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}
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/* Generate a debug exception if a watchpoint has been hit. */
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void cpu_check_watchpoint(CPUState *cpu, vaddr addr, vaddr len,
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MemTxAttrs attrs, int flags, uintptr_t ra)
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{
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CPUClass *cc = CPU_GET_CLASS(cpu);
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CPUWatchpoint *wp;
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assert(tcg_enabled());
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if (cpu->watchpoint_hit) {
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/*
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* We re-entered the check after replacing the TB.
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* Now raise the debug interrupt so that it will
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* trigger after the current instruction.
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*/
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qemu_mutex_lock_iothread();
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cpu_interrupt(cpu, CPU_INTERRUPT_DEBUG);
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qemu_mutex_unlock_iothread();
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return;
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}
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if (cc->tcg_ops->adjust_watchpoint_address) {
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/* this is currently used only by ARM BE32 */
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addr = cc->tcg_ops->adjust_watchpoint_address(cpu, addr, len);
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}
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QTAILQ_FOREACH(wp, &cpu->watchpoints, entry) {
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if (watchpoint_address_matches(wp, addr, len)
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&& (wp->flags & flags)) {
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if (replay_running_debug()) {
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/*
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* replay_breakpoint reads icount.
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* Force recompile to succeed, because icount may
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* be read only at the end of the block.
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*/
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if (!cpu->can_do_io) {
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/* Force execution of one insn next time. */
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cpu->cflags_next_tb = 1 | CF_LAST_IO | CF_NOIRQ
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| curr_cflags(cpu);
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cpu_loop_exit_restore(cpu, ra);
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}
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/*
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* Don't process the watchpoints when we are
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* in a reverse debugging operation.
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*/
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replay_breakpoint();
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return;
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}
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if (flags == BP_MEM_READ) {
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wp->flags |= BP_WATCHPOINT_HIT_READ;
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} else {
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wp->flags |= BP_WATCHPOINT_HIT_WRITE;
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}
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wp->hitaddr = MAX(addr, wp->vaddr);
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wp->hitattrs = attrs;
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if (wp->flags & BP_CPU && cc->tcg_ops->debug_check_watchpoint &&
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!cc->tcg_ops->debug_check_watchpoint(cpu, wp)) {
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wp->flags &= ~BP_WATCHPOINT_HIT;
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continue;
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}
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cpu->watchpoint_hit = wp;
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mmap_lock();
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/* This call also restores vCPU state */
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tb_check_watchpoint(cpu, ra);
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if (wp->flags & BP_STOP_BEFORE_ACCESS) {
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cpu->exception_index = EXCP_DEBUG;
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mmap_unlock();
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cpu_loop_exit(cpu);
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} else {
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/* Force execution of one insn next time. */
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cpu->cflags_next_tb = 1 | CF_LAST_IO | CF_NOIRQ
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| curr_cflags(cpu);
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mmap_unlock();
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cpu_loop_exit_noexc(cpu);
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}
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} else {
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wp->flags &= ~BP_WATCHPOINT_HIT;
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}
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}
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}
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