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linux-headers: Update to 4.2-rc1
This updates linux-headers against master 4.2-rc1 (commit d770e558e21961ad6cfdf0ff7df0eb5d7d4f0754). This is the result of ./scripts/update-linux-headers.sh work. Cc: Paolo Bonzini <pbonzini@redhat.com> Cc: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
This commit is contained in:
Alexey Kardashevskiy
Paolo Bonzini
parent
7edd8e4660
commit
25b8b39b6d
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@ -367,7 +367,8 @@ struct input_keymap_entry {
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#define KEY_MSDOS 151
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#define KEY_COFFEE 152 /* AL Terminal Lock/Screensaver */
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#define KEY_SCREENLOCK KEY_COFFEE
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#define KEY_DIRECTION 153
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#define KEY_ROTATE_DISPLAY 153 /* Display orientation for e.g. tablets */
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#define KEY_DIRECTION KEY_ROTATE_DISPLAY
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#define KEY_CYCLEWINDOWS 154
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#define KEY_MAIL 155
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#define KEY_BOOKMARKS 156 /* AC Bookmarks */
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@ -700,6 +701,10 @@ struct input_keymap_entry {
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#define KEY_NUMERIC_9 0x209
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#define KEY_NUMERIC_STAR 0x20a
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#define KEY_NUMERIC_POUND 0x20b
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#define KEY_NUMERIC_A 0x20c /* Phone key A - HUT Telephony 0xb9 */
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#define KEY_NUMERIC_B 0x20d
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#define KEY_NUMERIC_C 0x20e
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#define KEY_NUMERIC_D 0x20f
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#define KEY_CAMERA_FOCUS 0x210
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#define KEY_WPS_BUTTON 0x211 /* WiFi Protected Setup key */
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@ -971,7 +976,8 @@ struct input_keymap_entry {
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*/
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#define MT_TOOL_FINGER 0
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#define MT_TOOL_PEN 1
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#define MT_TOOL_MAX 1
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#define MT_TOOL_PALM 2
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#define MT_TOOL_MAX 2
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/*
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* Values describing the status of a force-feedback effect
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@ -26,6 +26,7 @@
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE. */
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#include "standard-headers/linux/types.h"
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#include "standard-headers/linux/virtio_types.h"
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#include "standard-headers/linux/virtio_ids.h"
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#include "standard-headers/linux/virtio_config.h"
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@ -38,6 +38,8 @@
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#ifndef VIRTIO_GPU_HW_H
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#define VIRTIO_GPU_HW_H
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#include "standard-headers/linux/types.h"
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enum virtio_gpu_ctrl_type {
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VIRTIO_GPU_UNDEFINED = 0,
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@ -199,6 +199,17 @@
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#define HV_X64_MSR_STIMER3_CONFIG 0x400000B6
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#define HV_X64_MSR_STIMER3_COUNT 0x400000B7
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/* Hyper-V guest crash notification MSR's */
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#define HV_X64_MSR_CRASH_P0 0x40000100
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#define HV_X64_MSR_CRASH_P1 0x40000101
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#define HV_X64_MSR_CRASH_P2 0x40000102
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#define HV_X64_MSR_CRASH_P3 0x40000103
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#define HV_X64_MSR_CRASH_P4 0x40000104
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#define HV_X64_MSR_CRASH_CTL 0x40000105
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#define HV_X64_MSR_CRASH_CTL_NOTIFY (1ULL << 63)
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#define HV_X64_MSR_CRASH_PARAMS \
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(1 + (HV_X64_MSR_CRASH_P4 - HV_X64_MSR_CRASH_P0))
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#define HV_X64_MSR_HYPERCALL_ENABLE 0x00000001
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#define HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_SHIFT 12
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#define HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_MASK \
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@ -897,7 +897,7 @@ struct kvm_xen_hvm_config {
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*
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* KVM_IRQFD_FLAG_RESAMPLE indicates resamplefd is valid and specifies
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* the irqfd to operate in resampling mode for level triggered interrupt
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* emlation. See Documentation/virtual/kvm/api.txt.
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* emulation. See Documentation/virtual/kvm/api.txt.
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*/
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#define KVM_IRQFD_FLAG_RESAMPLE (1 << 1)
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@ -36,6 +36,8 @@
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/* Two-stage IOMMU */
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#define VFIO_TYPE1_NESTING_IOMMU 6 /* Implies v2 */
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#define VFIO_SPAPR_TCE_v2_IOMMU 7
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/*
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* The IOCTL interface is designed for extensibility by embedding the
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* structure length (argsz) and flags into structures passed between
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@ -442,6 +444,23 @@ struct vfio_iommu_type1_dma_unmap {
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/* -------- Additional API for SPAPR TCE (Server POWERPC) IOMMU -------- */
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/*
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* The SPAPR TCE DDW info struct provides the information about
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* the details of Dynamic DMA window capability.
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*
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* @pgsizes contains a page size bitmask, 4K/64K/16M are supported.
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* @max_dynamic_windows_supported tells the maximum number of windows
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* which the platform can create.
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* @levels tells the maximum number of levels in multi-level IOMMU tables;
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* this allows splitting a table into smaller chunks which reduces
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* the amount of physically contiguous memory required for the table.
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*/
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struct vfio_iommu_spapr_tce_ddw_info {
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__u64 pgsizes; /* Bitmap of supported page sizes */
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__u32 max_dynamic_windows_supported;
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__u32 levels;
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};
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/*
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* The SPAPR TCE info struct provides the information about the PCI bus
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* address ranges available for DMA, these values are programmed into
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@ -452,14 +471,17 @@ struct vfio_iommu_type1_dma_unmap {
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* addresses too so the window works as a filter rather than an offset
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* for IOVA addresses.
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*
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* A flag will need to be added if other page sizes are supported,
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* so as defined here, it is always 4k.
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* Flags supported:
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* - VFIO_IOMMU_SPAPR_INFO_DDW: informs the userspace that dynamic DMA windows
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* (DDW) support is present. @ddw is only supported when DDW is present.
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*/
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struct vfio_iommu_spapr_tce_info {
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__u32 argsz;
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__u32 flags; /* reserved for future use */
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__u32 flags;
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#define VFIO_IOMMU_SPAPR_INFO_DDW (1 << 0) /* DDW supported */
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__u32 dma32_window_start; /* 32 bit window start (bytes) */
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__u32 dma32_window_size; /* 32 bit window size (bytes) */
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struct vfio_iommu_spapr_tce_ddw_info ddw;
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};
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#define VFIO_IOMMU_SPAPR_TCE_GET_INFO _IO(VFIO_TYPE, VFIO_BASE + 12)
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@ -470,12 +492,23 @@ struct vfio_iommu_spapr_tce_info {
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* - unfreeze IO/DMA for frozen PE;
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* - read PE state;
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* - reset PE;
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* - configure PE.
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* - configure PE;
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* - inject EEH error.
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*/
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struct vfio_eeh_pe_err {
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__u32 type;
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__u32 func;
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__u64 addr;
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__u64 mask;
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};
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struct vfio_eeh_pe_op {
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__u32 argsz;
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__u32 flags;
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__u32 op;
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union {
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struct vfio_eeh_pe_err err;
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};
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};
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#define VFIO_EEH_PE_DISABLE 0 /* Disable EEH functionality */
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@ -492,9 +525,70 @@ struct vfio_eeh_pe_op {
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#define VFIO_EEH_PE_RESET_HOT 6 /* Assert hot reset */
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#define VFIO_EEH_PE_RESET_FUNDAMENTAL 7 /* Assert fundamental reset */
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#define VFIO_EEH_PE_CONFIGURE 8 /* PE configuration */
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#define VFIO_EEH_PE_INJECT_ERR 9 /* Inject EEH error */
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#define VFIO_EEH_PE_OP _IO(VFIO_TYPE, VFIO_BASE + 21)
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/**
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* VFIO_IOMMU_SPAPR_REGISTER_MEMORY - _IOW(VFIO_TYPE, VFIO_BASE + 17, struct vfio_iommu_spapr_register_memory)
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*
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* Registers user space memory where DMA is allowed. It pins
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* user pages and does the locked memory accounting so
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* subsequent VFIO_IOMMU_MAP_DMA/VFIO_IOMMU_UNMAP_DMA calls
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* get faster.
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*/
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struct vfio_iommu_spapr_register_memory {
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__u32 argsz;
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__u32 flags;
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__u64 vaddr; /* Process virtual address */
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__u64 size; /* Size of mapping (bytes) */
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};
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#define VFIO_IOMMU_SPAPR_REGISTER_MEMORY _IO(VFIO_TYPE, VFIO_BASE + 17)
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/**
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* VFIO_IOMMU_SPAPR_UNREGISTER_MEMORY - _IOW(VFIO_TYPE, VFIO_BASE + 18, struct vfio_iommu_spapr_register_memory)
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*
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* Unregisters user space memory registered with
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* VFIO_IOMMU_SPAPR_REGISTER_MEMORY.
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* Uses vfio_iommu_spapr_register_memory for parameters.
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*/
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#define VFIO_IOMMU_SPAPR_UNREGISTER_MEMORY _IO(VFIO_TYPE, VFIO_BASE + 18)
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/**
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* VFIO_IOMMU_SPAPR_TCE_CREATE - _IOWR(VFIO_TYPE, VFIO_BASE + 19, struct vfio_iommu_spapr_tce_create)
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*
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* Creates an additional TCE table and programs it (sets a new DMA window)
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* to every IOMMU group in the container. It receives page shift, window
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* size and number of levels in the TCE table being created.
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*
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* It allocates and returns an offset on a PCI bus of the new DMA window.
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*/
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struct vfio_iommu_spapr_tce_create {
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__u32 argsz;
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__u32 flags;
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/* in */
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__u32 page_shift;
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__u64 window_size;
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__u32 levels;
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/* out */
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__u64 start_addr;
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};
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#define VFIO_IOMMU_SPAPR_TCE_CREATE _IO(VFIO_TYPE, VFIO_BASE + 19)
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/**
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* VFIO_IOMMU_SPAPR_TCE_REMOVE - _IOW(VFIO_TYPE, VFIO_BASE + 20, struct vfio_iommu_spapr_tce_remove)
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*
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* Unprograms a TCE table from all groups in the container and destroys it.
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* It receives a PCI bus offset as a window id.
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*/
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struct vfio_iommu_spapr_tce_remove {
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__u32 argsz;
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__u32 flags;
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/* in */
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__u64 start_addr;
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};
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#define VFIO_IOMMU_SPAPR_TCE_REMOVE _IO(VFIO_TYPE, VFIO_BASE + 20)
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/* ***************************************************************** */
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#endif /* VFIO_H */
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@ -1,192 +0,0 @@
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/*
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* Virtio PCI driver
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*
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* This module allows virtio devices to be used over a virtual PCI device.
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* This can be used with QEMU based VMMs like KVM or Xen.
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*
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* Copyright IBM Corp. 2007
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*
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* Authors:
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* Anthony Liguori <aliguori@us.ibm.com>
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*
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* This header is BSD licensed so anyone can use the definitions to implement
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* compatible drivers/servers.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. Neither the name of IBM nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL IBM OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#ifndef _LINUX_VIRTIO_PCI_H
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#define _LINUX_VIRTIO_PCI_H
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#include <linux/types.h>
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#ifndef VIRTIO_PCI_NO_LEGACY
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/* A 32-bit r/o bitmask of the features supported by the host */
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#define VIRTIO_PCI_HOST_FEATURES 0
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/* A 32-bit r/w bitmask of features activated by the guest */
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#define VIRTIO_PCI_GUEST_FEATURES 4
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/* A 32-bit r/w PFN for the currently selected queue */
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#define VIRTIO_PCI_QUEUE_PFN 8
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/* A 16-bit r/o queue size for the currently selected queue */
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#define VIRTIO_PCI_QUEUE_NUM 12
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/* A 16-bit r/w queue selector */
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#define VIRTIO_PCI_QUEUE_SEL 14
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/* A 16-bit r/w queue notifier */
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#define VIRTIO_PCI_QUEUE_NOTIFY 16
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/* An 8-bit device status register. */
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#define VIRTIO_PCI_STATUS 18
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/* An 8-bit r/o interrupt status register. Reading the value will return the
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* current contents of the ISR and will also clear it. This is effectively
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* a read-and-acknowledge. */
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#define VIRTIO_PCI_ISR 19
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/* MSI-X registers: only enabled if MSI-X is enabled. */
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/* A 16-bit vector for configuration changes. */
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#define VIRTIO_MSI_CONFIG_VECTOR 20
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/* A 16-bit vector for selected queue notifications. */
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#define VIRTIO_MSI_QUEUE_VECTOR 22
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/* The remaining space is defined by each driver as the per-driver
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* configuration space */
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#define VIRTIO_PCI_CONFIG_OFF(msix_enabled) ((msix_enabled) ? 24 : 20)
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/* Deprecated: please use VIRTIO_PCI_CONFIG_OFF instead */
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#define VIRTIO_PCI_CONFIG(dev) VIRTIO_PCI_CONFIG_OFF((dev)->msix_enabled)
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/* Virtio ABI version, this must match exactly */
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#define VIRTIO_PCI_ABI_VERSION 0
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/* How many bits to shift physical queue address written to QUEUE_PFN.
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* 12 is historical, and due to x86 page size. */
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#define VIRTIO_PCI_QUEUE_ADDR_SHIFT 12
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/* The alignment to use between consumer and producer parts of vring.
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* x86 pagesize again. */
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#define VIRTIO_PCI_VRING_ALIGN 4096
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#endif /* VIRTIO_PCI_NO_LEGACY */
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/* The bit of the ISR which indicates a device configuration change. */
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#define VIRTIO_PCI_ISR_CONFIG 0x2
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/* Vector value used to disable MSI for queue */
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#define VIRTIO_MSI_NO_VECTOR 0xffff
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#ifndef VIRTIO_PCI_NO_MODERN
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/* IDs for different capabilities. Must all exist. */
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/* Common configuration */
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#define VIRTIO_PCI_CAP_COMMON_CFG 1
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/* Notifications */
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#define VIRTIO_PCI_CAP_NOTIFY_CFG 2
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/* ISR access */
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#define VIRTIO_PCI_CAP_ISR_CFG 3
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/* Device specific confiuration */
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#define VIRTIO_PCI_CAP_DEVICE_CFG 4
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/* This is the PCI capability header: */
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struct virtio_pci_cap {
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__u8 cap_vndr; /* Generic PCI field: PCI_CAP_ID_VNDR */
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__u8 cap_next; /* Generic PCI field: next ptr. */
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__u8 cap_len; /* Generic PCI field: capability length */
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__u8 cfg_type; /* Identifies the structure. */
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__u8 bar; /* Where to find it. */
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__u8 padding[3]; /* Pad to full dword. */
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__le32 offset; /* Offset within bar. */
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__le32 length; /* Length of the structure, in bytes. */
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};
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struct virtio_pci_notify_cap {
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struct virtio_pci_cap cap;
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__le32 notify_off_multiplier; /* Multiplier for queue_notify_off. */
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};
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/* Fields in VIRTIO_PCI_CAP_COMMON_CFG: */
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struct virtio_pci_common_cfg {
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/* About the whole device. */
|
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__le32 device_feature_select; /* read-write */
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__le32 device_feature; /* read-only */
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__le32 guest_feature_select; /* read-write */
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__le32 guest_feature; /* read-write */
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__le16 msix_config; /* read-write */
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__le16 num_queues; /* read-only */
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__u8 device_status; /* read-write */
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__u8 config_generation; /* read-only */
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/* About a specific virtqueue. */
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__le16 queue_select; /* read-write */
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__le16 queue_size; /* read-write, power of 2. */
|
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__le16 queue_msix_vector; /* read-write */
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__le16 queue_enable; /* read-write */
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__le16 queue_notify_off; /* read-only */
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__le32 queue_desc_lo; /* read-write */
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__le32 queue_desc_hi; /* read-write */
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__le32 queue_avail_lo; /* read-write */
|
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__le32 queue_avail_hi; /* read-write */
|
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__le32 queue_used_lo; /* read-write */
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__le32 queue_used_hi; /* read-write */
|
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};
|
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|
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/* Macro versions of offsets for the Old Timers! */
|
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#define VIRTIO_PCI_CAP_VNDR 0
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#define VIRTIO_PCI_CAP_NEXT 1
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#define VIRTIO_PCI_CAP_LEN 2
|
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#define VIRTIO_PCI_CAP_CFG_TYPE 3
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#define VIRTIO_PCI_CAP_BAR 4
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#define VIRTIO_PCI_CAP_OFFSET 8
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#define VIRTIO_PCI_CAP_LENGTH 12
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#define VIRTIO_PCI_NOTIFY_CAP_MULT 16
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|
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#define VIRTIO_PCI_COMMON_DFSELECT 0
|
||||
#define VIRTIO_PCI_COMMON_DF 4
|
||||
#define VIRTIO_PCI_COMMON_GFSELECT 8
|
||||
#define VIRTIO_PCI_COMMON_GF 12
|
||||
#define VIRTIO_PCI_COMMON_MSIX 16
|
||||
#define VIRTIO_PCI_COMMON_NUMQ 18
|
||||
#define VIRTIO_PCI_COMMON_STATUS 20
|
||||
#define VIRTIO_PCI_COMMON_CFGGENERATION 21
|
||||
#define VIRTIO_PCI_COMMON_Q_SELECT 22
|
||||
#define VIRTIO_PCI_COMMON_Q_SIZE 24
|
||||
#define VIRTIO_PCI_COMMON_Q_MSIX 26
|
||||
#define VIRTIO_PCI_COMMON_Q_ENABLE 28
|
||||
#define VIRTIO_PCI_COMMON_Q_NOFF 30
|
||||
#define VIRTIO_PCI_COMMON_Q_DESCLO 32
|
||||
#define VIRTIO_PCI_COMMON_Q_DESCHI 36
|
||||
#define VIRTIO_PCI_COMMON_Q_AVAILLO 40
|
||||
#define VIRTIO_PCI_COMMON_Q_AVAILHI 44
|
||||
#define VIRTIO_PCI_COMMON_Q_USEDLO 48
|
||||
#define VIRTIO_PCI_COMMON_Q_USEDHI 52
|
||||
|
||||
#endif /* VIRTIO_PCI_NO_MODERN */
|
||||
|
||||
#endif
|
||||
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Reference in a new issue