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docs/system/riscv: update 'virt' machine core limit

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The 'virt' RISC-V machine does not have a 8 core limit. The current
limit is set in include/hw/riscv/virt.h, VIRT_CPUS_MAX, set to 512 at
this moment.

Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1945
Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Message-ID: <20231020200247.334403-2-dbarboza@ventanamicro.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
This commit is contained in:
Daniel Henrique Barboza 2023-10-20 17:02:47 -03:00 committed by Alistair Francis
parent 4d84cc5887
commit 257cfaed47
1 changed files with 1 additions and 1 deletions
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docs/system/riscv/virt.rst
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@ -12,7 +12,7 @@ Supported devices
The ``virt`` machine supports the following devices:
* Up to 8 generic RV32GC/RV64GC cores, with optional extensions
* Up to 512 generic RV32GC/RV64GC cores, with optional extensions
* Core Local Interruptor (CLINT)
* Platform-Level Interrupt Controller (PLIC)
* CFI parallel NOR flash memory