system/qemu
system/qemu
1
0
Fork 0
mirror of https://gitlab.com/qemu-project/qemu synced 2024-11-05 20:35:44 +00:00
Code Issues Projects Releases Packages Wiki Activity

target-arm: Fix return address for A64 BRK instructions

Browse source 
When we take an exception resulting from a BRK instruction,
the architecture requires that the "preferred return address"
reported to the exception handler is the address of the BRK
itself, not the following instruction (like undefined
insns, and in contrast with SVC, HVC and SMC). Follow this,
rather than incorrectly reporting the address of the following
insn.

(We do get this correct for the A32/T32 BKPT insns.)

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Cc: qemu-stable@nongnu.org
This commit is contained in:
Peter Maydell 2014-08-19 18:56:24 +01:00
parent 0e4a773705
commit 229a138d74
1 changed files with 1 additions and 1 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

2
target-arm/translate-a64.c
View file

@ -1456,7 +1456,7 @@ static void disas_exc(DisasContext *s, uint32_t insn)
break;
}
/* BRK */
gen_exception_insn(s, 0, EXCP_BKPT, syn_aa64_bkpt(imm16));
gen_exception_insn(s, 4, EXCP_BKPT, syn_aa64_bkpt(imm16));
break;
case 2:
if (op2_ll != 0) {