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spapr: Add LMB DR connectors
Enable memory hotplug for pseries 2.4 and add LMB DR connectors. With memory hotplug, enforce RAM size, NUMA node memory size and maxmem to be a multiple of SPAPR_MEMORY_BLOCK_SIZE (256M) since that's the granularity in which LMBs are represented and hot-added. LMB DR connectors will be used by the memory hotplug code. Signed-off-by: Bharata B Rao <bharata@linux.vnet.ibm.com> Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com> [spapr_drc_reset implementation] [since this missed the 2.4 cutoff, changing to only enable for 2.5] Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
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38b02bd846
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@ -61,6 +61,7 @@
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#include "hw/nmi.h"
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#include "hw/compat.h"
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#include "qemu-common.h"
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#include <libfdt.h>
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@ -1446,10 +1447,84 @@ static void spapr_cpu_init(sPAPRMachineState *spapr, PowerPCCPU *cpu)
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qemu_register_reset(spapr_cpu_reset, cpu);
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}
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/*
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* Reset routine for LMB DR devices.
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*
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* Unlike PCI DR devices, LMB DR devices explicitly register this reset
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* routine. Reset for PCI DR devices will be handled by PHB reset routine
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* when it walks all its children devices. LMB devices reset occurs
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* as part of spapr_ppc_reset().
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*/
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static void spapr_drc_reset(void *opaque)
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{
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sPAPRDRConnector *drc = opaque;
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DeviceState *d = DEVICE(drc);
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if (d) {
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device_reset(d);
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}
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}
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static void spapr_create_lmb_dr_connectors(sPAPRMachineState *spapr)
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{
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MachineState *machine = MACHINE(spapr);
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uint64_t lmb_size = SPAPR_MEMORY_BLOCK_SIZE;
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uint32_t nr_rma_lmbs = spapr->rma_size/lmb_size;
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uint32_t nr_lmbs = machine->maxram_size/lmb_size - nr_rma_lmbs;
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uint32_t nr_assigned_lmbs = machine->ram_size/lmb_size - nr_rma_lmbs;
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int i;
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for (i = 0; i < nr_lmbs; i++) {
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sPAPRDRConnector *drc;
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uint64_t addr;
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if (i < nr_assigned_lmbs) {
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addr = (i + nr_rma_lmbs) * lmb_size;
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} else {
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addr = (i - nr_assigned_lmbs) * lmb_size +
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spapr->hotplug_memory.base;
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}
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drc = spapr_dr_connector_new(OBJECT(spapr), SPAPR_DR_CONNECTOR_TYPE_LMB,
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addr/lmb_size);
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qemu_register_reset(spapr_drc_reset, drc);
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}
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}
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/*
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* If RAM size, maxmem size and individual node mem sizes aren't aligned
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* to SPAPR_MEMORY_BLOCK_SIZE(256MB), then refuse to start the guest
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* since we can't support such unaligned sizes with DRCONF_MEMORY.
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*/
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static void spapr_validate_node_memory(MachineState *machine)
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{
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int i;
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if (machine->maxram_size % SPAPR_MEMORY_BLOCK_SIZE ||
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machine->ram_size % SPAPR_MEMORY_BLOCK_SIZE) {
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error_report("Can't support memory configuration where RAM size "
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"0x" RAM_ADDR_FMT " or maxmem size "
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"0x" RAM_ADDR_FMT " isn't aligned to %llu MB",
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machine->ram_size, machine->maxram_size,
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SPAPR_MEMORY_BLOCK_SIZE/M_BYTE);
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exit(EXIT_FAILURE);
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}
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for (i = 0; i < nb_numa_nodes; i++) {
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if (numa_info[i].node_mem % SPAPR_MEMORY_BLOCK_SIZE) {
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error_report("Can't support memory configuration where memory size"
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" %" PRIx64 " of node %d isn't aligned to %llu MB",
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numa_info[i].node_mem, i,
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SPAPR_MEMORY_BLOCK_SIZE/M_BYTE);
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exit(EXIT_FAILURE);
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}
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}
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}
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/* pSeries LPAR / sPAPR hardware init */
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static void ppc_spapr_init(MachineState *machine)
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{
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sPAPRMachineState *spapr = SPAPR_MACHINE(machine);
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sPAPRMachineClass *smc = SPAPR_MACHINE_GET_CLASS(machine);
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const char *kernel_filename = machine->kernel_filename;
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const char *kernel_cmdline = machine->kernel_cmdline;
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const char *initrd_filename = machine->initrd_filename;
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@ -1528,6 +1603,10 @@ static void ppc_spapr_init(MachineState *machine)
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smp_threads),
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XICS_IRQS);
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if (smc->dr_lmb_enabled) {
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spapr_validate_node_memory(machine);
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}
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/* init CPUs */
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if (machine->cpu_model == NULL) {
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machine->cpu_model = kvm_enabled() ? "host" : "POWER7";
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@ -1578,6 +1657,10 @@ static void ppc_spapr_init(MachineState *machine)
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&spapr->hotplug_memory.mr);
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}
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if (smc->dr_lmb_enabled) {
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spapr_create_lmb_dr_connectors(spapr);
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}
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filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, "spapr-rtas.bin");
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if (!filename) {
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error_report("Could not find LPAR rtas '%s'", "spapr-rtas.bin");
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@ -1851,6 +1934,7 @@ static void spapr_nmi(NMIState *n, int cpu_index, Error **errp)
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static void spapr_machine_class_init(ObjectClass *oc, void *data)
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{
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MachineClass *mc = MACHINE_CLASS(oc);
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sPAPRMachineClass *smc = SPAPR_MACHINE_CLASS(oc);
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FWPathProviderClass *fwc = FW_PATH_PROVIDER_CLASS(oc);
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NMIClass *nc = NMI_CLASS(oc);
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@ -1865,6 +1949,7 @@ static void spapr_machine_class_init(ObjectClass *oc, void *data)
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mc->has_dynamic_sysbus = true;
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mc->pci_allow_0_address = true;
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smc->dr_lmb_enabled = false;
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fwc->get_dev_path = spapr_get_fw_dev_path;
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nc->nmi_monitor_handler = spapr_nmi;
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}
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@ -2014,11 +2099,13 @@ static const TypeInfo spapr_machine_2_4_info = {
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static void spapr_machine_2_5_class_init(ObjectClass *oc, void *data)
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{
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MachineClass *mc = MACHINE_CLASS(oc);
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sPAPRMachineClass *smc = SPAPR_MACHINE_CLASS(oc);
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mc->name = "pseries-2.5";
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mc->desc = "pSeries Logical Partition (PAPR compliant) v2.5";
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mc->alias = "pseries";
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mc->is_default = 1;
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smc->dr_lmb_enabled = true;
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}
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static const TypeInfo spapr_machine_2_5_info = {
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@ -35,6 +35,7 @@ struct sPAPRMachineClass {
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MachineClass parent_class;
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/*< public >*/
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bool dr_lmb_enabled; /* enable dynamic-reconfig/hotplug of LMBs */
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};
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/**
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