tcg/s390x: Implement TCG_TARGET_HAS_minmax_vec

Reviewed-by: David Hildenbrand <david@redhat.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
Richard Henderson 2020-09-14 19:07:16 -07:00
parent 22cb37b417
commit 220db7a6c4
2 changed files with 26 additions and 1 deletions

View file

@ -282,6 +282,10 @@ typedef enum S390Opcode {
VRRc_VESRAV = 0xe77a,
VRRc_VESRLV = 0xe778,
VRRc_VML = 0xe7a2,
VRRc_VMN = 0xe7fe,
VRRc_VMNL = 0xe7fc,
VRRc_VMX = 0xe7ff,
VRRc_VMXL = 0xe7fd,
VRRc_VN = 0xe768,
VRRc_VNC = 0xe769,
VRRc_VNO = 0xe76b,
@ -2767,6 +2771,19 @@ static void tcg_out_vec_op(TCGContext *s, TCGOpcode opc,
tcg_out_insn(s, VRRc, VERLLV, a0, a1, a2, vece);
break;
case INDEX_op_smin_vec:
tcg_out_insn(s, VRRc, VMN, a0, a1, a2, vece);
break;
case INDEX_op_smax_vec:
tcg_out_insn(s, VRRc, VMX, a0, a1, a2, vece);
break;
case INDEX_op_umin_vec:
tcg_out_insn(s, VRRc, VMNL, a0, a1, a2, vece);
break;
case INDEX_op_umax_vec:
tcg_out_insn(s, VRRc, VMXL, a0, a1, a2, vece);
break;
case INDEX_op_cmp_vec:
switch ((TCGCond)args[3]) {
case TCG_COND_EQ:
@ -2813,7 +2830,11 @@ int tcg_can_emit_vec_op(TCGOpcode opc, TCGType type, unsigned vece)
case INDEX_op_shri_vec:
case INDEX_op_shrs_vec:
case INDEX_op_shrv_vec:
case INDEX_op_smax_vec:
case INDEX_op_smin_vec:
case INDEX_op_sub_vec:
case INDEX_op_umax_vec:
case INDEX_op_umin_vec:
case INDEX_op_xor_vec:
return 1;
case INDEX_op_cmp_vec:
@ -3074,6 +3095,10 @@ static TCGConstraintSetIndex tcg_target_op_def(TCGOpcode op)
case INDEX_op_shlv_vec:
case INDEX_op_shrv_vec:
case INDEX_op_sarv_vec:
case INDEX_op_smax_vec:
case INDEX_op_smin_vec:
case INDEX_op_umax_vec:
case INDEX_op_umin_vec:
return C_O1_I2(v, v, v);
case INDEX_op_rotls_vec:
case INDEX_op_shls_vec:

View file

@ -156,7 +156,7 @@ extern uint64_t s390_facilities[3];
#define TCG_TARGET_HAS_shv_vec 1
#define TCG_TARGET_HAS_mul_vec 1
#define TCG_TARGET_HAS_sat_vec 0
#define TCG_TARGET_HAS_minmax_vec 0
#define TCG_TARGET_HAS_minmax_vec 1
#define TCG_TARGET_HAS_bitsel_vec 0
#define TCG_TARGET_HAS_cmpsel_vec 0