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tcg/loongarch64: Support LASX in tcg_out_dupm_vec
Each element size has a different encoding, so code cannot be shared in the same way as with tcg_out_dup_vec. Reviewed-by: Song Gao <gaosong@loongson.cn> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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@ -1690,8 +1690,10 @@ static bool tcg_out_dup_vec(TCGContext *s, TCGType type, unsigned vece,
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static bool tcg_out_dupm_vec(TCGContext *s, TCGType type, unsigned vece,
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static bool tcg_out_dupm_vec(TCGContext *s, TCGType type, unsigned vece,
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TCGReg r, TCGReg base, intptr_t offset)
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TCGReg r, TCGReg base, intptr_t offset)
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{
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{
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/* Handle imm overflow and division (vldrepl.d imm is divided by 8) */
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bool lasx = type == TCG_TYPE_V256;
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if (offset < -0x800 || offset > 0x7ff || \
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/* Handle imm overflow and division (vldrepl.d imm is divided by 8). */
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if (offset < -0x800 || offset > 0x7ff ||
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(offset & ((1 << vece) - 1)) != 0) {
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(offset & ((1 << vece) - 1)) != 0) {
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tcg_out_addi(s, TCG_TYPE_I64, TCG_REG_TMP0, base, offset);
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tcg_out_addi(s, TCG_TYPE_I64, TCG_REG_TMP0, base, offset);
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base = TCG_REG_TMP0;
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base = TCG_REG_TMP0;
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@ -1701,16 +1703,32 @@ static bool tcg_out_dupm_vec(TCGContext *s, TCGType type, unsigned vece,
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switch (vece) {
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switch (vece) {
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case MO_8:
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case MO_8:
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tcg_out_opc_vldrepl_b(s, r, base, offset);
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if (lasx) {
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tcg_out_opc_xvldrepl_b(s, r, base, offset);
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} else {
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tcg_out_opc_vldrepl_b(s, r, base, offset);
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}
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break;
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break;
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case MO_16:
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case MO_16:
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tcg_out_opc_vldrepl_h(s, r, base, offset);
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if (lasx) {
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tcg_out_opc_xvldrepl_h(s, r, base, offset);
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} else {
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tcg_out_opc_vldrepl_h(s, r, base, offset);
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}
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break;
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break;
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case MO_32:
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case MO_32:
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tcg_out_opc_vldrepl_w(s, r, base, offset);
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if (lasx) {
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tcg_out_opc_xvldrepl_w(s, r, base, offset);
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} else {
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tcg_out_opc_vldrepl_w(s, r, base, offset);
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}
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break;
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break;
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case MO_64:
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case MO_64:
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tcg_out_opc_vldrepl_d(s, r, base, offset);
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if (lasx) {
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tcg_out_opc_xvldrepl_d(s, r, base, offset);
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} else {
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tcg_out_opc_vldrepl_d(s, r, base, offset);
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}
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break;
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break;
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default:
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default:
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g_assert_not_reached();
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g_assert_not_reached();
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