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hw/sd/pxa2xx_mmci: Stop using old_mmio in MemoryRegionOps
Update the pxa2xx_mmci device to stop using the old_mmio read and write callbacks in its MemoryRegionOps. This actually simplifies the code because the separate byte/halfword/word access functions were all calling into a single function to do the work anyway. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Message-id: 1434117989-7367-6-git-send-email-peter.maydell@linaro.org
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@ -48,7 +48,6 @@ struct PXA2xxMMCIState {
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int resp_len;
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int cmdreq;
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int ac_width;
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};
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#define MMC_STRPCL 0x00 /* MMC Clock Start/Stop register */
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@ -215,7 +214,7 @@ static void pxa2xx_mmci_wakequeues(PXA2xxMMCIState *s)
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pxa2xx_mmci_fifo_update(s);
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}
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static uint32_t pxa2xx_mmci_read(void *opaque, hwaddr offset)
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static uint64_t pxa2xx_mmci_read(void *opaque, hwaddr offset, unsigned size)
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{
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PXA2xxMMCIState *s = (PXA2xxMMCIState *) opaque;
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uint32_t ret;
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@ -257,8 +256,8 @@ static uint32_t pxa2xx_mmci_read(void *opaque, hwaddr offset)
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return 0;
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case MMC_RXFIFO:
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ret = 0;
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while (s->ac_width -- && s->rx_len) {
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ret |= s->rx_fifo[s->rx_start ++] << (s->ac_width << 3);
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while (size-- && s->rx_len) {
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ret |= s->rx_fifo[s->rx_start++] << (size << 3);
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s->rx_start &= 0x1f;
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s->rx_len --;
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}
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@ -277,7 +276,7 @@ static uint32_t pxa2xx_mmci_read(void *opaque, hwaddr offset)
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}
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static void pxa2xx_mmci_write(void *opaque,
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hwaddr offset, uint32_t value)
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hwaddr offset, uint64_t value, unsigned size)
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{
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PXA2xxMMCIState *s = (PXA2xxMMCIState *) opaque;
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@ -370,9 +369,9 @@ static void pxa2xx_mmci_write(void *opaque,
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break;
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case MMC_TXFIFO:
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while (s->ac_width -- && s->tx_len < 0x20)
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while (size-- && s->tx_len < 0x20)
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s->tx_fifo[(s->tx_start + (s->tx_len ++)) & 0x1f] =
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(value >> (s->ac_width << 3)) & 0xff;
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(value >> (size << 3)) & 0xff;
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s->intreq &= ~INT_TXFIFO_REQ;
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pxa2xx_mmci_fifo_update(s);
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break;
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@ -386,60 +385,9 @@ static void pxa2xx_mmci_write(void *opaque,
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}
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}
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static uint32_t pxa2xx_mmci_readb(void *opaque, hwaddr offset)
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{
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PXA2xxMMCIState *s = (PXA2xxMMCIState *) opaque;
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s->ac_width = 1;
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return pxa2xx_mmci_read(opaque, offset);
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}
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static uint32_t pxa2xx_mmci_readh(void *opaque, hwaddr offset)
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{
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PXA2xxMMCIState *s = (PXA2xxMMCIState *) opaque;
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s->ac_width = 2;
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return pxa2xx_mmci_read(opaque, offset);
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}
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static uint32_t pxa2xx_mmci_readw(void *opaque, hwaddr offset)
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{
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PXA2xxMMCIState *s = (PXA2xxMMCIState *) opaque;
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s->ac_width = 4;
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return pxa2xx_mmci_read(opaque, offset);
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}
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static void pxa2xx_mmci_writeb(void *opaque,
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hwaddr offset, uint32_t value)
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{
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PXA2xxMMCIState *s = (PXA2xxMMCIState *) opaque;
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s->ac_width = 1;
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pxa2xx_mmci_write(opaque, offset, value);
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}
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static void pxa2xx_mmci_writeh(void *opaque,
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hwaddr offset, uint32_t value)
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{
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PXA2xxMMCIState *s = (PXA2xxMMCIState *) opaque;
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s->ac_width = 2;
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pxa2xx_mmci_write(opaque, offset, value);
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}
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static void pxa2xx_mmci_writew(void *opaque,
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hwaddr offset, uint32_t value)
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{
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PXA2xxMMCIState *s = (PXA2xxMMCIState *) opaque;
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s->ac_width = 4;
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pxa2xx_mmci_write(opaque, offset, value);
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}
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static const MemoryRegionOps pxa2xx_mmci_ops = {
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.old_mmio = {
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.read = { pxa2xx_mmci_readb,
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pxa2xx_mmci_readh,
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pxa2xx_mmci_readw, },
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.write = { pxa2xx_mmci_writeb,
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pxa2xx_mmci_writeh,
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pxa2xx_mmci_writew, },
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},
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.read = pxa2xx_mmci_read,
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.write = pxa2xx_mmci_write,
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.endianness = DEVICE_NATIVE_ENDIAN,
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};
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