system/qemu
system/qemu
1
0
Fork 0
mirror of https://gitlab.com/qemu-project/qemu synced 2024-10-04 18:20:06 +00:00
Code Issues Packages Projects Releases Wiki Activity

target-sh4: ignore ocbp and ocbwb instructions

Browse source 
ocbp and ocbwb controls the writeback of a cache line to memory. They
are supposed to do nothing in case of a cache miss. Given QEMU only
partially emulate caches, it is safe to ignore these instructions.

This fixes a kernel oops when trying to access an rtl8139 NIC with
recent versions.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
This commit is contained in:
Aurelien Jarno 2012-01-07 15:20:12 +01:00
parent 05b922dd0a
commit 0cdb95549f
1 changed files with 3 additions and 11 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

14
target-sh4/translate.c
View file

@ -1652,18 +1652,10 @@ static void _decode_opc(DisasContext * ctx)
}
return;
case 0x00a3: /* ocbp @Rn */
{
TCGv dummy = tcg_temp_new();
tcg_gen_qemu_ld32s(dummy, REG(B11_8), ctx->memidx);
tcg_temp_free(dummy);
}
return;
case 0x00b3: /* ocbwb @Rn */
{
TCGv dummy = tcg_temp_new();
tcg_gen_qemu_ld32s(dummy, REG(B11_8), ctx->memidx);
tcg_temp_free(dummy);
}
/* These instructions are supposed to do nothing in case of
a cache miss. Given that we only partially emulate caches
it is safe to simply ignore them. */
return;
case 0x0083: /* pref @Rn */
return;