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target/arm: Make some MTE helpers widely available
Make the MTE helpers allocation_tag_mem_probe, load_tag1, and store_tag1 available to other subsystems. Signed-off-by: Gustavo Romero <gustavo.romero@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-Id: <20240628050850.536447-6-gustavo.romero@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20240705084047.857176-35-alex.bennee@linaro.org>
This commit is contained in:
Gustavo Romero
Alex Bennée
parent
41bfb6704e
commit
0c9b437c90
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@ -29,6 +29,7 @@
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#include "hw/core/tcg-cpu-ops.h"
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#include "qapi/error.h"
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#include "qemu/guest-random.h"
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#include "mte_helper.h"
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static int choose_nonexcluded_tag(int tag, int offset, uint16_t exclude)
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@ -50,42 +51,10 @@ static int choose_nonexcluded_tag(int tag, int offset, uint16_t exclude)
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return tag;
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}
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/**
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* allocation_tag_mem_probe:
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* @env: the cpu environment
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* @ptr_mmu_idx: the addressing regime to use for the virtual address
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* @ptr: the virtual address for which to look up tag memory
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* @ptr_access: the access to use for the virtual address
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* @ptr_size: the number of bytes in the normal memory access
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* @tag_access: the access to use for the tag memory
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* @probe: true to merely probe, never taking an exception
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* @ra: the return address for exception handling
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*
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* Our tag memory is formatted as a sequence of little-endian nibbles.
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* That is, the byte at (addr >> (LOG2_TAG_GRANULE + 1)) contains two
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* tags, with the tag at [3:0] for the lower addr and the tag at [7:4]
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* for the higher addr.
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*
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* Here, resolve the physical address from the virtual address, and return
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* a pointer to the corresponding tag byte.
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*
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* If there is no tag storage corresponding to @ptr, return NULL.
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*
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* If the page is inaccessible for @ptr_access, or has a watchpoint, there are
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* three options:
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* (1) probe = true, ra = 0 : pure probe -- we return NULL if the page is not
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* accessible, and do not take watchpoint traps. The calling code must
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* handle those cases in the right priority compared to MTE traps.
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* (2) probe = false, ra = 0 : probe, no fault expected -- the caller guarantees
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* that the page is going to be accessible. We will take watchpoint traps.
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* (3) probe = false, ra != 0 : non-probe -- we will take both memory access
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* traps and watchpoint traps.
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* (probe = true, ra != 0 is invalid and will assert.)
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*/
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static uint8_t *allocation_tag_mem_probe(CPUARMState *env, int ptr_mmu_idx,
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uint64_t ptr, MMUAccessType ptr_access,
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int ptr_size, MMUAccessType tag_access,
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bool probe, uintptr_t ra)
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uint8_t *allocation_tag_mem_probe(CPUARMState *env, int ptr_mmu_idx,
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uint64_t ptr, MMUAccessType ptr_access,
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int ptr_size, MMUAccessType tag_access,
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bool probe, uintptr_t ra)
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{
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#ifdef CONFIG_USER_ONLY
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uint64_t clean_ptr = useronly_clean_ptr(ptr);
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@ -287,7 +256,7 @@ uint64_t HELPER(addsubg)(CPUARMState *env, uint64_t ptr,
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return address_with_allocation_tag(ptr + offset, rtag);
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}
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static int load_tag1(uint64_t ptr, uint8_t *mem)
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int load_tag1(uint64_t ptr, uint8_t *mem)
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{
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int ofs = extract32(ptr, LOG2_TAG_GRANULE, 1) * 4;
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return extract32(*mem, ofs, 4);
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@ -321,7 +290,7 @@ static void check_tag_aligned(CPUARMState *env, uint64_t ptr, uintptr_t ra)
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}
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/* For use in a non-parallel context, store to the given nibble. */
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static void store_tag1(uint64_t ptr, uint8_t *mem, int tag)
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void store_tag1(uint64_t ptr, uint8_t *mem, int tag)
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{
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int ofs = extract32(ptr, LOG2_TAG_GRANULE, 1) * 4;
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*mem = deposit32(*mem, ofs, 4, tag);
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66
target/arm/tcg/mte_helper.h
Normal file
66
target/arm/tcg/mte_helper.h
Normal file
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@ -0,0 +1,66 @@
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/*
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* ARM MemTag operation helpers.
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*
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* This code is licensed under the GNU GPL v2 or later.
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*
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* SPDX-License-Identifier: LGPL-2.1-or-later
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*/
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#ifndef TARGET_ARM_MTE_H
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#define TARGET_ARM_MTE_H
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#include "exec/mmu-access-type.h"
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/**
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* allocation_tag_mem_probe:
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* @env: the cpu environment
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* @ptr_mmu_idx: the addressing regime to use for the virtual address
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* @ptr: the virtual address for which to look up tag memory
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* @ptr_access: the access to use for the virtual address
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* @ptr_size: the number of bytes in the normal memory access
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* @tag_access: the access to use for the tag memory
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* @probe: true to merely probe, never taking an exception
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* @ra: the return address for exception handling
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*
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* Our tag memory is formatted as a sequence of little-endian nibbles.
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* That is, the byte at (addr >> (LOG2_TAG_GRANULE + 1)) contains two
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* tags, with the tag at [3:0] for the lower addr and the tag at [7:4]
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* for the higher addr.
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*
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* Here, resolve the physical address from the virtual address, and return
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* a pointer to the corresponding tag byte.
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*
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* If there is no tag storage corresponding to @ptr, return NULL.
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*
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* If the page is inaccessible for @ptr_access, or has a watchpoint, there are
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* three options:
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* (1) probe = true, ra = 0 : pure probe -- we return NULL if the page is not
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* accessible, and do not take watchpoint traps. The calling code must
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* handle those cases in the right priority compared to MTE traps.
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* (2) probe = false, ra = 0 : probe, no fault expected -- the caller guarantees
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* that the page is going to be accessible. We will take watchpoint traps.
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* (3) probe = false, ra != 0 : non-probe -- we will take both memory access
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* traps and watchpoint traps.
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* (probe = true, ra != 0 is invalid and will assert.)
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*/
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uint8_t *allocation_tag_mem_probe(CPUARMState *env, int ptr_mmu_idx,
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uint64_t ptr, MMUAccessType ptr_access,
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int ptr_size, MMUAccessType tag_access,
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bool probe, uintptr_t ra);
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/**
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* load_tag1 - Load 1 tag (nibble) from byte
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* @ptr: The tagged address
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* @mem: The tag address (packed, 2 tags in byte)
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*/
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int load_tag1(uint64_t ptr, uint8_t *mem);
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/**
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* store_tag1 - Store 1 tag (nibble) into byte
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* @ptr: The tagged address
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* @mem: The tag address (packed, 2 tags in byte)
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* @tag: The tag to be stored in the nibble
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*/
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void store_tag1(uint64_t ptr, uint8_t *mem, int tag);
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#endif /* TARGET_ARM_MTE_H */
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