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target-i386: fix set of registers zeroed on reset
BND0-3, BNDCFGU, BNDCFGS, BNDSTATUS were not zeroed on reset, but they should be (Intel Instruction Set Extensions Programming Reference 319433-015, pages 9-4 and 9-6). Same for YMM. XCR0 should be reset to 1. TSC and TSC_RESET were zeroed already by the memset, remove the explicit assignments. Cc: Andreas Faerber <afaerber@suse.de> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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@ -2485,8 +2485,7 @@ static void x86_cpu_reset(CPUState *s)
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cpu_breakpoint_remove_all(s, BP_CPU);
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cpu_watchpoint_remove_all(s, BP_CPU);
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env->tsc_adjust = 0;
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env->tsc = 0;
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env->xcr0 = 1;
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#if !defined(CONFIG_USER_ONLY)
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/* We hard-wire the BSP to the first CPU. */
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@ -797,6 +797,10 @@ typedef struct CPUX86State {
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target_ulong cr[5]; /* NOTE: cr1 is unused */
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int32_t a20_mask;
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BNDReg bnd_regs[4];
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BNDCSReg bndcs_regs;
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uint64_t msr_bndcfgs;
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/* FPU state */
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unsigned int fpstt; /* top of stack index */
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uint16_t fpus;
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@ -819,6 +823,8 @@ typedef struct CPUX86State {
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XMMReg xmm_t0;
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MMXReg mmx_t0;
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XMMReg ymmh_regs[CPU_NB_REGS];
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/* sysenter registers */
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uint32_t sysenter_cs;
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target_ulong sysenter_esp;
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@ -928,12 +934,7 @@ typedef struct CPUX86State {
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uint16_t fpus_vmstate;
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uint16_t fptag_vmstate;
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uint16_t fpregs_format_vmstate;
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uint64_t xstate_bv;
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XMMReg ymmh_regs[CPU_NB_REGS];
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BNDReg bnd_regs[4];
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BNDCSReg bndcs_regs;
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uint64_t msr_bndcfgs;
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uint64_t xcr0;
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