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hw/arm/virt: use VirtMachineState.gic_version
machvirt_init may need to probe for the gic version. If so, then make sure the result is written to VirtMachineState. With the state up to date, use it instead of a local variable. This is a cleanup that prepares for VirtMachineState to be passed to functions even outside hw/arm/virt.c Signed-off-by: Andrew Jones <drjones@redhat.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Acked-by: Michael S. Tsirkin <mst@redhat.com> Message-id: 20170102200153.28864-7-drjones@redhat.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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parent
0127937b20
commit
055a7f2b0a
1 changed files with 17 additions and 18 deletions
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@ -308,7 +308,7 @@ static void fdt_add_psci_node(const VirtMachineState *vms)
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qemu_fdt_setprop_cell(fdt, "/psci", "migrate", migrate_fn);
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}
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static void fdt_add_timer_nodes(const VirtMachineState *vms, int gictype)
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static void fdt_add_timer_nodes(const VirtMachineState *vms)
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{
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/* On real hardware these interrupts are level-triggered.
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* On KVM they were edge-triggered before host kernel version 4.4,
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@ -336,7 +336,7 @@ static void fdt_add_timer_nodes(const VirtMachineState *vms, int gictype)
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irqflags = GIC_FDT_IRQ_FLAGS_EDGE_LO_HI;
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}
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if (gictype == 2) {
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if (vms->gic_version == 2) {
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irqflags = deposit32(irqflags, GIC_FDT_IRQ_PPI_CPU_START,
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GIC_FDT_IRQ_PPI_CPU_WIDTH,
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(1 << vms->smp_cpus) - 1);
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@ -450,7 +450,7 @@ static void fdt_add_v2m_gic_node(VirtMachineState *vms)
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qemu_fdt_setprop_cell(vms->fdt, "/intc/v2m", "phandle", vms->msi_phandle);
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}
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static void fdt_add_gic_node(VirtMachineState *vms, int type)
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static void fdt_add_gic_node(VirtMachineState *vms)
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{
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vms->gic_phandle = qemu_fdt_alloc_phandle(vms->fdt);
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qemu_fdt_setprop_cell(vms->fdt, "/", "interrupt-parent", vms->gic_phandle);
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@ -461,7 +461,7 @@ static void fdt_add_gic_node(VirtMachineState *vms, int type)
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qemu_fdt_setprop_cell(vms->fdt, "/intc", "#address-cells", 0x2);
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qemu_fdt_setprop_cell(vms->fdt, "/intc", "#size-cells", 0x2);
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qemu_fdt_setprop(vms->fdt, "/intc", "ranges", NULL, 0);
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if (type == 3) {
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if (vms->gic_version == 3) {
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qemu_fdt_setprop_string(vms->fdt, "/intc", "compatible",
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"arm,gic-v3");
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qemu_fdt_setprop_sized_cells(vms->fdt, "/intc", "reg",
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@ -483,7 +483,7 @@ static void fdt_add_gic_node(VirtMachineState *vms, int type)
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qemu_fdt_setprop_cell(vms->fdt, "/intc", "phandle", vms->gic_phandle);
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}
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static void fdt_add_pmu_nodes(const VirtMachineState *vms, int gictype)
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static void fdt_add_pmu_nodes(const VirtMachineState *vms)
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{
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CPUState *cpu;
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ARMCPU *armcpu;
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@ -497,7 +497,7 @@ static void fdt_add_pmu_nodes(const VirtMachineState *vms, int gictype)
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}
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}
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if (gictype == 2) {
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if (vms->gic_version == 2) {
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irqflags = deposit32(irqflags, GIC_FDT_IRQ_PPI_CPU_START,
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GIC_FDT_IRQ_PPI_CPU_WIDTH,
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(1 << vms->smp_cpus) - 1);
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@ -553,14 +553,14 @@ static void create_v2m(VirtMachineState *vms, qemu_irq *pic)
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fdt_add_v2m_gic_node(vms);
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}
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static void create_gic(VirtMachineState *vms, qemu_irq *pic, int type)
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static void create_gic(VirtMachineState *vms, qemu_irq *pic)
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{
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/* We create a standalone GIC */
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VirtMachineClass *vmc = VIRT_MACHINE_GET_CLASS(vms);
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DeviceState *gicdev;
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SysBusDevice *gicbusdev;
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const char *gictype;
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int i;
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int type = vms->gic_version, i;
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gictype = (type == 3) ? gicv3_class_name() : gic_class_name();
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@ -616,7 +616,7 @@ static void create_gic(VirtMachineState *vms, qemu_irq *pic, int type)
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pic[i] = qdev_get_gpio_in(gicdev, i);
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}
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fdt_add_gic_node(vms, type);
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fdt_add_gic_node(vms);
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if (type == 3 && !vmc->no_its) {
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create_its(vms, gicdev);
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@ -1212,7 +1212,6 @@ static void machvirt_init(MachineState *machine)
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qemu_irq pic[NUM_IRQS];
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MemoryRegion *sysmem = get_system_memory();
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MemoryRegion *secure_sysmem = NULL;
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int gic_version = vms->gic_version;
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int n, virt_max_cpus;
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MemoryRegion *ram = g_new(MemoryRegion, 1);
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const char *cpu_model = machine->cpu_model;
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@ -1233,14 +1232,14 @@ static void machvirt_init(MachineState *machine)
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/* We can probe only here because during property set
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* KVM is not available yet
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*/
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if (!gic_version) {
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if (!vms->gic_version) {
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if (!kvm_enabled()) {
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error_report("gic-version=host requires KVM");
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exit(1);
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}
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gic_version = kvm_arm_vgic_probe();
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if (!gic_version) {
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vms->gic_version = kvm_arm_vgic_probe();
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if (!vms->gic_version) {
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error_report("Unable to determine GIC version supported by host");
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exit(1);
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}
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@ -1266,7 +1265,7 @@ static void machvirt_init(MachineState *machine)
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/* The maximum number of CPUs depends on the GIC version, or on how
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* many redistributors we can fit into the memory map.
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*/
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if (gic_version == 3) {
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if (vms->gic_version == 3) {
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virt_max_cpus = vms->memmap[VIRT_GIC_REDIST].size / 0x20000;
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clustersz = GICV3_TARGETLIST_BITS;
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} else {
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@ -1373,7 +1372,7 @@ static void machvirt_init(MachineState *machine)
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object_property_set_bool(cpuobj, true, "realized", NULL);
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}
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fdt_add_timer_nodes(vms, gic_version);
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fdt_add_timer_nodes(vms);
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fdt_add_cpu_nodes(vms);
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fdt_add_psci_node(vms);
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@ -1383,9 +1382,9 @@ static void machvirt_init(MachineState *machine)
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create_flash(vms, sysmem, secure_sysmem ? secure_sysmem : sysmem);
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create_gic(vms, pic, gic_version);
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create_gic(vms, pic);
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fdt_add_pmu_nodes(vms, gic_version);
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fdt_add_pmu_nodes(vms);
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create_uart(vms, pic, VIRT_UART, sysmem, serial_hds[0]);
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@ -1414,7 +1413,7 @@ static void machvirt_init(MachineState *machine)
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guest_info->memmap = vms->memmap;
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guest_info->irqmap = vms->irqmap;
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guest_info->use_highmem = vms->highmem;
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guest_info->gic_version = gic_version;
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guest_info->gic_version = vms->gic_version;
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guest_info->no_its = vmc->no_its;
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guest_info_state->machine_done.notify = virt_guest_info_machine_done;
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qemu_add_machine_init_done_notifier(&guest_info_state->machine_done);
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